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Add patch 1235272 by kippesoep. "Fixes for Tandy graphics artefacts"

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Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@2235
This commit is contained in:
Peter Veenstra 2005-07-11 19:10:16 +00:00
parent 30c5c551f4
commit 07467e8e7c
3 changed files with 43 additions and 14 deletions
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3
src/ints/int10.h
View file

@ -78,6 +78,9 @@
#define VGAREG_MDA_WRITE_FEATURE_CTL 0x3ba
#define VGAREG_VGA_WRITE_FEATURE_CTL 0x3da
#define VGAREG_ACTL_RESET 0x3da
#define VGAREG_TDY_RESET 0x3da
#define VGAREG_TDY_ADDRESS 0x3da
#define VGAREG_TDY_DATA 0x3de
#define VGAREG_MDA_MODECTL 0x3b8
#define VGAREG_CGA_MODECTL 0x3d8

1
src/ints/int10_modes.cpp
View file

@ -172,6 +172,7 @@ static void FinishSetMode(bool clearmem) {
switch (CurMode->type) {
case M_CGA4:
case M_CGA2:
case M_TANDY16:
for (i=0;i<16*1024;i++) {
real_writew(0xb800,i*2,0x0000);
}

53
src/ints/int10_pal.cpp
View file

@ -24,12 +24,21 @@
#define ACTL_MAX_REG 0x14
void INT10_SetSinglePaletteRegister(Bit8u reg,Bit8u val) {
if(reg<=ACTL_MAX_REG) {
IO_Read(VGAREG_ACTL_RESET);
IO_Write(VGAREG_ACTL_ADDRESS,reg);
IO_Write(VGAREG_ACTL_WRITE_DATA,val);
switch (machine) {
case MCH_TANDY:
IO_Read(VGAREG_TDY_RESET);
IO_Write(VGAREG_TDY_ADDRESS,reg+0x10);
IO_Write(VGAREG_TDY_DATA,val);
break;
case MCH_VGA:
if(reg<=ACTL_MAX_REG) {
IO_Read(VGAREG_ACTL_RESET);
IO_Write(VGAREG_ACTL_ADDRESS,reg);
IO_Write(VGAREG_ACTL_WRITE_DATA,val);
}
IO_Write(VGAREG_ACTL_ADDRESS,32); //Enable output and protect palette
break;
}
IO_Write(VGAREG_ACTL_ADDRESS,32); //Enable output and protect palette
}
@ -41,17 +50,33 @@ void INT10_SetOverscanBorderColor(Bit8u val) {
}
void INT10_SetAllPaletteRegisters(PhysPt data) {
IO_Read(VGAREG_ACTL_RESET);
// First the colors
for(Bit8u i=0;i<0x10;i++) {
IO_Write(VGAREG_ACTL_ADDRESS,i);
switch (machine) {
case MCH_TANDY:
IO_Read(VGAREG_TDY_RESET);
// First the colors
for(Bit8u i=0;i<0x10;i++) {
IO_Write(VGAREG_TDY_ADDRESS,i+0x10);
IO_Write(VGAREG_TDY_DATA,mem_readb(data));
data++;
}
// Then the border
IO_Write(VGAREG_TDY_ADDRESS,0x02);
IO_Write(VGAREG_TDY_DATA,mem_readb(data));
break;
case MCH_VGA:
IO_Read(VGAREG_ACTL_RESET);
// First the colors
for(Bit8u i=0;i<0x10;i++) {
IO_Write(VGAREG_ACTL_ADDRESS,i);
IO_Write(VGAREG_ACTL_WRITE_DATA,mem_readb(data));
data++;
}
// Then the border
IO_Write(VGAREG_ACTL_ADDRESS,0x11);
IO_Write(VGAREG_ACTL_WRITE_DATA,mem_readb(data));
data++;
IO_Write(VGAREG_ACTL_ADDRESS,32); //Enable output and protect palette
break;
}
// Then the border
IO_Write(VGAREG_ACTL_ADDRESS,0x11);
IO_Write(VGAREG_ACTL_WRITE_DATA,mem_readb(data));
IO_Write(VGAREG_ACTL_ADDRESS,32); //Enable output and protect palette
}
void INT10_ToggleBlinkingBit(Bit8u state) {