From 0d004f4c60f9f4f91229297cd0df85b305592632 Mon Sep 17 00:00:00 2001
From: krcroft <krcroft@users.noreply.github.com>
Date: Sat, 11 Apr 2020 13:38:16 -0700
Subject: [PATCH] Fix alignment when writing to the cache

---
 src/cpu/core_dyn_x86/cache.h | 21 ++++++++++++---------
 src/cpu/core_dynrec/cache.h  | 19 +++++++++----------
 2 files changed, 21 insertions(+), 19 deletions(-)

diff --git a/src/cpu/core_dyn_x86/cache.h b/src/cpu/core_dyn_x86/cache.h
index 3134da5a..632ba076 100644
--- a/src/cpu/core_dyn_x86/cache.h
+++ b/src/cpu/core_dyn_x86/cache.h
@@ -487,19 +487,22 @@ static INLINE void cache_addb(Bit8u val) {
 	*cache.pos++=val;
 }
 
-static INLINE void cache_addw(Bit16u val) {
-	*(Bit16u*)cache.pos=val;
-	cache.pos+=2;
+static INLINE void cache_addw(const uint16_t val)
+{
+	host_writew(cache.pos, val);
+	cache.pos += sizeof(val);
 }
 
-static INLINE void cache_addd(Bit32u val) {
-	*(Bit32u*)cache.pos=val;
-	cache.pos+=4;
+static INLINE void cache_addd(const uint32_t val)
+{
+	host_writed(cache.pos, val);
+	cache.pos += sizeof(val);
 }
 
-static INLINE void cache_addq(Bit64u val) {
-	*(Bit64u*)cache.pos=val;
-	cache.pos+=8;
+static INLINE void cache_addq(const uint64_t val)
+{
+	host_writeq(cache.pos, val);
+	cache.pos += sizeof(val);
 }
 
 static void gen_return(BlockReturn retcode);
diff --git a/src/cpu/core_dynrec/cache.h b/src/cpu/core_dynrec/cache.h
index 2016b7ec..5c6b84c4 100644
--- a/src/cpu/core_dynrec/cache.h
+++ b/src/cpu/core_dynrec/cache.h
@@ -533,24 +533,23 @@ static INLINE void cache_addb(Bit8u val) {
 }
 
 // place a 16bit value into the cache
-static INLINE void cache_addw(Bit16u val) {
-	*(Bit16u*)cache.pos=val;
-	cache.pos+=2;
+static INLINE void cache_addw(const uint16_t val) {
+	host_writew(cache.pos, val);
+	cache.pos += sizeof(val);
 }
 
 // place a 32bit value into the cache
-static INLINE void cache_addd(Bit32u val) {
-	*(Bit32u*)cache.pos=val;
-	cache.pos+=4;
+static INLINE void cache_addd(const uint32_t val) {
+	host_writed(cache.pos, val);
+	cache.pos += sizeof(val);
 }
 
 // place a 64bit value into the cache
-static INLINE void cache_addq(Bit64u val) {
-	*(Bit64u*)cache.pos=val;
-	cache.pos+=8;
+static INLINE void cache_addq(const uint64_t val) {
+	host_writeq(cache.pos, val);
+	cache.pos += sizeof(val);
 }
 
-
 static void dyn_return(BlockReturn retcode,bool ret_exception);
 static void dyn_run_code(void);