fix some bugs+enhance the s3/xga emulation (hal)
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@3059
This commit is contained in:
Sebastian Strohhäcker
parent
f87fc49809
commit
0dba278956
11 changed files with 728 additions and 484 deletions
|
|
@ -16,7 +16,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: paging.h,v 1.29 2007-11-24 17:26:48 c2woody Exp $ */
|
||||
/* $Id: paging.h,v 1.30 2007-12-10 22:11:13 c2woody Exp $ */
|
||||
|
||||
#ifndef DOSBOX_PAGING_H
|
||||
#define DOSBOX_PAGING_H
|
||||
|
|
@ -94,7 +94,7 @@ void PAGING_UnlinkPages(Bitu lin_page,Bitu pages);
|
|||
void PAGING_MapPage(Bitu lin_page,Bitu phys_page);
|
||||
bool PAGING_MakePhysPage(Bitu & page);
|
||||
|
||||
void MEM_SetLFB( Bitu page, Bitu pages, PageHandler *handler);
|
||||
void MEM_SetLFB(Bitu page, Bitu pages, PageHandler *handler, PageHandler *mmiohandler);
|
||||
void MEM_SetPageHandler(Bitu phys_page, Bitu pages, PageHandler * handler);
|
||||
void MEM_ResetPageHandler(Bitu phys_page, Bitu pages);
|
||||
|
||||
|
|
|
|||
|
|
@ -178,12 +178,17 @@ typedef struct {
|
|||
Bit8u reg_lock2;
|
||||
Bit8u reg_31;
|
||||
Bit8u reg_35;
|
||||
Bit8u reg_3a; // 4/8/doublepixel bit in there
|
||||
Bit8u reg_40; // 8415/A functionality register
|
||||
Bit8u reg_41; // BIOS flags
|
||||
Bit8u reg_43;
|
||||
Bit8u reg_45; // Hardware graphics cursor
|
||||
Bit8u reg_58;
|
||||
Bit8u reg_50;
|
||||
Bit8u reg_51;
|
||||
Bit8u reg_52;
|
||||
Bit8u reg_55;
|
||||
Bit8u reg_58;
|
||||
Bit8u reg_6b; // LFB BIOS scratchpad
|
||||
Bit8u ex_hor_overflow;
|
||||
Bit8u ex_ver_overflow;
|
||||
Bit16u la_window;
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: memory.cpp,v 1.52 2007-09-29 13:23:59 c2woody Exp $ */
|
||||
/* $Id: memory.cpp,v 1.53 2007-12-10 22:11:13 c2woody Exp $ */
|
||||
|
||||
#include "dosbox.h"
|
||||
#include "mem.h"
|
||||
|
|
@ -48,6 +48,7 @@ static struct MemoryBlock {
|
|||
Bitu end_page;
|
||||
Bitu pages;
|
||||
PageHandler *handler;
|
||||
PageHandler *mmiohandler;
|
||||
} lfb;
|
||||
struct {
|
||||
bool enabled;
|
||||
|
|
@ -122,8 +123,9 @@ static IllegalPageHandler illegal_page_handler;
|
|||
static RAMPageHandler ram_page_handler;
|
||||
static ROMPageHandler rom_page_handler;
|
||||
|
||||
void MEM_SetLFB(Bitu page, Bitu pages, PageHandler *handler) {
|
||||
void MEM_SetLFB(Bitu page, Bitu pages, PageHandler *handler, PageHandler *mmiohandler) {
|
||||
memory.lfb.handler=handler;
|
||||
memory.lfb.mmiohandler=mmiohandler;
|
||||
memory.lfb.start_page=page;
|
||||
memory.lfb.end_page=page+pages;
|
||||
memory.lfb.pages=pages;
|
||||
|
|
@ -135,6 +137,9 @@ PageHandler * MEM_GetPageHandler(Bitu phys_page) {
|
|||
return memory.phandlers[phys_page];
|
||||
} else if ((phys_page>=memory.lfb.start_page) && (phys_page<memory.lfb.end_page)) {
|
||||
return memory.lfb.handler;
|
||||
} else if ((phys_page>=memory.lfb.start_page+0x01000000/4096) &&
|
||||
(phys_page<memory.lfb.start_page+0x01000000/4096+16)) {
|
||||
return memory.lfb.mmiohandler;
|
||||
}
|
||||
return &illegal_page_handler;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -16,6 +16,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: vga.cpp,v 1.31 2007-12-10 22:11:13 c2woody Exp $ */
|
||||
|
||||
#include "dosbox.h"
|
||||
//#include "setup.h"
|
||||
|
|
@ -48,26 +49,29 @@ void VGA_SetMode(VGAModes mode) {
|
|||
|
||||
void VGA_DetermineMode(void) {
|
||||
/* Test for VGA output active or direct color modes */
|
||||
if (vga.s3.misc_control_2 & 0xf0) {
|
||||
switch (vga.s3.misc_control_2 >> 4) {
|
||||
case 1:VGA_SetMode(M_LIN8);break;
|
||||
case 3:VGA_SetMode(M_LIN15);break;
|
||||
case 5:VGA_SetMode(M_LIN16);break;
|
||||
case 13:VGA_SetMode(M_LIN32);break;
|
||||
switch (vga.s3.misc_control_2 >> 4) {
|
||||
case 0:
|
||||
if (vga.attr.mode_control & 1) { // graphics mode
|
||||
if (IS_VGA_ARCH && (vga.gfx.mode & 0x40)) {
|
||||
// access above 256k?
|
||||
if (vga.s3.reg_31 & 0x8) VGA_SetMode(M_LIN8);
|
||||
else VGA_SetMode(M_VGA);
|
||||
}
|
||||
else if (vga.gfx.mode & 0x20) VGA_SetMode(M_CGA4);
|
||||
else if ((vga.gfx.miscellaneous & 0x0c)==0x0c) VGA_SetMode(M_CGA2);
|
||||
else {
|
||||
// access above 256k?
|
||||
if (vga.s3.reg_31 & 0x8) VGA_SetMode(M_LIN4);
|
||||
else VGA_SetMode(M_EGA);
|
||||
}
|
||||
} else {
|
||||
VGA_SetMode(M_TEXT);
|
||||
}
|
||||
/* Test for graphics or alphanumeric mode */
|
||||
} else if (vga.attr.mode_control & 1) {
|
||||
if (IS_VGA_ARCH && (vga.gfx.mode & 0x40)) VGA_SetMode(M_VGA);
|
||||
else if (vga.gfx.mode & 0x20) VGA_SetMode(M_CGA4);
|
||||
else if ((vga.gfx.miscellaneous & 0x0c)==0x0c) VGA_SetMode(M_CGA2);
|
||||
else {
|
||||
if (vga.s3.reg_31 & 0x8)
|
||||
VGA_SetMode(M_LIN4);
|
||||
else
|
||||
VGA_SetMode(M_EGA);
|
||||
}
|
||||
} else {
|
||||
VGA_SetMode(M_TEXT);
|
||||
break;
|
||||
case 1:VGA_SetMode(M_LIN8);break;
|
||||
case 3:VGA_SetMode(M_LIN15);break;
|
||||
case 5:VGA_SetMode(M_LIN16);break;
|
||||
case 13:VGA_SetMode(M_LIN32);break;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: vga_draw.cpp,v 1.88 2007-12-09 17:02:55 c2woody Exp $ */
|
||||
/* $Id: vga_draw.cpp,v 1.89 2007-12-10 22:11:13 c2woody Exp $ */
|
||||
|
||||
#include <string.h>
|
||||
#include <math.h>
|
||||
|
|
@ -207,7 +207,7 @@ static Bit8u * VGA_Draw_Chain_Line(Bitu vidstart, Bitu line) {
|
|||
|
||||
static Bit8u * VGA_Draw_VGA_Line_HWMouse( Bitu vidstart, Bitu line) {
|
||||
if(vga.s3.hgc.curmode & 0x1) {
|
||||
Bitu lineat = vidstart / vga.draw.width;
|
||||
Bitu lineat = (vidstart-(vga.config.real_start<<2)) / vga.draw.width;
|
||||
if((lineat < vga.s3.hgc.originy) || (lineat > (vga.s3.hgc.originy + 63U))) {
|
||||
return &vga.mem.linear[ vidstart ];
|
||||
} else {
|
||||
|
|
@ -267,7 +267,7 @@ static Bit8u * VGA_Draw_VGA_Line_HWMouse( Bitu vidstart, Bitu line) {
|
|||
|
||||
static Bit8u * VGA_Draw_LIN16_Line_HWMouse(Bitu vidstart, Bitu line) {
|
||||
if(vga.s3.hgc.curmode & 0x1) {
|
||||
Bitu lineat = (vidstart >> 1) / vga.draw.width;
|
||||
Bitu lineat = ((vidstart-(vga.config.real_start<<2)) >> 1) / vga.draw.width;
|
||||
if((lineat < vga.s3.hgc.originy) || (lineat > (vga.s3.hgc.originy + 63U))) {
|
||||
return &vga.mem.linear[ vidstart ];
|
||||
} else {
|
||||
|
|
@ -330,7 +330,7 @@ static Bit8u * VGA_Draw_LIN16_Line_HWMouse(Bitu vidstart, Bitu line) {
|
|||
|
||||
static Bit8u * VGA_Draw_LIN32_Line_HWMouse(Bitu vidstart, Bitu line) {
|
||||
if(vga.s3.hgc.curmode & 0x1) {
|
||||
Bitu lineat = (vidstart >> 2) / vga.draw.width;
|
||||
Bitu lineat = ((vidstart-(vga.config.real_start<<2)) >> 2) / vga.draw.width;
|
||||
if((lineat < vga.s3.hgc.originy) || (lineat > (vga.s3.hgc.originy + 63U))) {
|
||||
return &vga.mem.linear[ vidstart ];
|
||||
} else {
|
||||
|
|
@ -379,7 +379,7 @@ static Bit8u * VGA_Draw_LIN32_Line_HWMouse(Bitu vidstart, Bitu line) {
|
|||
TempLine[xat] = ~TempLine[xat];
|
||||
TempLine[xat+1] = ~TempLine[xat+1];
|
||||
TempLine[xat+2] = ~TempLine[xat+2];
|
||||
TempLine[xat+2] = ~TempLine[xat+3];
|
||||
TempLine[xat+3] = ~TempLine[xat+3];
|
||||
break;
|
||||
}
|
||||
xat+=4;
|
||||
|
|
@ -586,7 +586,7 @@ skip_cursor:
|
|||
|
||||
static void VGA_VerticalDisplayEnd(Bitu val) {
|
||||
// vga.config.retrace=true;
|
||||
vga.config.real_start=vga.config.display_start & ((2*1024*1024)-1);
|
||||
vga.config.real_start=vga.config.display_start & ((VGA_MEMORY)-1);
|
||||
}
|
||||
|
||||
static void VGA_HorizontalTimer(void) {
|
||||
|
|
@ -909,53 +909,60 @@ void VGA_SetupDrawing(Bitu val) {
|
|||
Bitu htotal, hdend, hbstart, hbend, hrstart, hrend;
|
||||
Bitu vtotal, vdend, vbstart, vbend, vrstart, vrend;
|
||||
if (IS_EGAVGA_ARCH) {
|
||||
htotal = 2 + vga.crtc.horizontal_total;
|
||||
if (IS_VGA_ARCH) htotal += 3;
|
||||
hdend = 1 + vga.crtc.horizontal_display_end;
|
||||
hbstart = vga.crtc.start_horizontal_blanking;
|
||||
htotal = vga.crtc.horizontal_total;
|
||||
hdend = vga.crtc.horizontal_display_end;
|
||||
hbend = vga.crtc.end_horizontal_blanking&0x1F;
|
||||
if (IS_VGA_ARCH) hbend |= (vga.crtc.end_horizontal_retrace&0x80)>>2;
|
||||
hbend = hbstart + ((hbend - hbstart) & 0x3F);
|
||||
hbstart = vga.crtc.start_horizontal_blanking;
|
||||
hrstart = vga.crtc.start_horizontal_retrace;
|
||||
hrend = vga.crtc.end_horizontal_retrace & 0x1f;
|
||||
hrend = (hrend - hrstart) & 0x1f;
|
||||
if ( !hrend )
|
||||
hrend = hrstart + 0x1f + 1;
|
||||
else
|
||||
hrend = hrstart + hrend;
|
||||
|
||||
vtotal= 2 + vga.crtc.vertical_total | ((vga.crtc.overflow & 1) << 8);
|
||||
vdend = 1 + vga.crtc.vertical_display_end | ((vga.crtc.overflow & 2)<<7);
|
||||
vtotal= vga.crtc.vertical_total | ((vga.crtc.overflow & 1) << 8);
|
||||
vdend = vga.crtc.vertical_display_end | ((vga.crtc.overflow & 2)<<7);
|
||||
vbstart = vga.crtc.start_vertical_blanking | ((vga.crtc.overflow & 0x08) << 5);
|
||||
vrstart = vga.crtc.vertical_retrace_start + ((vga.crtc.overflow & 0x04) << 6);
|
||||
|
||||
if (IS_VGA_ARCH) {
|
||||
// additional bits only present on vga cards
|
||||
htotal |= (vga.s3.ex_hor_overflow & 0x1) << 8;
|
||||
htotal += 3;
|
||||
hdend |= (vga.s3.ex_hor_overflow & 0x2) << 7;
|
||||
hbend |= (vga.crtc.end_horizontal_retrace&0x80) >> 2;
|
||||
hbstart |= (vga.s3.ex_hor_overflow & 0x4) << 6;
|
||||
hrstart |= (vga.s3.ex_hor_overflow & 0x10) << 4;
|
||||
|
||||
vtotal |= (vga.crtc.overflow & 0x20) << 4;
|
||||
vdend |= ((vga.crtc.overflow & 0x40) << 3) |
|
||||
((vga.s3.ex_ver_overflow & 0x2) << 9);
|
||||
vtotal |= (vga.s3.ex_ver_overflow & 0x1) << 10;
|
||||
vdend |= (vga.crtc.overflow & 0x40) << 3;
|
||||
vdend |= (vga.s3.ex_ver_overflow & 0x2) << 9;
|
||||
vbstart |= (vga.crtc.maximum_scan_line & 0x20) << 4;
|
||||
vbstart |= (vga.s3.ex_ver_overflow & 0x4) << 8;
|
||||
vrstart |= ((vga.crtc.overflow & 0x80) << 2);
|
||||
}
|
||||
|
||||
vrend = vga.crtc.vertical_retrace_end & 0xF;
|
||||
vrend = ( vrend - vrstart)&0xF;
|
||||
if ( !vrend)
|
||||
vrend = vrstart + 0xf + 1;
|
||||
else
|
||||
vrend = vrstart + vrend;
|
||||
|
||||
vbstart = vga.crtc.start_vertical_blanking | ((vga.crtc.overflow & 0x08) << 5);
|
||||
if (IS_VGA_ARCH) {
|
||||
vbstart |= ((vga.crtc.maximum_scan_line & 0x20) << 4);
|
||||
vrstart |= (vga.s3.ex_ver_overflow & 0x10) << 6;
|
||||
vbend = vga.crtc.end_vertical_blanking & 0x3f;
|
||||
} else {
|
||||
vbend = vga.crtc.end_vertical_blanking & 0xf;
|
||||
}
|
||||
vbend = (vbend - vbstart) & 0x3f;
|
||||
if ( !vbend)
|
||||
vbend = vbstart + 0x3f + 1;
|
||||
else
|
||||
vbend = vbstart + vbend;
|
||||
|
||||
htotal += 2;
|
||||
vtotal += 2;
|
||||
hdend += 1;
|
||||
vdend += 1;
|
||||
|
||||
hbend = hbstart + ((hbend - hbstart) & 0x3F);
|
||||
hrend = vga.crtc.end_horizontal_retrace & 0x1f;
|
||||
hrend = (hrend - hrstart) & 0x1f;
|
||||
|
||||
if ( !hrend ) hrend = hrstart + 0x1f + 1;
|
||||
else hrend = hrstart + hrend;
|
||||
|
||||
vrend = vga.crtc.vertical_retrace_end & 0xF;
|
||||
vrend = ( vrend - vrstart)&0xF;
|
||||
|
||||
if ( !vrend) vrend = vrstart + 0xf + 1;
|
||||
else vrend = vrstart + vrend;
|
||||
|
||||
vbend = (vbend - vbstart) & 0x3f;
|
||||
if ( !vbend) vbend = vbstart + 0x3f + 1;
|
||||
else vbend = vbstart + vbend;
|
||||
|
||||
switch (svgaCard) {
|
||||
case SVGA_S3Trio:
|
||||
clock = SVGA_S3_GetClock();
|
||||
|
|
@ -1141,14 +1148,22 @@ void VGA_SetupDrawing(Bitu val) {
|
|||
} else VGA_DrawLine = VGA_Draw_Linear_Line;
|
||||
break;
|
||||
case M_LIN8:
|
||||
case M_LIN15:
|
||||
case M_LIN16:
|
||||
case M_LIN32:
|
||||
width<<=3;
|
||||
if (vga.crtc.mode_control & 0x8) {
|
||||
doublewidth = true;
|
||||
width >>= 1;
|
||||
if (vga.crtc.mode_control & 0x8)
|
||||
width >>=1;
|
||||
else if(!(vga.s3.reg_3a&0x10)) {
|
||||
doublewidth=true;
|
||||
width >>=1;
|
||||
}
|
||||
// fall-through
|
||||
case M_LIN32:
|
||||
width<<=1;
|
||||
// fall-through
|
||||
case M_LIN15:
|
||||
case M_LIN16:
|
||||
// 15/16 bpp modes double the horizontal values
|
||||
width<<=2;
|
||||
if (vga.crtc.mode_control & 0x8)
|
||||
doublewidth = true;
|
||||
/* Use HW mouse cursor drawer if enabled */
|
||||
VGA_ActivateHardwareCursor();
|
||||
break;
|
||||
|
|
@ -1194,7 +1209,7 @@ void VGA_SetupDrawing(Bitu val) {
|
|||
aspect_ratio=1.0;
|
||||
vga.draw.blocks=width;
|
||||
doublewidth=(vga.seq.clocking_mode & 0x8) > 0;
|
||||
if ((IS_VGA_ARCH) && (svgaCard==SVGA_None) && (vga.seq.clocking_mode&0x01)) {
|
||||
if ((IS_VGA_ARCH) && (svgaCard==SVGA_None) && !(vga.seq.clocking_mode&0x01)) {
|
||||
width*=9; /* 9 bit wide text font */
|
||||
VGA_DrawLine=VGA_TEXT_Xlat16_Draw_Line_9;
|
||||
bpp=16;
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: vga_memory.cpp,v 1.44 2007-10-20 16:01:40 c2woody Exp $ */
|
||||
/* $Id: vga_memory.cpp,v 1.45 2007-12-10 22:11:13 c2woody Exp $ */
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
|
|
@ -574,81 +574,39 @@ public:
|
|||
}
|
||||
};
|
||||
|
||||
extern void XGA_Write(Bitu port, Bitu val, Bitu len);
|
||||
extern Bitu XGA_Read(Bitu port, Bitu len);
|
||||
|
||||
class VGA_MMIO_Handler : public PageHandler {
|
||||
public:
|
||||
Bit16u regmem[16384];
|
||||
VGA_MMIO_Handler() {
|
||||
flags=PFLAG_NOCODE;
|
||||
//memset(®mem[0], 0, sizeof(regmem));
|
||||
}
|
||||
void writeb(PhysPt addr,Bitu val) {
|
||||
Bitu port = PAGING_GetPhysicalAddress(addr) & 0xffff;
|
||||
if(port >= 0x82E8) IO_WriteB(port, val);
|
||||
if(port <= 0x4000) {
|
||||
if(port == 0x0000) {
|
||||
IO_WriteB(0xe2e0, val);
|
||||
} else {
|
||||
IO_WriteB(0xe2e8, val);
|
||||
}
|
||||
}
|
||||
//LOG_MSG("MMIO: Write byte to %x with %x", addr, val);
|
||||
XGA_Write(port, val, 1);
|
||||
}
|
||||
void writew(PhysPt addr,Bitu val) {
|
||||
Bitu port = PAGING_GetPhysicalAddress(addr) & 0xffff;
|
||||
if(port >= 0x82E8) IO_WriteW(port, val);
|
||||
if(port == 0x8118) IO_WriteW(0x9ae8, val);
|
||||
if(port <= 0x4000) {
|
||||
if(port == 0x0000) {
|
||||
IO_WriteW(0xe2e0, val);
|
||||
} else {
|
||||
IO_WriteW(0xe2e8, val);
|
||||
}
|
||||
}
|
||||
//LOG_MSG("MMIO: Write word to %x with %x", addr, val);
|
||||
XGA_Write(port, val, 2);
|
||||
}
|
||||
void writed(PhysPt addr,Bitu val) {
|
||||
Bitu port = PAGING_GetPhysicalAddress(addr) & 0xffff;
|
||||
if(port >= 0x82E8) IO_WriteD(port, val);
|
||||
if(port == 0x8100) {
|
||||
IO_WriteW(0x86e8, (val >> 16));
|
||||
IO_WriteW(0x82e8, (val & 0xffff));
|
||||
}
|
||||
if(port == 0x8148) {
|
||||
IO_WriteW(0x96e8, (val >> 16));
|
||||
IO_WriteW(0xbee8, (val & 0xffff));
|
||||
}
|
||||
if(port <= 0x4000) {
|
||||
if(port == 0x0000) {
|
||||
IO_WriteW(0xe2e0, (val & 0xffff));
|
||||
IO_WriteW(0xe2e8, (val >> 16));
|
||||
} else {
|
||||
IO_WriteW(0xe2e8, (val & 0xffff));
|
||||
IO_WriteW(0xe2e8, (val >> 16));
|
||||
}
|
||||
}
|
||||
|
||||
//LOG_MSG("MMIO: Write dword to %x with %x", addr, val);
|
||||
XGA_Write(port, val, 4);
|
||||
}
|
||||
|
||||
Bitu readb(PhysPt addr) {
|
||||
Bitu port = PAGING_GetPhysicalAddress(addr) & 0xffff;
|
||||
if(port >= 0x82E8) return IO_ReadB(port);
|
||||
//LOG_MSG("MMIO: Read byte from %x", addr);
|
||||
return 0x00;
|
||||
return XGA_Read(port, 1);
|
||||
}
|
||||
Bitu readw(PhysPt addr) {
|
||||
Bitu port = PAGING_GetPhysicalAddress(addr) & 0xffff;
|
||||
if(port >= 0x82E8) return IO_ReadW(port);
|
||||
//LOG_MSG("MMIO: Read word from %x", addr);
|
||||
return 0x00;
|
||||
return XGA_Read(port, 2);
|
||||
}
|
||||
Bitu readd(PhysPt addr) {
|
||||
Bitu port = PAGING_GetPhysicalAddress(addr) & 0xffff;
|
||||
if(port >= 0x82E8) return IO_ReadD(port);
|
||||
//LOG_MSG("MMIO: Read dword from %x", addr);
|
||||
return 0x00;
|
||||
return XGA_Read(port, 4);
|
||||
}
|
||||
|
||||
};
|
||||
|
||||
class VGA_TANDY_PageHandler : public PageHandler {
|
||||
|
|
@ -845,7 +803,7 @@ void VGA_SetupHandlers(void) {
|
|||
MEM_ResetPageHandler( VGA_PAGE_B0, 8 );
|
||||
break;
|
||||
}
|
||||
if(((vga.s3.ext_mem_ctrl & 0x10) != 0x00) /*&& (vga.mode == M_LIN8)*/)
|
||||
if(vga.s3.ext_mem_ctrl & 0x10)
|
||||
MEM_SetPageHandler(VGA_PAGE_A0, 16, &vgaph.mmio);
|
||||
range_done:
|
||||
PAGING_ClearTLB();
|
||||
|
|
@ -859,18 +817,9 @@ void VGA_StartUpdateLFB(void) {
|
|||
#else
|
||||
vga.lfb.handler = &vgaph.lfbchanges;
|
||||
#endif
|
||||
MEM_SetLFB(vga.s3.la_window << 4 ,VGA_MEMORY/4096, vga.lfb.handler );
|
||||
MEM_SetLFB(vga.s3.la_window << 4 ,VGA_MEMORY/4096, vga.lfb.handler, &vgaph.mmio);
|
||||
}
|
||||
|
||||
void VGA_MapMMIO(void) {
|
||||
MEM_SetPageHandler(VGA_PAGE_A0, 16, &vgaph.mmio);
|
||||
}
|
||||
|
||||
void VGA_UnmapMMIO(void) {
|
||||
//MEM_SetPageHandler(VGA_PAGE_A0, &ram_page_handler);
|
||||
}
|
||||
|
||||
|
||||
void VGA_SetupMemory() {
|
||||
// allocate 16byte-aligned memory
|
||||
vga.mem.linear = new Bit8u[VGA_MEMORY+16];
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: vga_misc.cpp,v 1.35 2007-10-13 16:34:06 c2woody Exp $ */
|
||||
/* $Id: vga_misc.cpp,v 1.36 2007-12-10 22:11:13 c2woody Exp $ */
|
||||
|
||||
#include "dosbox.h"
|
||||
#include "inout.h"
|
||||
|
|
@ -30,7 +30,7 @@ Bitu vga_read_p3d4(Bitu port,Bitu iolen);
|
|||
void vga_write_p3d5(Bitu port,Bitu val,Bitu iolen);
|
||||
Bitu vga_read_p3d5(Bitu port,Bitu iolen);
|
||||
|
||||
static Bitu vga_read_p3da(Bitu port,Bitu iolen) {
|
||||
Bitu vga_read_p3da(Bitu port,Bitu iolen) {
|
||||
vga.internal.attrindex=false;
|
||||
vga.tandy.pcjr_flipflop=false;
|
||||
Bit8u retval=0;
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: vga_s3.cpp,v 1.8 2007-06-28 16:02:27 c2woody Exp $ */
|
||||
/* $Id: vga_s3.cpp,v 1.9 2007-12-10 22:11:13 c2woody Exp $ */
|
||||
|
||||
#include "dosbox.h"
|
||||
#include "inout.h"
|
||||
|
|
@ -70,9 +70,15 @@ void SVGA_S3_WriteCRTC(Bitu reg,Bitu val,Bitu iolen) {
|
|||
case 0x39: /* CR39 Register Lock 2 */
|
||||
vga.s3.reg_lock2=val;
|
||||
break;
|
||||
case 0x3a:
|
||||
vga.s3.reg_3a = val;
|
||||
break;
|
||||
case 0x40: /* CR40 System Config */
|
||||
vga.s3.reg_40 = val;
|
||||
break;
|
||||
case 0x41: /* CR41 BIOS flags */
|
||||
vga.s3.reg_41 = val;
|
||||
break;
|
||||
case 0x43: /* CR43 Extended Mode */
|
||||
vga.s3.reg_43=val & ~0x4;
|
||||
if (((val & 0x4) ^ (vga.config.scan_len >> 6)) & 0x4) {
|
||||
|
|
@ -114,17 +120,22 @@ void SVGA_S3_WriteCRTC(Bitu reg,Bitu val,Bitu iolen) {
|
|||
vga.s3.hgc.bstackpos++;
|
||||
break;
|
||||
case 0x4c: /* HGC start address high byte*/
|
||||
vga.s3.hgc.startaddr = vga.s3.hgc.startaddr | ((val & 0xff) << 8);
|
||||
vga.s3.hgc.startaddr &=0xff;
|
||||
vga.s3.hgc.startaddr |= ((val & 0xf) << 8);
|
||||
break;
|
||||
case 0x4d: /* HGC start address low byte*/
|
||||
vga.s3.hgc.startaddr = vga.s3.hgc.startaddr | (val & 0xff);
|
||||
vga.s3.hgc.startaddr &=0xff00;
|
||||
vga.s3.hgc.startaddr |= (val & 0xff);
|
||||
break;
|
||||
case 0x4e: /* HGC pattern start X */
|
||||
vga.s3.hgc.posx = val;
|
||||
break;
|
||||
case 0x4f: /* HGC pattern start X */
|
||||
case 0x4f: /* HGC pattern start Y */
|
||||
vga.s3.hgc.posy = val;
|
||||
break;
|
||||
case 0x50: // Extended System Control 1
|
||||
vga.s3.reg_50 = val;
|
||||
break;
|
||||
case 0x51: /* Extended System Control 2 */
|
||||
vga.s3.reg_51=val & 0xc0; //Only store bits 6,7
|
||||
//TODO Display start
|
||||
|
|
@ -161,17 +172,17 @@ void SVGA_S3_WriteCRTC(Bitu reg,Bitu val,Bitu iolen) {
|
|||
7 (not 864/964) Enable EPROM Write. If set enables flash memory write
|
||||
control to the BIOS ROM address
|
||||
*/
|
||||
case 0x52: // Extended System Control 1
|
||||
vga.s3.reg_52 = val;
|
||||
break;
|
||||
case 0x53:
|
||||
if((val & 0x10) != (vga.s3.ext_mem_ctrl & 0x10)) {
|
||||
/* Map or unmap MMIO */
|
||||
if ((val & 0x10) != 0) {
|
||||
//LOG_MSG("VGA: Mapping Memory Mapped I/O to 0xA0000");
|
||||
// VGA_MapMMIO();
|
||||
} else {
|
||||
// VGA_UnmapMMIO();
|
||||
}
|
||||
// Map or unmap MMIO
|
||||
// bit 4 = MMIO at A0000
|
||||
// bit 3 = MMIO at LFB + 16M (should be fine if its always enabled for now)
|
||||
if(vga.s3.ext_mem_ctrl!=val) {
|
||||
vga.s3.ext_mem_ctrl = val;
|
||||
VGA_SetupHandlers();
|
||||
}
|
||||
vga.s3.ext_mem_ctrl = val;
|
||||
break;
|
||||
case 0x55: /* Extended Video DAC Control */
|
||||
vga.s3.reg_55=val;
|
||||
|
|
@ -302,6 +313,9 @@ void SVGA_S3_WriteCRTC(Bitu reg,Bitu val,Bitu iolen) {
|
|||
vga.s3.svga_bank.b.bank=val & 0x3f;
|
||||
VGA_SetupHandlers();
|
||||
break;
|
||||
case 0x6b: // BIOS scratchpad: LFB adress
|
||||
vga.s3.reg_6b=(Bit8u)val;
|
||||
break;
|
||||
default:
|
||||
LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:S3:CRTC:Write to illegal index %2X", reg );
|
||||
break;
|
||||
|
|
@ -317,38 +331,56 @@ Bitu SVGA_S3_ReadCRTC( Bitu reg, Bitu iolen) {
|
|||
return 0x11;
|
||||
//Trio 64 id
|
||||
case 0x2f: /* Revision */
|
||||
return 0x00;
|
||||
return 0x44;
|
||||
case 0x30: /* CR30 Chip ID/REV register */
|
||||
return 0xe0; //Trio+ dual byte
|
||||
// Trio32/64 has 0xe0. extended
|
||||
return 0xe1; //Trio+ dual byte
|
||||
//return 0xc0; // 864
|
||||
|
||||
case 0x31: /* CR31 Memory Configuration */
|
||||
//TODO mix in bits from baseaddress;
|
||||
return vga.s3.reg_31;
|
||||
case 0x35: /* CR35 CRT Register Lock */
|
||||
return vga.s3.reg_35|(vga.s3.svga_bank.b.bank & 0xf);
|
||||
case 0x36: /* CR36 Reset State Read 1 */
|
||||
//return 0x8f;
|
||||
return 0x8e; /* PCI version */
|
||||
return 0x92; /* PCI version */
|
||||
//2 Mb PCI and some bios settings
|
||||
case 0x37: /* Reset state read 2 */
|
||||
return 0x2b;
|
||||
case 0x38: /* CR38 Register Lock 1 */
|
||||
return vga.s3.reg_lock1;
|
||||
case 0x39: /* CR39 Register Lock 2 */
|
||||
return vga.s3.reg_lock2;
|
||||
return vga.s3.reg_lock2;
|
||||
case 0x3a:
|
||||
return vga.s3.reg_3a;
|
||||
case 0x40: /* CR40 system config */
|
||||
return vga.s3.reg_40;
|
||||
case 0x41: /* CR40 system config */
|
||||
return vga.s3.reg_41;
|
||||
case 0x42: // not interlaced
|
||||
return 0x0d;
|
||||
case 0x43: /* CR43 Extended Mode */
|
||||
return vga.s3.reg_43|((vga.config.scan_len>>6)&0x4);
|
||||
case 0x45: /* Hardware cursor mode */
|
||||
vga.s3.hgc.bstackpos = 0;
|
||||
vga.s3.hgc.fstackpos = 0;
|
||||
return vga.s3.hgc.curmode;
|
||||
return vga.s3.hgc.curmode|0xa0;
|
||||
case 0x46:
|
||||
return vga.s3.hgc.originx>>8;
|
||||
case 0x47: /* HGC orgX */
|
||||
return vga.s3.hgc.originx&0xff;
|
||||
case 0x48:
|
||||
return vga.s3.hgc.originy>>8;
|
||||
case 0x49: /* HGC orgY */
|
||||
return vga.s3.hgc.originy&0xff;
|
||||
case 0x50: // CR50 Extended System Control 1
|
||||
return vga.s3.reg_50;
|
||||
case 0x51: /* Extended System Control 2 */
|
||||
return ((vga.config.display_start >> 16) & 3 ) |
|
||||
((vga.s3.svga_bank.b.bank & 0x30) >> 2) |
|
||||
((vga.config.scan_len & 0x300) >> 4) |
|
||||
vga.s3.reg_51;
|
||||
case 0x52: // CR52 Extended BIOS flags 1
|
||||
return vga.s3.reg_52;
|
||||
case 0x53:
|
||||
return vga.s3.ext_mem_ctrl;
|
||||
case 0x55: /* Extended Video DAC Control */
|
||||
|
|
@ -369,6 +401,8 @@ Bitu SVGA_S3_ReadCRTC( Bitu reg, Bitu iolen) {
|
|||
return (Bit8u)((vga.config.display_start & 0x1f0000)>>16);
|
||||
case 0x6a: /* Extended System Control 4 */
|
||||
return (Bit8u)(vga.s3.svga_bank.b.bank & 0x3f);
|
||||
case 0x6b: // BIOS scatchpad: LFB address
|
||||
return vga.s3.reg_6b;
|
||||
default:
|
||||
return 0x00;
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -16,7 +16,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: int10_modes.cpp,v 1.70 2007-11-05 18:42:56 qbix79 Exp $ */
|
||||
/* $Id: int10_modes.cpp,v 1.71 2007-12-10 22:11:13 c2woody Exp $ */
|
||||
|
||||
#include <string.h>
|
||||
|
||||
|
|
@ -57,51 +57,69 @@ VideoModeBlock ModeList_VGA[]={
|
|||
{ 0x054 ,M_TEXT ,1056,688, 132,43, 8, 16, 1 ,0xB8000 ,0x4000, 192, 800, 132,688, 0 },
|
||||
{ 0x055 ,M_TEXT ,1056,400, 132,25, 8, 16, 1 ,0xB8000 ,0x2000, 192, 449, 132,400, 0 },
|
||||
|
||||
/* Alias of mode 102 */
|
||||
{ 0x06A ,M_LIN4 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,128 ,663 ,100,600 ,0 },
|
||||
|
||||
/* Follow vesa 1.2 for first 0x20 */
|
||||
{ 0x100 ,M_LIN8 ,640 ,400 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 ,0 },
|
||||
{ 0x101 ,M_LIN8 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 ,0 },
|
||||
{ 0x102 ,M_LIN4 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,128 ,663 ,100,600 ,0 },
|
||||
{ 0x103 ,M_LIN8 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,128 ,663 ,100,600 ,0 },
|
||||
{ 0x104 ,M_LIN4 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,150 ,800 ,128,768 ,0 },
|
||||
{ 0x105 ,M_LIN8 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,150 ,800 ,128,768 ,0 },
|
||||
{ 0x102 ,M_LIN4 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,132 ,628 ,100,600 ,0 },
|
||||
{ 0x103 ,M_LIN8 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,132 ,628 ,100,600 ,0 },
|
||||
{ 0x104 ,M_LIN4 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,168 ,806 ,128,768 ,0 },
|
||||
{ 0x105 ,M_LIN8 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,168 ,806 ,128,768 ,0 },
|
||||
{ 0x106 ,M_LIN4 ,1280,1024,160,64 ,8 ,16 ,1 ,0xA0000 ,0x10000,212 ,1066,160,1024,0 },
|
||||
{ 0x107 ,M_LIN8 ,1280,1024,160,64 ,8 ,16 ,1 ,0xA0000 ,0x10000,212 ,1066,160,1024,0 },
|
||||
|
||||
{ 0x10D ,M_LIN15 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
|
||||
{ 0x10E ,M_LIN16 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
|
||||
{ 0x10F ,M_LIN32 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
|
||||
{ 0x110 ,M_LIN15 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 ,0 },
|
||||
{ 0x111 ,M_LIN16 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 ,0 },
|
||||
{ 0x10F ,M_LIN32 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x10000,50 ,449 ,40 ,400 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
|
||||
{ 0x110 ,M_LIN15 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,200 ,525 ,160,480 ,0 },
|
||||
{ 0x111 ,M_LIN16 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,200 ,525 ,160,480 ,0 },
|
||||
{ 0x112 ,M_LIN32 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 ,0 },
|
||||
{ 0x113 ,M_LIN15 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,128 ,663 ,100,600 ,0 },
|
||||
{ 0x114 ,M_LIN16 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,128 ,663 ,100,600 ,0 },
|
||||
{ 0x115 ,M_LIN32 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,128 ,663 ,100,600 ,0 },
|
||||
|
||||
{ 0x116 ,M_LIN15 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,150 ,800 ,128,768 ,0 },
|
||||
{ 0x117 ,M_LIN16 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,150 ,800 ,128,768 ,0 },
|
||||
{ 0x118 ,M_LIN32 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,150 ,800 ,128,768 ,0 },
|
||||
{ 0x113 ,M_LIN15 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,264 ,628 ,200,600 ,0 },
|
||||
{ 0x114 ,M_LIN16 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,264 ,628 ,200,600 ,0 },
|
||||
{ 0x115 ,M_LIN32 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,132 ,628 ,100,600 ,0 },
|
||||
|
||||
{ 0x116 ,M_LIN15 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,336 ,806 ,256,768 ,0 },
|
||||
{ 0x117 ,M_LIN16 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,336 ,806 ,256,768 ,0 },
|
||||
{ 0x118 ,M_LIN32 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,168 ,806 ,128,768 ,0 },
|
||||
/* those should be interlaced but ok */
|
||||
//{ 0x119 ,M_LIN15 ,1280,1024,160,64 ,8 ,16 ,1 ,0xA0000 ,0x10000,424 ,1066,320,1024,0 },
|
||||
//{ 0x11A ,M_LIN16 ,1280,1024,160,64 ,8 ,16 ,1 ,0xA0000 ,0x10000,424 ,1066,320,1024,0 },
|
||||
|
||||
{ 0x150 ,M_LIN8 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
|
||||
{ 0x151 ,M_LIN8 ,320 ,240 ,40 ,30 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
|
||||
{ 0x152 ,M_LIN8 ,320 ,400 ,40 ,50 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE },
|
||||
{ 0x153 ,M_LIN8 ,320 ,480 ,40 ,60 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE },
|
||||
|
||||
{ 0x160 ,M_LIN15 ,320 ,240 ,40 ,30 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
|
||||
{ 0x161 ,M_LIN15 ,320 ,400 ,40 ,50 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE },
|
||||
{ 0x162 ,M_LIN15 ,320 ,480 ,40 ,60 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE },
|
||||
{ 0x165 ,M_LIN15 ,640 ,400 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 ,0 },
|
||||
{ 0x160 ,M_LIN15 ,320 ,240 ,40 ,30 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 , 80 ,480 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
|
||||
{ 0x161 ,M_LIN15 ,320 ,400 ,40 ,50 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 , 80 ,400 , _VGA_PIXEL_DOUBLE },
|
||||
{ 0x162 ,M_LIN15 ,320 ,480 ,40 ,60 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 , 80 ,480 , _VGA_PIXEL_DOUBLE },
|
||||
{ 0x165 ,M_LIN15 ,640 ,400 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0x10000,200 ,449 ,160 ,400 ,0 },
|
||||
|
||||
{ 0x170 ,M_LIN16 ,320 ,240 ,40 ,30 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
|
||||
{ 0x171 ,M_LIN16 ,320 ,400 ,40 ,50 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE },
|
||||
{ 0x172 ,M_LIN16 ,320 ,480 ,40 ,60 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE },
|
||||
{ 0x175 ,M_LIN16 ,640 ,400 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 ,0 },
|
||||
{ 0x170 ,M_LIN16 ,320 ,240 ,40 ,30 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 , 80 ,480 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
|
||||
{ 0x171 ,M_LIN16 ,320 ,400 ,40 ,50 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 , 80 ,400 , _VGA_PIXEL_DOUBLE },
|
||||
{ 0x172 ,M_LIN16 ,320 ,480 ,40 ,60 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 , 80 ,480 , _VGA_PIXEL_DOUBLE },
|
||||
{ 0x175 ,M_LIN16 ,640 ,400 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0x10000,200 ,449 ,160 ,400 ,0 },
|
||||
|
||||
{ 0x190 ,M_LIN32 ,320 ,240 ,40 ,30 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
|
||||
{ 0x191 ,M_LIN32 ,320 ,400 ,40 ,50 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE },
|
||||
{ 0x192 ,M_LIN32 ,320 ,480 ,40 ,60 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE },
|
||||
{ 0x195 ,M_LIN32 ,640 ,400 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 ,0 },
|
||||
{ 0x190 ,M_LIN32 ,320 ,240 ,40 ,30 ,8 ,8 ,1 ,0xA0000 ,0x10000, 50 ,525 ,40 ,480 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
|
||||
{ 0x191 ,M_LIN32 ,320 ,400 ,40 ,50 ,8 ,8 ,1 ,0xA0000 ,0x10000, 50 ,449 ,40 ,400 , _VGA_PIXEL_DOUBLE },
|
||||
{ 0x192 ,M_LIN32 ,320 ,480 ,40 ,60 ,8 ,8 ,1 ,0xA0000 ,0x10000, 50 ,525 ,40 ,480 , _VGA_PIXEL_DOUBLE },
|
||||
|
||||
/* S3 specific modes */
|
||||
{ 0x207 ,M_LIN8 ,1152,864,160,64 ,8 ,16 ,1 ,0xA0000 ,0x10000,182 ,948 ,144,864 ,0 },
|
||||
{ 0x209 ,M_LIN15 ,1152,864,160,64 ,8 ,16 ,1 ,0xA0000 ,0x10000,364 ,948 ,288,864 ,0 },
|
||||
{ 0x20A ,M_LIN16 ,1152,864,160,64 ,8 ,16 ,1 ,0xA0000 ,0x10000,364 ,948 ,288,864 ,0 },
|
||||
//{ 0x20B ,M_LIN32 ,1152,864,160,64 ,8 ,16 ,1 ,0xA0000 ,0x10000,182 ,948 ,144,864 ,0 },
|
||||
{ 0x213 ,M_LIN32 ,640 ,400,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 ,0 },
|
||||
|
||||
/* Some custom modes */
|
||||
//{ 0x220 ,M_LIN32 ,1280,1024,160,64 ,8 ,16 ,1 ,0xA0000 ,0x10000,212 ,1066,160,1024,0 },
|
||||
// A nice 16:9 mode
|
||||
{ 0x222 ,M_LIN8 ,848 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,132 ,525 ,106 ,480 ,0 },
|
||||
{ 0x223 ,M_LIN15 ,848 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,264 ,525 ,212 ,480 ,0 },
|
||||
{ 0x224 ,M_LIN16 ,848 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,264 ,525 ,212 ,480 ,0 },
|
||||
{ 0x225 ,M_LIN32 ,848 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,132 ,525 ,106 ,480 ,0 },
|
||||
|
||||
{0xFFFF ,M_ERROR ,0 ,0 ,0 ,0 ,0 ,0 ,0 ,0x00000 ,0x0000 ,0 ,0 ,0 ,0 ,0 },
|
||||
};
|
||||
|
|
@ -515,6 +533,9 @@ bool INT10_SetVideoMode(Bitu mode) {
|
|||
if (mono_mode) crtc_base=0x3b4;
|
||||
else crtc_base=0x3d4;
|
||||
|
||||
// Disable MMIO here so we can read / write memory
|
||||
if (IS_VGA_ARCH) IO_Write(crtc_base,0x53);IO_Write(crtc_base+1,0x0);
|
||||
|
||||
/* Setup MISC Output Register */
|
||||
Bit8u misc_output=0x2 | (mono_mode ? 0x0 : 0x1);
|
||||
|
||||
|
|
@ -804,9 +825,7 @@ bool INT10_SetVideoMode(Bitu mode) {
|
|||
/* Setup Pixel format */
|
||||
switch (CurMode->type) {
|
||||
case M_LIN8:
|
||||
/* This should be 0x0 according to the specs but makes it easier to detect
|
||||
compared to normal vga modes now */
|
||||
misc_control_2=0x10;
|
||||
misc_control_2=0x00;
|
||||
break;
|
||||
case M_LIN15:
|
||||
misc_control_2=0x30;
|
||||
|
|
@ -939,7 +958,9 @@ att_text16:
|
|||
break;
|
||||
case M_VGA:
|
||||
case M_LIN8:
|
||||
case M_LIN15:
|
||||
case M_LIN16:
|
||||
case M_LIN32:
|
||||
for (i=0;i<16;i++) att_data[i]=i;
|
||||
att_data[0x10]=0x41; //Color Graphics 8-bit
|
||||
break;
|
||||
|
|
@ -993,7 +1014,9 @@ dac_text16:
|
|||
break;
|
||||
case M_VGA:
|
||||
case M_LIN8:
|
||||
case M_LIN15:
|
||||
case M_LIN16:
|
||||
case M_LIN32:
|
||||
for (i=0;i<256;i++) {
|
||||
IO_Write(0x3c9,vga_palette[i][0]);
|
||||
IO_Write(0x3c9,vga_palette[i][1]);
|
||||
|
|
@ -1056,10 +1079,51 @@ dac_text16:
|
|||
IO_Write(crtc_base+1,(Bit8u)(S3_LFB_BASE >> 24));
|
||||
IO_Write(crtc_base,0x5a);
|
||||
IO_Write(crtc_base+1,(Bit8u)(S3_LFB_BASE >> 16));
|
||||
IO_Write(crtc_base,0x6b); // BIOS scratchpad
|
||||
IO_Write(crtc_base+1,(Bit8u)(S3_LFB_BASE >> 24));
|
||||
|
||||
/* Setup some remaining S3 registers */
|
||||
Bitu reg_31;
|
||||
IO_Write(crtc_base,0x41); // BIOS scratchpad
|
||||
IO_Write(crtc_base+1,0x88);
|
||||
IO_Write(crtc_base,0x52); // extended BIOS scratchpad
|
||||
IO_Write(crtc_base+1,0x80);
|
||||
|
||||
// Accellerator setup
|
||||
Bitu reg_50=0;
|
||||
switch (CurMode->type) {
|
||||
case M_LIN4:
|
||||
case M_LIN15:
|
||||
case M_LIN16: reg_50|=0x10; break;
|
||||
case M_LIN32: reg_50|=0x30; break;
|
||||
}
|
||||
switch(CurMode->swidth)
|
||||
{
|
||||
case 640: reg_50|=0x40; break;
|
||||
case 800: reg_50|=0x80; break;
|
||||
case 1024: break;
|
||||
case 1152: reg_50|=0x01; break;
|
||||
case 1280: reg_50|=0xc1; break;
|
||||
}
|
||||
IO_WriteB(crtc_base,0x50); IO_WriteB(crtc_base+1,reg_50);
|
||||
|
||||
Bitu reg_31, reg_3a;
|
||||
switch (CurMode->type) {
|
||||
case M_LIN15:
|
||||
case M_LIN16:
|
||||
case M_LIN32:
|
||||
reg_3a=0x15;
|
||||
break;
|
||||
case M_LIN8:
|
||||
// S3VBE20 does it this way. The other double pixel bit does not
|
||||
// seem to have an effect on the Trio64.
|
||||
if(CurMode->special&_VGA_PIXEL_DOUBLE) reg_3a=0x5;
|
||||
else reg_3a=0x15;
|
||||
break;
|
||||
default:
|
||||
reg_3a=5;
|
||||
};
|
||||
|
||||
switch (CurMode->type) {
|
||||
case M_LIN4: // <- Theres a discrepance with real hardware on this
|
||||
case M_LIN8:
|
||||
case M_LIN15:
|
||||
case M_LIN16:
|
||||
|
|
@ -1070,9 +1134,9 @@ dac_text16:
|
|||
reg_31 = 0;
|
||||
break;
|
||||
}
|
||||
IO_Write(crtc_base,0x3a);IO_Write(crtc_base+1,reg_3a);
|
||||
IO_Write(crtc_base,0x31);IO_Write(crtc_base+1,reg_31); //Enable banked memory and 256k+ access
|
||||
IO_Write(crtc_base,0x58);IO_Write(crtc_base+1,0x3); //Enable 8 mb of linear addressing
|
||||
IO_Write(crtc_base,0x53);IO_Write(crtc_base+1,0x0); //Disable MMIO
|
||||
|
||||
IO_Write(crtc_base,0x38);IO_Write(crtc_base+1,0x48); //Register lock 1
|
||||
IO_Write(crtc_base,0x39);IO_Write(crtc_base+1,0xa5); //Register lock 2
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: int10_vesa.cpp,v 1.29 2007-09-24 20:50:40 c2woody Exp $ */
|
||||
/* $Id: int10_vesa.cpp,v 1.30 2007-12-10 22:11:13 c2woody Exp $ */
|
||||
|
||||
#include <string.h>
|
||||
#include <stddef.h>
|
||||
|
|
@ -115,7 +115,7 @@ Bit8u VESA_GetSVGAInformation(Bit16u seg,Bit16u off) {
|
|||
}
|
||||
mem_writed(buffer+0x0a,0x0); //Capabilities and flags
|
||||
mem_writed(buffer+0x0e,int10.rom.vesa_modes); //VESA Mode list
|
||||
mem_writew(buffer+0x12,32); //32 64kb blocks for 2 mb memory
|
||||
mem_writew(buffer+0x12,Bit16u(VGA_MEMORY/(64*1024))); // memory size in 64kb blocks
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
|
|
@ -124,6 +124,7 @@ Bit8u VESA_GetSVGAModeInformation(Bit16u mode,Bit16u seg,Bit16u off) {
|
|||
memset(&minfo,0,sizeof(minfo));
|
||||
PhysPt buf=PhysMake(seg,off);
|
||||
Bitu pageSize;
|
||||
Bit8u modeAttributes;
|
||||
Bitu i=0;
|
||||
|
||||
mode&=0x3fff; // vbe2 compatible, ignore lfb and keep screen content bits
|
||||
|
|
@ -138,27 +139,33 @@ foundit:
|
|||
case M_LIN4:
|
||||
pageSize = mblock->sheight * mblock->swidth/2;
|
||||
pageSize = (pageSize | 15) & ~ 15;
|
||||
var_write(&minfo.NumberOfImagePages,(512*1024 / pageSize)-1);
|
||||
var_write(&minfo.BytesPerScanLine,mblock->swidth/8);
|
||||
var_write(&minfo.NumberOfPlanes,0x4);
|
||||
var_write(&minfo.BitsPerPixel,4);
|
||||
var_write(&minfo.MemoryModel,3); //ega planar mode
|
||||
var_write(&minfo.ModeAttributes,0x1b); //Color, graphics, no linear buffer
|
||||
modeAttributes = 0x1b; // Color, graphics, no linear buffer
|
||||
|
||||
if(pageSize > 512*1024) { // this limitation is not on the real card
|
||||
var_write(&minfo.ModeAttributes, modeAttributes & ~0x1);
|
||||
var_write(&minfo.NumberOfImagePages,0);
|
||||
} else {
|
||||
var_write(&minfo.ModeAttributes, modeAttributes);
|
||||
Bitu pages = (512*1024 / pageSize)-1;
|
||||
var_write(&minfo.NumberOfImagePages,pages);
|
||||
}
|
||||
break;
|
||||
case M_LIN8:
|
||||
pageSize = mblock->sheight * mblock->swidth;
|
||||
pageSize = (pageSize | 15) & ~ 15;
|
||||
var_write(&minfo.NumberOfImagePages,(2*1024*1024 / pageSize)-1);
|
||||
var_write(&minfo.BytesPerScanLine,mblock->swidth);
|
||||
var_write(&minfo.NumberOfPlanes,0x1);
|
||||
var_write(&minfo.BitsPerPixel,8);
|
||||
var_write(&minfo.MemoryModel,4); //packed pixel
|
||||
var_write(&minfo.ModeAttributes,0x9b); //Color, graphics, linear buffer
|
||||
modeAttributes = 0x9b; // Color, graphics, linear buffer
|
||||
break;
|
||||
case M_LIN15:
|
||||
pageSize = mblock->sheight * mblock->swidth*2;
|
||||
pageSize = (pageSize | 15) & ~ 15;
|
||||
var_write(&minfo.NumberOfImagePages,(2*1024*1024 / pageSize)-1);
|
||||
var_write(&minfo.BytesPerScanLine,mblock->swidth*2);
|
||||
var_write(&minfo.NumberOfPlanes,0x1);
|
||||
var_write(&minfo.BitsPerPixel,15);
|
||||
|
|
@ -171,12 +178,11 @@ foundit:
|
|||
var_write(&minfo.BlueMaskPos,0);
|
||||
var_write(&minfo.ReservedMaskSize,0x01);
|
||||
var_write(&minfo.ReservedMaskPos,0x0f);
|
||||
var_write(&minfo.ModeAttributes,0x9b); //Color, graphics, linear buffer
|
||||
modeAttributes = 0x9b; // Color, graphics, linear buffer
|
||||
break;
|
||||
case M_LIN16:
|
||||
pageSize = mblock->sheight * mblock->swidth*2;
|
||||
pageSize = (pageSize | 15) & ~ 15;
|
||||
var_write(&minfo.NumberOfImagePages,(2*1024*1024 / pageSize)-1);
|
||||
var_write(&minfo.BytesPerScanLine,mblock->swidth*2);
|
||||
var_write(&minfo.NumberOfPlanes,0x1);
|
||||
var_write(&minfo.BitsPerPixel,16);
|
||||
|
|
@ -187,12 +193,11 @@ foundit:
|
|||
var_write(&minfo.GreenMaskPos,5);
|
||||
var_write(&minfo.BlueMaskSize,5);
|
||||
var_write(&minfo.BlueMaskPos,0);
|
||||
var_write(&minfo.ModeAttributes,0x9b); //Color, graphics, linear buffer
|
||||
modeAttributes = 0x9b; // Color, graphics, linear buffer
|
||||
break;
|
||||
case M_LIN32:
|
||||
pageSize = mblock->sheight * mblock->swidth*4;
|
||||
pageSize = (pageSize | 15) & ~ 15;
|
||||
var_write(&minfo.NumberOfImagePages,(2*1024*1024 / pageSize)-1);
|
||||
var_write(&minfo.BytesPerScanLine,mblock->swidth*4);
|
||||
var_write(&minfo.NumberOfPlanes,0x1);
|
||||
var_write(&minfo.BitsPerPixel,32);
|
||||
|
|
@ -205,22 +210,33 @@ foundit:
|
|||
var_write(&minfo.BlueMaskPos,0x0);
|
||||
var_write(&minfo.ReservedMaskSize,0x8);
|
||||
var_write(&minfo.ReservedMaskPos,0x18);
|
||||
var_write(&minfo.ModeAttributes,0x9b); //Color, graphics, linear buffer
|
||||
modeAttributes = 0x9b; // Color, graphics, linear buffer
|
||||
break;
|
||||
/* case M_TEXT:
|
||||
pageSize = mblock->sheight/8 * mblock->swidth*2/8;
|
||||
pageSize = (pageSize | 15) & ~ 15;
|
||||
var_write(&minfo.NumberOfImagePages,(2*1024*1024 / pageSize)-1);
|
||||
var_write(&minfo.BytesPerScanLine,mblock->swidth*2/8);
|
||||
var_write(&minfo.NumberOfPlanes,0x4);
|
||||
var_write(&minfo.BitsPerPixel,4);
|
||||
var_write(&minfo.MemoryModel,0); //Text
|
||||
var_write(&minfo.ModeAttributes,0x0f); //Color, text, bios output
|
||||
modeAttributes = 0x0f; //Color, text, bios output
|
||||
break; */
|
||||
default:
|
||||
return 0x1;
|
||||
}
|
||||
var_write(&minfo.WinAAttributes,0x7); //Exists/readable/writable
|
||||
var_write(&minfo.WinAAttributes,0x7); // Exists/readable/writable
|
||||
|
||||
if(mblock->type != M_LIN4)
|
||||
if(pageSize > VGA_MEMORY) {
|
||||
// Mode not supported by current hardware configuration
|
||||
var_write(&minfo.ModeAttributes, modeAttributes & ~0x1);
|
||||
var_write(&minfo.NumberOfImagePages,0);
|
||||
} else {
|
||||
var_write(&minfo.ModeAttributes, modeAttributes);
|
||||
Bitu pages = (VGA_MEMORY / pageSize)-1;
|
||||
var_write(&minfo.NumberOfImagePages,pages);
|
||||
}
|
||||
|
||||
if (mblock->type==M_TEXT) {
|
||||
var_write(&minfo.WinGranularity,32);
|
||||
var_write(&minfo.WinSize,32);
|
||||
|
|
@ -333,15 +349,17 @@ Bit8u VESA_ScanLineLength(Bit8u subcall,Bit16u val, Bit16u & bytes,Bit16u & pixe
|
|||
}
|
||||
switch (subcall) {
|
||||
case 0x00: /* Set in pixels */
|
||||
vga.config.scan_len = (val * bpp);
|
||||
if(CurMode->type==M_LIN4) vga.config.scan_len=val/2;
|
||||
else vga.config.scan_len = (val * bpp);
|
||||
break;
|
||||
case 0x02: /* Set in bytes */
|
||||
vga.config.scan_len = val;
|
||||
if(CurMode->type==M_LIN4) vga.config.scan_len = val*4;
|
||||
else vga.config.scan_len = val;
|
||||
break;
|
||||
case 0x03: /* Get maximum */
|
||||
bytes=0x400*4;
|
||||
pixels=bytes/bpp;
|
||||
lines = 2*1024*1024 / bytes;
|
||||
lines = VGA_MEMORY / bytes;
|
||||
return 0x00;
|
||||
case 0x01: /* Get lengths */
|
||||
break;
|
||||
|
|
@ -354,9 +372,16 @@ Bit8u VESA_ScanLineLength(Bit8u subcall,Bit16u val, Bit16u & bytes,Bit16u & pixe
|
|||
vga.config.scan_len += 8;
|
||||
vga.config.scan_len /= 8;
|
||||
}
|
||||
pixels=(vga.config.scan_len*8)/bpp;
|
||||
bytes=vga.config.scan_len*8;
|
||||
lines = 2*1024*1024 / bytes;
|
||||
if(CurMode->type==M_LIN4) {
|
||||
pixels=(vga.config.scan_len*16)/bpp;
|
||||
bytes=vga.config.scan_len*2;
|
||||
lines = Bit16u(VGA_MEMORY /( bytes*4));
|
||||
}
|
||||
else {
|
||||
pixels=(vga.config.scan_len*8)/bpp;
|
||||
bytes=vga.config.scan_len*8;
|
||||
lines = Bit16u(VGA_MEMORY / bytes);
|
||||
}
|
||||
VGA_StartResize();
|
||||
return 0x0;
|
||||
}
|
||||
|
|
@ -366,7 +391,7 @@ Bit8u VESA_SetDisplayStart(Bit16u x,Bit16u y) {
|
|||
Bitu start;
|
||||
switch (CurMode->type) {
|
||||
case M_LIN4:
|
||||
start=vga.config.scan_len*8*y+x;
|
||||
start=vga.config.scan_len*16*y+x;
|
||||
vga.config.display_start=start/8;
|
||||
IO_Read(0x3da);
|
||||
IO_Write(0x3c0,0x13+32);
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue