fix some bugs+enhance the s3/xga emulation (hal)
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@3059
This commit is contained in:
parent
f87fc49809
commit
0dba278956
11 changed files with 728 additions and 484 deletions
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@ -16,7 +16,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: memory.cpp,v 1.52 2007-09-29 13:23:59 c2woody Exp $ */
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/* $Id: memory.cpp,v 1.53 2007-12-10 22:11:13 c2woody Exp $ */
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#include "dosbox.h"
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#include "mem.h"
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@ -48,6 +48,7 @@ static struct MemoryBlock {
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Bitu end_page;
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Bitu pages;
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PageHandler *handler;
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PageHandler *mmiohandler;
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} lfb;
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struct {
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bool enabled;
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@ -122,8 +123,9 @@ static IllegalPageHandler illegal_page_handler;
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static RAMPageHandler ram_page_handler;
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static ROMPageHandler rom_page_handler;
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void MEM_SetLFB(Bitu page, Bitu pages, PageHandler *handler) {
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void MEM_SetLFB(Bitu page, Bitu pages, PageHandler *handler, PageHandler *mmiohandler) {
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memory.lfb.handler=handler;
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memory.lfb.mmiohandler=mmiohandler;
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memory.lfb.start_page=page;
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memory.lfb.end_page=page+pages;
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memory.lfb.pages=pages;
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@ -135,6 +137,9 @@ PageHandler * MEM_GetPageHandler(Bitu phys_page) {
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return memory.phandlers[phys_page];
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} else if ((phys_page>=memory.lfb.start_page) && (phys_page<memory.lfb.end_page)) {
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return memory.lfb.handler;
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} else if ((phys_page>=memory.lfb.start_page+0x01000000/4096) &&
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(phys_page<memory.lfb.start_page+0x01000000/4096+16)) {
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return memory.lfb.mmiohandler;
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}
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return &illegal_page_handler;
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}
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@ -16,6 +16,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: vga.cpp,v 1.31 2007-12-10 22:11:13 c2woody Exp $ */
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#include "dosbox.h"
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//#include "setup.h"
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@ -48,26 +49,29 @@ void VGA_SetMode(VGAModes mode) {
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void VGA_DetermineMode(void) {
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/* Test for VGA output active or direct color modes */
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if (vga.s3.misc_control_2 & 0xf0) {
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switch (vga.s3.misc_control_2 >> 4) {
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case 1:VGA_SetMode(M_LIN8);break;
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case 3:VGA_SetMode(M_LIN15);break;
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case 5:VGA_SetMode(M_LIN16);break;
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case 13:VGA_SetMode(M_LIN32);break;
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switch (vga.s3.misc_control_2 >> 4) {
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case 0:
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if (vga.attr.mode_control & 1) { // graphics mode
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if (IS_VGA_ARCH && (vga.gfx.mode & 0x40)) {
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// access above 256k?
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if (vga.s3.reg_31 & 0x8) VGA_SetMode(M_LIN8);
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else VGA_SetMode(M_VGA);
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}
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else if (vga.gfx.mode & 0x20) VGA_SetMode(M_CGA4);
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else if ((vga.gfx.miscellaneous & 0x0c)==0x0c) VGA_SetMode(M_CGA2);
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else {
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// access above 256k?
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if (vga.s3.reg_31 & 0x8) VGA_SetMode(M_LIN4);
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else VGA_SetMode(M_EGA);
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}
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} else {
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VGA_SetMode(M_TEXT);
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}
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/* Test for graphics or alphanumeric mode */
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} else if (vga.attr.mode_control & 1) {
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if (IS_VGA_ARCH && (vga.gfx.mode & 0x40)) VGA_SetMode(M_VGA);
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else if (vga.gfx.mode & 0x20) VGA_SetMode(M_CGA4);
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else if ((vga.gfx.miscellaneous & 0x0c)==0x0c) VGA_SetMode(M_CGA2);
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else {
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if (vga.s3.reg_31 & 0x8)
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VGA_SetMode(M_LIN4);
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else
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VGA_SetMode(M_EGA);
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}
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} else {
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VGA_SetMode(M_TEXT);
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break;
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case 1:VGA_SetMode(M_LIN8);break;
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case 3:VGA_SetMode(M_LIN15);break;
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case 5:VGA_SetMode(M_LIN16);break;
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case 13:VGA_SetMode(M_LIN32);break;
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}
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}
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@ -16,7 +16,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: vga_draw.cpp,v 1.88 2007-12-09 17:02:55 c2woody Exp $ */
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/* $Id: vga_draw.cpp,v 1.89 2007-12-10 22:11:13 c2woody Exp $ */
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#include <string.h>
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#include <math.h>
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@ -207,7 +207,7 @@ static Bit8u * VGA_Draw_Chain_Line(Bitu vidstart, Bitu line) {
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static Bit8u * VGA_Draw_VGA_Line_HWMouse( Bitu vidstart, Bitu line) {
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if(vga.s3.hgc.curmode & 0x1) {
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Bitu lineat = vidstart / vga.draw.width;
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Bitu lineat = (vidstart-(vga.config.real_start<<2)) / vga.draw.width;
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if((lineat < vga.s3.hgc.originy) || (lineat > (vga.s3.hgc.originy + 63U))) {
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return &vga.mem.linear[ vidstart ];
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} else {
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@ -267,7 +267,7 @@ static Bit8u * VGA_Draw_VGA_Line_HWMouse( Bitu vidstart, Bitu line) {
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static Bit8u * VGA_Draw_LIN16_Line_HWMouse(Bitu vidstart, Bitu line) {
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if(vga.s3.hgc.curmode & 0x1) {
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Bitu lineat = (vidstart >> 1) / vga.draw.width;
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Bitu lineat = ((vidstart-(vga.config.real_start<<2)) >> 1) / vga.draw.width;
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if((lineat < vga.s3.hgc.originy) || (lineat > (vga.s3.hgc.originy + 63U))) {
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return &vga.mem.linear[ vidstart ];
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} else {
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@ -330,7 +330,7 @@ static Bit8u * VGA_Draw_LIN16_Line_HWMouse(Bitu vidstart, Bitu line) {
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static Bit8u * VGA_Draw_LIN32_Line_HWMouse(Bitu vidstart, Bitu line) {
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if(vga.s3.hgc.curmode & 0x1) {
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Bitu lineat = (vidstart >> 2) / vga.draw.width;
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Bitu lineat = ((vidstart-(vga.config.real_start<<2)) >> 2) / vga.draw.width;
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if((lineat < vga.s3.hgc.originy) || (lineat > (vga.s3.hgc.originy + 63U))) {
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return &vga.mem.linear[ vidstart ];
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} else {
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@ -379,7 +379,7 @@ static Bit8u * VGA_Draw_LIN32_Line_HWMouse(Bitu vidstart, Bitu line) {
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TempLine[xat] = ~TempLine[xat];
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TempLine[xat+1] = ~TempLine[xat+1];
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TempLine[xat+2] = ~TempLine[xat+2];
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TempLine[xat+2] = ~TempLine[xat+3];
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TempLine[xat+3] = ~TempLine[xat+3];
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break;
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}
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xat+=4;
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@ -586,7 +586,7 @@ skip_cursor:
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static void VGA_VerticalDisplayEnd(Bitu val) {
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// vga.config.retrace=true;
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vga.config.real_start=vga.config.display_start & ((2*1024*1024)-1);
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vga.config.real_start=vga.config.display_start & ((VGA_MEMORY)-1);
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}
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static void VGA_HorizontalTimer(void) {
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@ -909,53 +909,60 @@ void VGA_SetupDrawing(Bitu val) {
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Bitu htotal, hdend, hbstart, hbend, hrstart, hrend;
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Bitu vtotal, vdend, vbstart, vbend, vrstart, vrend;
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if (IS_EGAVGA_ARCH) {
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htotal = 2 + vga.crtc.horizontal_total;
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if (IS_VGA_ARCH) htotal += 3;
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hdend = 1 + vga.crtc.horizontal_display_end;
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hbstart = vga.crtc.start_horizontal_blanking;
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htotal = vga.crtc.horizontal_total;
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hdend = vga.crtc.horizontal_display_end;
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hbend = vga.crtc.end_horizontal_blanking&0x1F;
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if (IS_VGA_ARCH) hbend |= (vga.crtc.end_horizontal_retrace&0x80)>>2;
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hbend = hbstart + ((hbend - hbstart) & 0x3F);
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hbstart = vga.crtc.start_horizontal_blanking;
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hrstart = vga.crtc.start_horizontal_retrace;
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hrend = vga.crtc.end_horizontal_retrace & 0x1f;
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hrend = (hrend - hrstart) & 0x1f;
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if ( !hrend )
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hrend = hrstart + 0x1f + 1;
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else
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hrend = hrstart + hrend;
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vtotal= 2 + vga.crtc.vertical_total | ((vga.crtc.overflow & 1) << 8);
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vdend = 1 + vga.crtc.vertical_display_end | ((vga.crtc.overflow & 2)<<7);
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vtotal= vga.crtc.vertical_total | ((vga.crtc.overflow & 1) << 8);
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vdend = vga.crtc.vertical_display_end | ((vga.crtc.overflow & 2)<<7);
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vbstart = vga.crtc.start_vertical_blanking | ((vga.crtc.overflow & 0x08) << 5);
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vrstart = vga.crtc.vertical_retrace_start + ((vga.crtc.overflow & 0x04) << 6);
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if (IS_VGA_ARCH) {
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// additional bits only present on vga cards
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htotal |= (vga.s3.ex_hor_overflow & 0x1) << 8;
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htotal += 3;
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hdend |= (vga.s3.ex_hor_overflow & 0x2) << 7;
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hbend |= (vga.crtc.end_horizontal_retrace&0x80) >> 2;
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hbstart |= (vga.s3.ex_hor_overflow & 0x4) << 6;
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hrstart |= (vga.s3.ex_hor_overflow & 0x10) << 4;
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vtotal |= (vga.crtc.overflow & 0x20) << 4;
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vdend |= ((vga.crtc.overflow & 0x40) << 3) |
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((vga.s3.ex_ver_overflow & 0x2) << 9);
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vtotal |= (vga.s3.ex_ver_overflow & 0x1) << 10;
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vdend |= (vga.crtc.overflow & 0x40) << 3;
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vdend |= (vga.s3.ex_ver_overflow & 0x2) << 9;
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vbstart |= (vga.crtc.maximum_scan_line & 0x20) << 4;
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vbstart |= (vga.s3.ex_ver_overflow & 0x4) << 8;
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vrstart |= ((vga.crtc.overflow & 0x80) << 2);
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}
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vrend = vga.crtc.vertical_retrace_end & 0xF;
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vrend = ( vrend - vrstart)&0xF;
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if ( !vrend)
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vrend = vrstart + 0xf + 1;
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else
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vrend = vrstart + vrend;
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vbstart = vga.crtc.start_vertical_blanking | ((vga.crtc.overflow & 0x08) << 5);
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if (IS_VGA_ARCH) {
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vbstart |= ((vga.crtc.maximum_scan_line & 0x20) << 4);
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vrstart |= (vga.s3.ex_ver_overflow & 0x10) << 6;
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vbend = vga.crtc.end_vertical_blanking & 0x3f;
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} else {
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vbend = vga.crtc.end_vertical_blanking & 0xf;
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}
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vbend = (vbend - vbstart) & 0x3f;
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if ( !vbend)
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vbend = vbstart + 0x3f + 1;
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else
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vbend = vbstart + vbend;
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htotal += 2;
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vtotal += 2;
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hdend += 1;
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vdend += 1;
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hbend = hbstart + ((hbend - hbstart) & 0x3F);
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hrend = vga.crtc.end_horizontal_retrace & 0x1f;
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hrend = (hrend - hrstart) & 0x1f;
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if ( !hrend ) hrend = hrstart + 0x1f + 1;
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else hrend = hrstart + hrend;
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vrend = vga.crtc.vertical_retrace_end & 0xF;
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vrend = ( vrend - vrstart)&0xF;
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if ( !vrend) vrend = vrstart + 0xf + 1;
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else vrend = vrstart + vrend;
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vbend = (vbend - vbstart) & 0x3f;
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if ( !vbend) vbend = vbstart + 0x3f + 1;
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else vbend = vbstart + vbend;
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switch (svgaCard) {
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case SVGA_S3Trio:
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clock = SVGA_S3_GetClock();
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} else VGA_DrawLine = VGA_Draw_Linear_Line;
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break;
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case M_LIN8:
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case M_LIN15:
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case M_LIN16:
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case M_LIN32:
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width<<=3;
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if (vga.crtc.mode_control & 0x8) {
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doublewidth = true;
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width >>= 1;
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if (vga.crtc.mode_control & 0x8)
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width >>=1;
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else if(!(vga.s3.reg_3a&0x10)) {
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doublewidth=true;
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width >>=1;
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}
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// fall-through
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case M_LIN32:
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width<<=1;
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// fall-through
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case M_LIN15:
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case M_LIN16:
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// 15/16 bpp modes double the horizontal values
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width<<=2;
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if (vga.crtc.mode_control & 0x8)
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doublewidth = true;
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/* Use HW mouse cursor drawer if enabled */
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VGA_ActivateHardwareCursor();
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break;
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@ -1194,7 +1209,7 @@ void VGA_SetupDrawing(Bitu val) {
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aspect_ratio=1.0;
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vga.draw.blocks=width;
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doublewidth=(vga.seq.clocking_mode & 0x8) > 0;
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if ((IS_VGA_ARCH) && (svgaCard==SVGA_None) && (vga.seq.clocking_mode&0x01)) {
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if ((IS_VGA_ARCH) && (svgaCard==SVGA_None) && !(vga.seq.clocking_mode&0x01)) {
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width*=9; /* 9 bit wide text font */
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VGA_DrawLine=VGA_TEXT_Xlat16_Draw_Line_9;
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bpp=16;
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@ -16,7 +16,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: vga_memory.cpp,v 1.44 2007-10-20 16:01:40 c2woody Exp $ */
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/* $Id: vga_memory.cpp,v 1.45 2007-12-10 22:11:13 c2woody Exp $ */
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#include <stdlib.h>
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#include <string.h>
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@ -574,81 +574,39 @@ public:
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}
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};
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extern void XGA_Write(Bitu port, Bitu val, Bitu len);
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extern Bitu XGA_Read(Bitu port, Bitu len);
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class VGA_MMIO_Handler : public PageHandler {
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public:
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Bit16u regmem[16384];
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VGA_MMIO_Handler() {
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flags=PFLAG_NOCODE;
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//memset(®mem[0], 0, sizeof(regmem));
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}
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void writeb(PhysPt addr,Bitu val) {
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Bitu port = PAGING_GetPhysicalAddress(addr) & 0xffff;
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if(port >= 0x82E8) IO_WriteB(port, val);
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if(port <= 0x4000) {
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if(port == 0x0000) {
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IO_WriteB(0xe2e0, val);
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} else {
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IO_WriteB(0xe2e8, val);
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}
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}
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//LOG_MSG("MMIO: Write byte to %x with %x", addr, val);
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XGA_Write(port, val, 1);
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}
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void writew(PhysPt addr,Bitu val) {
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Bitu port = PAGING_GetPhysicalAddress(addr) & 0xffff;
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if(port >= 0x82E8) IO_WriteW(port, val);
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if(port == 0x8118) IO_WriteW(0x9ae8, val);
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if(port <= 0x4000) {
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if(port == 0x0000) {
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IO_WriteW(0xe2e0, val);
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} else {
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IO_WriteW(0xe2e8, val);
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}
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}
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//LOG_MSG("MMIO: Write word to %x with %x", addr, val);
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XGA_Write(port, val, 2);
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}
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void writed(PhysPt addr,Bitu val) {
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Bitu port = PAGING_GetPhysicalAddress(addr) & 0xffff;
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if(port >= 0x82E8) IO_WriteD(port, val);
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if(port == 0x8100) {
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IO_WriteW(0x86e8, (val >> 16));
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IO_WriteW(0x82e8, (val & 0xffff));
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}
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if(port == 0x8148) {
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IO_WriteW(0x96e8, (val >> 16));
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IO_WriteW(0xbee8, (val & 0xffff));
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}
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if(port <= 0x4000) {
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if(port == 0x0000) {
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IO_WriteW(0xe2e0, (val & 0xffff));
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IO_WriteW(0xe2e8, (val >> 16));
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} else {
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IO_WriteW(0xe2e8, (val & 0xffff));
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IO_WriteW(0xe2e8, (val >> 16));
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}
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}
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//LOG_MSG("MMIO: Write dword to %x with %x", addr, val);
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XGA_Write(port, val, 4);
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}
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Bitu readb(PhysPt addr) {
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Bitu port = PAGING_GetPhysicalAddress(addr) & 0xffff;
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if(port >= 0x82E8) return IO_ReadB(port);
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//LOG_MSG("MMIO: Read byte from %x", addr);
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return 0x00;
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return XGA_Read(port, 1);
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}
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Bitu readw(PhysPt addr) {
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Bitu port = PAGING_GetPhysicalAddress(addr) & 0xffff;
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if(port >= 0x82E8) return IO_ReadW(port);
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//LOG_MSG("MMIO: Read word from %x", addr);
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return 0x00;
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return XGA_Read(port, 2);
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}
|
||||
Bitu readd(PhysPt addr) {
|
||||
Bitu port = PAGING_GetPhysicalAddress(addr) & 0xffff;
|
||||
if(port >= 0x82E8) return IO_ReadD(port);
|
||||
//LOG_MSG("MMIO: Read dword from %x", addr);
|
||||
return 0x00;
|
||||
return XGA_Read(port, 4);
|
||||
}
|
||||
|
||||
};
|
||||
|
||||
class VGA_TANDY_PageHandler : public PageHandler {
|
||||
|
@ -845,7 +803,7 @@ void VGA_SetupHandlers(void) {
|
|||
MEM_ResetPageHandler( VGA_PAGE_B0, 8 );
|
||||
break;
|
||||
}
|
||||
if(((vga.s3.ext_mem_ctrl & 0x10) != 0x00) /*&& (vga.mode == M_LIN8)*/)
|
||||
if(vga.s3.ext_mem_ctrl & 0x10)
|
||||
MEM_SetPageHandler(VGA_PAGE_A0, 16, &vgaph.mmio);
|
||||
range_done:
|
||||
PAGING_ClearTLB();
|
||||
|
@ -859,18 +817,9 @@ void VGA_StartUpdateLFB(void) {
|
|||
#else
|
||||
vga.lfb.handler = &vgaph.lfbchanges;
|
||||
#endif
|
||||
MEM_SetLFB(vga.s3.la_window << 4 ,VGA_MEMORY/4096, vga.lfb.handler );
|
||||
MEM_SetLFB(vga.s3.la_window << 4 ,VGA_MEMORY/4096, vga.lfb.handler, &vgaph.mmio);
|
||||
}
|
||||
|
||||
void VGA_MapMMIO(void) {
|
||||
MEM_SetPageHandler(VGA_PAGE_A0, 16, &vgaph.mmio);
|
||||
}
|
||||
|
||||
void VGA_UnmapMMIO(void) {
|
||||
//MEM_SetPageHandler(VGA_PAGE_A0, &ram_page_handler);
|
||||
}
|
||||
|
||||
|
||||
void VGA_SetupMemory() {
|
||||
// allocate 16byte-aligned memory
|
||||
vga.mem.linear = new Bit8u[VGA_MEMORY+16];
|
||||
|
|
|
@ -16,7 +16,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: vga_misc.cpp,v 1.35 2007-10-13 16:34:06 c2woody Exp $ */
|
||||
/* $Id: vga_misc.cpp,v 1.36 2007-12-10 22:11:13 c2woody Exp $ */
|
||||
|
||||
#include "dosbox.h"
|
||||
#include "inout.h"
|
||||
|
@ -30,7 +30,7 @@ Bitu vga_read_p3d4(Bitu port,Bitu iolen);
|
|||
void vga_write_p3d5(Bitu port,Bitu val,Bitu iolen);
|
||||
Bitu vga_read_p3d5(Bitu port,Bitu iolen);
|
||||
|
||||
static Bitu vga_read_p3da(Bitu port,Bitu iolen) {
|
||||
Bitu vga_read_p3da(Bitu port,Bitu iolen) {
|
||||
vga.internal.attrindex=false;
|
||||
vga.tandy.pcjr_flipflop=false;
|
||||
Bit8u retval=0;
|
||||
|
|
|
@ -16,7 +16,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: vga_s3.cpp,v 1.8 2007-06-28 16:02:27 c2woody Exp $ */
|
||||
/* $Id: vga_s3.cpp,v 1.9 2007-12-10 22:11:13 c2woody Exp $ */
|
||||
|
||||
#include "dosbox.h"
|
||||
#include "inout.h"
|
||||
|
@ -70,9 +70,15 @@ void SVGA_S3_WriteCRTC(Bitu reg,Bitu val,Bitu iolen) {
|
|||
case 0x39: /* CR39 Register Lock 2 */
|
||||
vga.s3.reg_lock2=val;
|
||||
break;
|
||||
case 0x3a:
|
||||
vga.s3.reg_3a = val;
|
||||
break;
|
||||
case 0x40: /* CR40 System Config */
|
||||
vga.s3.reg_40 = val;
|
||||
break;
|
||||
case 0x41: /* CR41 BIOS flags */
|
||||
vga.s3.reg_41 = val;
|
||||
break;
|
||||
case 0x43: /* CR43 Extended Mode */
|
||||
vga.s3.reg_43=val & ~0x4;
|
||||
if (((val & 0x4) ^ (vga.config.scan_len >> 6)) & 0x4) {
|
||||
|
@ -114,17 +120,22 @@ void SVGA_S3_WriteCRTC(Bitu reg,Bitu val,Bitu iolen) {
|
|||
vga.s3.hgc.bstackpos++;
|
||||
break;
|
||||
case 0x4c: /* HGC start address high byte*/
|
||||
vga.s3.hgc.startaddr = vga.s3.hgc.startaddr | ((val & 0xff) << 8);
|
||||
vga.s3.hgc.startaddr &=0xff;
|
||||
vga.s3.hgc.startaddr |= ((val & 0xf) << 8);
|
||||
break;
|
||||
case 0x4d: /* HGC start address low byte*/
|
||||
vga.s3.hgc.startaddr = vga.s3.hgc.startaddr | (val & 0xff);
|
||||
vga.s3.hgc.startaddr &=0xff00;
|
||||
vga.s3.hgc.startaddr |= (val & 0xff);
|
||||
break;
|
||||
case 0x4e: /* HGC pattern start X */
|
||||
vga.s3.hgc.posx = val;
|
||||
break;
|
||||
case 0x4f: /* HGC pattern start X */
|
||||
case 0x4f: /* HGC pattern start Y */
|
||||
vga.s3.hgc.posy = val;
|
||||
break;
|
||||
case 0x50: // Extended System Control 1
|
||||
vga.s3.reg_50 = val;
|
||||
break;
|
||||
case 0x51: /* Extended System Control 2 */
|
||||
vga.s3.reg_51=val & 0xc0; //Only store bits 6,7
|
||||
//TODO Display start
|
||||
|
@ -161,17 +172,17 @@ void SVGA_S3_WriteCRTC(Bitu reg,Bitu val,Bitu iolen) {
|
|||
7 (not 864/964) Enable EPROM Write. If set enables flash memory write
|
||||
control to the BIOS ROM address
|
||||
*/
|
||||
case 0x52: // Extended System Control 1
|
||||
vga.s3.reg_52 = val;
|
||||
break;
|
||||
case 0x53:
|
||||
if((val & 0x10) != (vga.s3.ext_mem_ctrl & 0x10)) {
|
||||
/* Map or unmap MMIO */
|
||||
if ((val & 0x10) != 0) {
|
||||
//LOG_MSG("VGA: Mapping Memory Mapped I/O to 0xA0000");
|
||||
// VGA_MapMMIO();
|
||||
} else {
|
||||
// VGA_UnmapMMIO();
|
||||
}
|
||||
// Map or unmap MMIO
|
||||
// bit 4 = MMIO at A0000
|
||||
// bit 3 = MMIO at LFB + 16M (should be fine if its always enabled for now)
|
||||
if(vga.s3.ext_mem_ctrl!=val) {
|
||||
vga.s3.ext_mem_ctrl = val;
|
||||
VGA_SetupHandlers();
|
||||
}
|
||||
vga.s3.ext_mem_ctrl = val;
|
||||
break;
|
||||
case 0x55: /* Extended Video DAC Control */
|
||||
vga.s3.reg_55=val;
|
||||
|
@ -302,6 +313,9 @@ void SVGA_S3_WriteCRTC(Bitu reg,Bitu val,Bitu iolen) {
|
|||
vga.s3.svga_bank.b.bank=val & 0x3f;
|
||||
VGA_SetupHandlers();
|
||||
break;
|
||||
case 0x6b: // BIOS scratchpad: LFB adress
|
||||
vga.s3.reg_6b=(Bit8u)val;
|
||||
break;
|
||||
default:
|
||||
LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:S3:CRTC:Write to illegal index %2X", reg );
|
||||
break;
|
||||
|
@ -317,38 +331,56 @@ Bitu SVGA_S3_ReadCRTC( Bitu reg, Bitu iolen) {
|
|||
return 0x11;
|
||||
//Trio 64 id
|
||||
case 0x2f: /* Revision */
|
||||
return 0x00;
|
||||
return 0x44;
|
||||
case 0x30: /* CR30 Chip ID/REV register */
|
||||
return 0xe0; //Trio+ dual byte
|
||||
// Trio32/64 has 0xe0. extended
|
||||
return 0xe1; //Trio+ dual byte
|
||||
//return 0xc0; // 864
|
||||
|
||||
case 0x31: /* CR31 Memory Configuration */
|
||||
//TODO mix in bits from baseaddress;
|
||||
return vga.s3.reg_31;
|
||||
case 0x35: /* CR35 CRT Register Lock */
|
||||
return vga.s3.reg_35|(vga.s3.svga_bank.b.bank & 0xf);
|
||||
case 0x36: /* CR36 Reset State Read 1 */
|
||||
//return 0x8f;
|
||||
return 0x8e; /* PCI version */
|
||||
return 0x92; /* PCI version */
|
||||
//2 Mb PCI and some bios settings
|
||||
case 0x37: /* Reset state read 2 */
|
||||
return 0x2b;
|
||||
case 0x38: /* CR38 Register Lock 1 */
|
||||
return vga.s3.reg_lock1;
|
||||
case 0x39: /* CR39 Register Lock 2 */
|
||||
return vga.s3.reg_lock2;
|
||||
return vga.s3.reg_lock2;
|
||||
case 0x3a:
|
||||
return vga.s3.reg_3a;
|
||||
case 0x40: /* CR40 system config */
|
||||
return vga.s3.reg_40;
|
||||
case 0x41: /* CR40 system config */
|
||||
return vga.s3.reg_41;
|
||||
case 0x42: // not interlaced
|
||||
return 0x0d;
|
||||
case 0x43: /* CR43 Extended Mode */
|
||||
return vga.s3.reg_43|((vga.config.scan_len>>6)&0x4);
|
||||
case 0x45: /* Hardware cursor mode */
|
||||
vga.s3.hgc.bstackpos = 0;
|
||||
vga.s3.hgc.fstackpos = 0;
|
||||
return vga.s3.hgc.curmode;
|
||||
return vga.s3.hgc.curmode|0xa0;
|
||||
case 0x46:
|
||||
return vga.s3.hgc.originx>>8;
|
||||
case 0x47: /* HGC orgX */
|
||||
return vga.s3.hgc.originx&0xff;
|
||||
case 0x48:
|
||||
return vga.s3.hgc.originy>>8;
|
||||
case 0x49: /* HGC orgY */
|
||||
return vga.s3.hgc.originy&0xff;
|
||||
case 0x50: // CR50 Extended System Control 1
|
||||
return vga.s3.reg_50;
|
||||
case 0x51: /* Extended System Control 2 */
|
||||
return ((vga.config.display_start >> 16) & 3 ) |
|
||||
((vga.s3.svga_bank.b.bank & 0x30) >> 2) |
|
||||
((vga.config.scan_len & 0x300) >> 4) |
|
||||
vga.s3.reg_51;
|
||||
case 0x52: // CR52 Extended BIOS flags 1
|
||||
return vga.s3.reg_52;
|
||||
case 0x53:
|
||||
return vga.s3.ext_mem_ctrl;
|
||||
case 0x55: /* Extended Video DAC Control */
|
||||
|
@ -369,6 +401,8 @@ Bitu SVGA_S3_ReadCRTC( Bitu reg, Bitu iolen) {
|
|||
return (Bit8u)((vga.config.display_start & 0x1f0000)>>16);
|
||||
case 0x6a: /* Extended System Control 4 */
|
||||
return (Bit8u)(vga.s3.svga_bank.b.bank & 0x3f);
|
||||
case 0x6b: // BIOS scatchpad: LFB address
|
||||
return vga.s3.reg_6b;
|
||||
default:
|
||||
return 0x00;
|
||||
}
|
||||
|
|
File diff suppressed because it is too large
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Reference in a new issue