1
0
Fork 0

fix some bugs+enhance the s3/xga emulation (hal)

Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@3059
This commit is contained in:
Sebastian Strohhäcker 2007-12-10 22:11:13 +00:00
parent f87fc49809
commit 0dba278956
11 changed files with 728 additions and 484 deletions

View file

@ -16,7 +16,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
/* $Id: int10_modes.cpp,v 1.70 2007-11-05 18:42:56 qbix79 Exp $ */
/* $Id: int10_modes.cpp,v 1.71 2007-12-10 22:11:13 c2woody Exp $ */
#include <string.h>
@ -57,51 +57,69 @@ VideoModeBlock ModeList_VGA[]={
{ 0x054 ,M_TEXT ,1056,688, 132,43, 8, 16, 1 ,0xB8000 ,0x4000, 192, 800, 132,688, 0 },
{ 0x055 ,M_TEXT ,1056,400, 132,25, 8, 16, 1 ,0xB8000 ,0x2000, 192, 449, 132,400, 0 },
/* Alias of mode 102 */
{ 0x06A ,M_LIN4 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,128 ,663 ,100,600 ,0 },
/* Follow vesa 1.2 for first 0x20 */
{ 0x100 ,M_LIN8 ,640 ,400 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 ,0 },
{ 0x101 ,M_LIN8 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 ,0 },
{ 0x102 ,M_LIN4 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,128 ,663 ,100,600 ,0 },
{ 0x103 ,M_LIN8 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,128 ,663 ,100,600 ,0 },
{ 0x104 ,M_LIN4 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,150 ,800 ,128,768 ,0 },
{ 0x105 ,M_LIN8 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,150 ,800 ,128,768 ,0 },
{ 0x102 ,M_LIN4 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,132 ,628 ,100,600 ,0 },
{ 0x103 ,M_LIN8 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,132 ,628 ,100,600 ,0 },
{ 0x104 ,M_LIN4 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,168 ,806 ,128,768 ,0 },
{ 0x105 ,M_LIN8 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,168 ,806 ,128,768 ,0 },
{ 0x106 ,M_LIN4 ,1280,1024,160,64 ,8 ,16 ,1 ,0xA0000 ,0x10000,212 ,1066,160,1024,0 },
{ 0x107 ,M_LIN8 ,1280,1024,160,64 ,8 ,16 ,1 ,0xA0000 ,0x10000,212 ,1066,160,1024,0 },
{ 0x10D ,M_LIN15 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
{ 0x10E ,M_LIN16 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
{ 0x10F ,M_LIN32 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
{ 0x110 ,M_LIN15 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 ,0 },
{ 0x111 ,M_LIN16 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 ,0 },
{ 0x10F ,M_LIN32 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x10000,50 ,449 ,40 ,400 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
{ 0x110 ,M_LIN15 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,200 ,525 ,160,480 ,0 },
{ 0x111 ,M_LIN16 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,200 ,525 ,160,480 ,0 },
{ 0x112 ,M_LIN32 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 ,0 },
{ 0x113 ,M_LIN15 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,128 ,663 ,100,600 ,0 },
{ 0x114 ,M_LIN16 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,128 ,663 ,100,600 ,0 },
{ 0x115 ,M_LIN32 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,128 ,663 ,100,600 ,0 },
{ 0x116 ,M_LIN15 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,150 ,800 ,128,768 ,0 },
{ 0x117 ,M_LIN16 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,150 ,800 ,128,768 ,0 },
{ 0x118 ,M_LIN32 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,150 ,800 ,128,768 ,0 },
{ 0x113 ,M_LIN15 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,264 ,628 ,200,600 ,0 },
{ 0x114 ,M_LIN16 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,264 ,628 ,200,600 ,0 },
{ 0x115 ,M_LIN32 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,132 ,628 ,100,600 ,0 },
{ 0x116 ,M_LIN15 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,336 ,806 ,256,768 ,0 },
{ 0x117 ,M_LIN16 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,336 ,806 ,256,768 ,0 },
{ 0x118 ,M_LIN32 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,168 ,806 ,128,768 ,0 },
/* those should be interlaced but ok */
//{ 0x119 ,M_LIN15 ,1280,1024,160,64 ,8 ,16 ,1 ,0xA0000 ,0x10000,424 ,1066,320,1024,0 },
//{ 0x11A ,M_LIN16 ,1280,1024,160,64 ,8 ,16 ,1 ,0xA0000 ,0x10000,424 ,1066,320,1024,0 },
{ 0x150 ,M_LIN8 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
{ 0x151 ,M_LIN8 ,320 ,240 ,40 ,30 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
{ 0x152 ,M_LIN8 ,320 ,400 ,40 ,50 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE },
{ 0x153 ,M_LIN8 ,320 ,480 ,40 ,60 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE },
{ 0x160 ,M_LIN15 ,320 ,240 ,40 ,30 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
{ 0x161 ,M_LIN15 ,320 ,400 ,40 ,50 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE },
{ 0x162 ,M_LIN15 ,320 ,480 ,40 ,60 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE },
{ 0x165 ,M_LIN15 ,640 ,400 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 ,0 },
{ 0x160 ,M_LIN15 ,320 ,240 ,40 ,30 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 , 80 ,480 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
{ 0x161 ,M_LIN15 ,320 ,400 ,40 ,50 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 , 80 ,400 , _VGA_PIXEL_DOUBLE },
{ 0x162 ,M_LIN15 ,320 ,480 ,40 ,60 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 , 80 ,480 , _VGA_PIXEL_DOUBLE },
{ 0x165 ,M_LIN15 ,640 ,400 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0x10000,200 ,449 ,160 ,400 ,0 },
{ 0x170 ,M_LIN16 ,320 ,240 ,40 ,30 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
{ 0x171 ,M_LIN16 ,320 ,400 ,40 ,50 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE },
{ 0x172 ,M_LIN16 ,320 ,480 ,40 ,60 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE },
{ 0x175 ,M_LIN16 ,640 ,400 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 ,0 },
{ 0x170 ,M_LIN16 ,320 ,240 ,40 ,30 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 , 80 ,480 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
{ 0x171 ,M_LIN16 ,320 ,400 ,40 ,50 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 , 80 ,400 , _VGA_PIXEL_DOUBLE },
{ 0x172 ,M_LIN16 ,320 ,480 ,40 ,60 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 , 80 ,480 , _VGA_PIXEL_DOUBLE },
{ 0x175 ,M_LIN16 ,640 ,400 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0x10000,200 ,449 ,160 ,400 ,0 },
{ 0x190 ,M_LIN32 ,320 ,240 ,40 ,30 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
{ 0x191 ,M_LIN32 ,320 ,400 ,40 ,50 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE },
{ 0x192 ,M_LIN32 ,320 ,480 ,40 ,60 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE },
{ 0x195 ,M_LIN32 ,640 ,400 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 ,0 },
{ 0x190 ,M_LIN32 ,320 ,240 ,40 ,30 ,8 ,8 ,1 ,0xA0000 ,0x10000, 50 ,525 ,40 ,480 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
{ 0x191 ,M_LIN32 ,320 ,400 ,40 ,50 ,8 ,8 ,1 ,0xA0000 ,0x10000, 50 ,449 ,40 ,400 , _VGA_PIXEL_DOUBLE },
{ 0x192 ,M_LIN32 ,320 ,480 ,40 ,60 ,8 ,8 ,1 ,0xA0000 ,0x10000, 50 ,525 ,40 ,480 , _VGA_PIXEL_DOUBLE },
/* S3 specific modes */
{ 0x207 ,M_LIN8 ,1152,864,160,64 ,8 ,16 ,1 ,0xA0000 ,0x10000,182 ,948 ,144,864 ,0 },
{ 0x209 ,M_LIN15 ,1152,864,160,64 ,8 ,16 ,1 ,0xA0000 ,0x10000,364 ,948 ,288,864 ,0 },
{ 0x20A ,M_LIN16 ,1152,864,160,64 ,8 ,16 ,1 ,0xA0000 ,0x10000,364 ,948 ,288,864 ,0 },
//{ 0x20B ,M_LIN32 ,1152,864,160,64 ,8 ,16 ,1 ,0xA0000 ,0x10000,182 ,948 ,144,864 ,0 },
{ 0x213 ,M_LIN32 ,640 ,400,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 ,0 },
/* Some custom modes */
//{ 0x220 ,M_LIN32 ,1280,1024,160,64 ,8 ,16 ,1 ,0xA0000 ,0x10000,212 ,1066,160,1024,0 },
// A nice 16:9 mode
{ 0x222 ,M_LIN8 ,848 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,132 ,525 ,106 ,480 ,0 },
{ 0x223 ,M_LIN15 ,848 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,264 ,525 ,212 ,480 ,0 },
{ 0x224 ,M_LIN16 ,848 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,264 ,525 ,212 ,480 ,0 },
{ 0x225 ,M_LIN32 ,848 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,132 ,525 ,106 ,480 ,0 },
{0xFFFF ,M_ERROR ,0 ,0 ,0 ,0 ,0 ,0 ,0 ,0x00000 ,0x0000 ,0 ,0 ,0 ,0 ,0 },
};
@ -515,6 +533,9 @@ bool INT10_SetVideoMode(Bitu mode) {
if (mono_mode) crtc_base=0x3b4;
else crtc_base=0x3d4;
// Disable MMIO here so we can read / write memory
if (IS_VGA_ARCH) IO_Write(crtc_base,0x53);IO_Write(crtc_base+1,0x0);
/* Setup MISC Output Register */
Bit8u misc_output=0x2 | (mono_mode ? 0x0 : 0x1);
@ -804,9 +825,7 @@ bool INT10_SetVideoMode(Bitu mode) {
/* Setup Pixel format */
switch (CurMode->type) {
case M_LIN8:
/* This should be 0x0 according to the specs but makes it easier to detect
compared to normal vga modes now */
misc_control_2=0x10;
misc_control_2=0x00;
break;
case M_LIN15:
misc_control_2=0x30;
@ -939,7 +958,9 @@ att_text16:
break;
case M_VGA:
case M_LIN8:
case M_LIN15:
case M_LIN16:
case M_LIN32:
for (i=0;i<16;i++) att_data[i]=i;
att_data[0x10]=0x41; //Color Graphics 8-bit
break;
@ -993,7 +1014,9 @@ dac_text16:
break;
case M_VGA:
case M_LIN8:
case M_LIN15:
case M_LIN16:
case M_LIN32:
for (i=0;i<256;i++) {
IO_Write(0x3c9,vga_palette[i][0]);
IO_Write(0x3c9,vga_palette[i][1]);
@ -1056,10 +1079,51 @@ dac_text16:
IO_Write(crtc_base+1,(Bit8u)(S3_LFB_BASE >> 24));
IO_Write(crtc_base,0x5a);
IO_Write(crtc_base+1,(Bit8u)(S3_LFB_BASE >> 16));
IO_Write(crtc_base,0x6b); // BIOS scratchpad
IO_Write(crtc_base+1,(Bit8u)(S3_LFB_BASE >> 24));
/* Setup some remaining S3 registers */
Bitu reg_31;
IO_Write(crtc_base,0x41); // BIOS scratchpad
IO_Write(crtc_base+1,0x88);
IO_Write(crtc_base,0x52); // extended BIOS scratchpad
IO_Write(crtc_base+1,0x80);
// Accellerator setup
Bitu reg_50=0;
switch (CurMode->type) {
case M_LIN4:
case M_LIN15:
case M_LIN16: reg_50|=0x10; break;
case M_LIN32: reg_50|=0x30; break;
}
switch(CurMode->swidth)
{
case 640: reg_50|=0x40; break;
case 800: reg_50|=0x80; break;
case 1024: break;
case 1152: reg_50|=0x01; break;
case 1280: reg_50|=0xc1; break;
}
IO_WriteB(crtc_base,0x50); IO_WriteB(crtc_base+1,reg_50);
Bitu reg_31, reg_3a;
switch (CurMode->type) {
case M_LIN15:
case M_LIN16:
case M_LIN32:
reg_3a=0x15;
break;
case M_LIN8:
// S3VBE20 does it this way. The other double pixel bit does not
// seem to have an effect on the Trio64.
if(CurMode->special&_VGA_PIXEL_DOUBLE) reg_3a=0x5;
else reg_3a=0x15;
break;
default:
reg_3a=5;
};
switch (CurMode->type) {
case M_LIN4: // <- Theres a discrepance with real hardware on this
case M_LIN8:
case M_LIN15:
case M_LIN16:
@ -1070,9 +1134,9 @@ dac_text16:
reg_31 = 0;
break;
}
IO_Write(crtc_base,0x3a);IO_Write(crtc_base+1,reg_3a);
IO_Write(crtc_base,0x31);IO_Write(crtc_base+1,reg_31); //Enable banked memory and 256k+ access
IO_Write(crtc_base,0x58);IO_Write(crtc_base+1,0x3); //Enable 8 mb of linear addressing
IO_Write(crtc_base,0x53);IO_Write(crtc_base+1,0x0); //Disable MMIO
IO_Write(crtc_base,0x38);IO_Write(crtc_base+1,0x48); //Register lock 1
IO_Write(crtc_base,0x39);IO_Write(crtc_base+1,0xa5); //Register lock 2

View file

@ -16,7 +16,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
/* $Id: int10_vesa.cpp,v 1.29 2007-09-24 20:50:40 c2woody Exp $ */
/* $Id: int10_vesa.cpp,v 1.30 2007-12-10 22:11:13 c2woody Exp $ */
#include <string.h>
#include <stddef.h>
@ -115,7 +115,7 @@ Bit8u VESA_GetSVGAInformation(Bit16u seg,Bit16u off) {
}
mem_writed(buffer+0x0a,0x0); //Capabilities and flags
mem_writed(buffer+0x0e,int10.rom.vesa_modes); //VESA Mode list
mem_writew(buffer+0x12,32); //32 64kb blocks for 2 mb memory
mem_writew(buffer+0x12,Bit16u(VGA_MEMORY/(64*1024))); // memory size in 64kb blocks
return 0x00;
}
@ -124,6 +124,7 @@ Bit8u VESA_GetSVGAModeInformation(Bit16u mode,Bit16u seg,Bit16u off) {
memset(&minfo,0,sizeof(minfo));
PhysPt buf=PhysMake(seg,off);
Bitu pageSize;
Bit8u modeAttributes;
Bitu i=0;
mode&=0x3fff; // vbe2 compatible, ignore lfb and keep screen content bits
@ -138,27 +139,33 @@ foundit:
case M_LIN4:
pageSize = mblock->sheight * mblock->swidth/2;
pageSize = (pageSize | 15) & ~ 15;
var_write(&minfo.NumberOfImagePages,(512*1024 / pageSize)-1);
var_write(&minfo.BytesPerScanLine,mblock->swidth/8);
var_write(&minfo.NumberOfPlanes,0x4);
var_write(&minfo.BitsPerPixel,4);
var_write(&minfo.MemoryModel,3); //ega planar mode
var_write(&minfo.ModeAttributes,0x1b); //Color, graphics, no linear buffer
modeAttributes = 0x1b; // Color, graphics, no linear buffer
if(pageSize > 512*1024) { // this limitation is not on the real card
var_write(&minfo.ModeAttributes, modeAttributes & ~0x1);
var_write(&minfo.NumberOfImagePages,0);
} else {
var_write(&minfo.ModeAttributes, modeAttributes);
Bitu pages = (512*1024 / pageSize)-1;
var_write(&minfo.NumberOfImagePages,pages);
}
break;
case M_LIN8:
pageSize = mblock->sheight * mblock->swidth;
pageSize = (pageSize | 15) & ~ 15;
var_write(&minfo.NumberOfImagePages,(2*1024*1024 / pageSize)-1);
var_write(&minfo.BytesPerScanLine,mblock->swidth);
var_write(&minfo.NumberOfPlanes,0x1);
var_write(&minfo.BitsPerPixel,8);
var_write(&minfo.MemoryModel,4); //packed pixel
var_write(&minfo.ModeAttributes,0x9b); //Color, graphics, linear buffer
modeAttributes = 0x9b; // Color, graphics, linear buffer
break;
case M_LIN15:
pageSize = mblock->sheight * mblock->swidth*2;
pageSize = (pageSize | 15) & ~ 15;
var_write(&minfo.NumberOfImagePages,(2*1024*1024 / pageSize)-1);
var_write(&minfo.BytesPerScanLine,mblock->swidth*2);
var_write(&minfo.NumberOfPlanes,0x1);
var_write(&minfo.BitsPerPixel,15);
@ -171,12 +178,11 @@ foundit:
var_write(&minfo.BlueMaskPos,0);
var_write(&minfo.ReservedMaskSize,0x01);
var_write(&minfo.ReservedMaskPos,0x0f);
var_write(&minfo.ModeAttributes,0x9b); //Color, graphics, linear buffer
modeAttributes = 0x9b; // Color, graphics, linear buffer
break;
case M_LIN16:
pageSize = mblock->sheight * mblock->swidth*2;
pageSize = (pageSize | 15) & ~ 15;
var_write(&minfo.NumberOfImagePages,(2*1024*1024 / pageSize)-1);
var_write(&minfo.BytesPerScanLine,mblock->swidth*2);
var_write(&minfo.NumberOfPlanes,0x1);
var_write(&minfo.BitsPerPixel,16);
@ -187,12 +193,11 @@ foundit:
var_write(&minfo.GreenMaskPos,5);
var_write(&minfo.BlueMaskSize,5);
var_write(&minfo.BlueMaskPos,0);
var_write(&minfo.ModeAttributes,0x9b); //Color, graphics, linear buffer
modeAttributes = 0x9b; // Color, graphics, linear buffer
break;
case M_LIN32:
pageSize = mblock->sheight * mblock->swidth*4;
pageSize = (pageSize | 15) & ~ 15;
var_write(&minfo.NumberOfImagePages,(2*1024*1024 / pageSize)-1);
var_write(&minfo.BytesPerScanLine,mblock->swidth*4);
var_write(&minfo.NumberOfPlanes,0x1);
var_write(&minfo.BitsPerPixel,32);
@ -205,22 +210,33 @@ foundit:
var_write(&minfo.BlueMaskPos,0x0);
var_write(&minfo.ReservedMaskSize,0x8);
var_write(&minfo.ReservedMaskPos,0x18);
var_write(&minfo.ModeAttributes,0x9b); //Color, graphics, linear buffer
modeAttributes = 0x9b; // Color, graphics, linear buffer
break;
/* case M_TEXT:
pageSize = mblock->sheight/8 * mblock->swidth*2/8;
pageSize = (pageSize | 15) & ~ 15;
var_write(&minfo.NumberOfImagePages,(2*1024*1024 / pageSize)-1);
var_write(&minfo.BytesPerScanLine,mblock->swidth*2/8);
var_write(&minfo.NumberOfPlanes,0x4);
var_write(&minfo.BitsPerPixel,4);
var_write(&minfo.MemoryModel,0); //Text
var_write(&minfo.ModeAttributes,0x0f); //Color, text, bios output
modeAttributes = 0x0f; //Color, text, bios output
break; */
default:
return 0x1;
}
var_write(&minfo.WinAAttributes,0x7); //Exists/readable/writable
var_write(&minfo.WinAAttributes,0x7); // Exists/readable/writable
if(mblock->type != M_LIN4)
if(pageSize > VGA_MEMORY) {
// Mode not supported by current hardware configuration
var_write(&minfo.ModeAttributes, modeAttributes & ~0x1);
var_write(&minfo.NumberOfImagePages,0);
} else {
var_write(&minfo.ModeAttributes, modeAttributes);
Bitu pages = (VGA_MEMORY / pageSize)-1;
var_write(&minfo.NumberOfImagePages,pages);
}
if (mblock->type==M_TEXT) {
var_write(&minfo.WinGranularity,32);
var_write(&minfo.WinSize,32);
@ -333,15 +349,17 @@ Bit8u VESA_ScanLineLength(Bit8u subcall,Bit16u val, Bit16u & bytes,Bit16u & pixe
}
switch (subcall) {
case 0x00: /* Set in pixels */
vga.config.scan_len = (val * bpp);
if(CurMode->type==M_LIN4) vga.config.scan_len=val/2;
else vga.config.scan_len = (val * bpp);
break;
case 0x02: /* Set in bytes */
vga.config.scan_len = val;
if(CurMode->type==M_LIN4) vga.config.scan_len = val*4;
else vga.config.scan_len = val;
break;
case 0x03: /* Get maximum */
bytes=0x400*4;
pixels=bytes/bpp;
lines = 2*1024*1024 / bytes;
lines = VGA_MEMORY / bytes;
return 0x00;
case 0x01: /* Get lengths */
break;
@ -354,9 +372,16 @@ Bit8u VESA_ScanLineLength(Bit8u subcall,Bit16u val, Bit16u & bytes,Bit16u & pixe
vga.config.scan_len += 8;
vga.config.scan_len /= 8;
}
pixels=(vga.config.scan_len*8)/bpp;
bytes=vga.config.scan_len*8;
lines = 2*1024*1024 / bytes;
if(CurMode->type==M_LIN4) {
pixels=(vga.config.scan_len*16)/bpp;
bytes=vga.config.scan_len*2;
lines = Bit16u(VGA_MEMORY /( bytes*4));
}
else {
pixels=(vga.config.scan_len*8)/bpp;
bytes=vga.config.scan_len*8;
lines = Bit16u(VGA_MEMORY / bytes);
}
VGA_StartResize();
return 0x0;
}
@ -366,7 +391,7 @@ Bit8u VESA_SetDisplayStart(Bit16u x,Bit16u y) {
Bitu start;
switch (CurMode->type) {
case M_LIN4:
start=vga.config.scan_len*8*y+x;
start=vga.config.scan_len*16*y+x;
vga.config.display_start=start/8;
IO_Read(0x3da);
IO_Write(0x3c0,0x13+32);