From 138adbcf396f5364da0b9648481b60305660921a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Sebastian=20Strohh=C3=A4cker?= Date: Mon, 1 Oct 2007 20:31:16 +0000 Subject: [PATCH] swap parameter loading to work around register clashing for x86_64 (drc dynamic fpu) Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@3005 --- src/cpu/core_dynrec/dyn_fpu.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/cpu/core_dynrec/dyn_fpu.h b/src/cpu/core_dynrec/dyn_fpu.h index 68c06703..a75d07f3 100644 --- a/src/cpu/core_dynrec/dyn_fpu.h +++ b/src/cpu/core_dynrec/dyn_fpu.h @@ -289,8 +289,8 @@ static void dyn_fpu_esc1(){ switch(decode.modrm.reg){ case 0x00: /* FLD float*/ gen_call_function_raw((void*)&FPU_PREP_PUSH); - gen_mov_word_to_reg(FC_OP2,(void*)(&TOP),true); dyn_fill_ea(FC_OP1); + gen_mov_word_to_reg(FC_OP2,(void*)(&TOP),true); gen_call_function_RR((void*)&FPU_FLD_F32,FC_OP1,FC_OP2); break; case 0x01: /* UNKNOWN */ @@ -532,8 +532,8 @@ static void dyn_fpu_esc5(){ case 0x07: /*FNSTSW */ gen_mov_word_to_reg(FC_OP1,(void*)(&TOP),true); gen_call_function_R((void*)&FPU_SET_TOP,FC_OP1); - gen_mov_word_to_reg(FC_OP2,(void*)(&fpu.sw),true); dyn_fill_ea(FC_OP1); + gen_mov_word_to_reg(FC_OP2,(void*)(&fpu.sw),true); gen_call_function_RR((void*)&mem_writew,FC_OP1,FC_OP2); break; default: @@ -633,8 +633,8 @@ static void dyn_fpu_esc7(){ switch(decode.modrm.reg){ case 0x00: /* FILD Bit16s */ gen_call_function_raw((void*)&FPU_PREP_PUSH); - gen_mov_word_to_reg(FC_OP2,(void*)(&TOP),true); dyn_fill_ea(FC_OP1); + gen_mov_word_to_reg(FC_OP2,(void*)(&TOP),true); gen_call_function_RR((void*)&FPU_FLD_I16,FC_OP1,FC_OP2); break; case 0x01: @@ -651,14 +651,14 @@ static void dyn_fpu_esc7(){ break; case 0x04: /* FBLD packed BCD */ gen_call_function_raw((void*)&FPU_PREP_PUSH); + dyn_fill_ea(FC_OP1); gen_mov_word_to_reg(FC_OP2,(void*)(&TOP),true); - dyn_fill_ea(FC_OP1); gen_call_function_RR((void*)&FPU_FBLD,FC_OP1,FC_OP2); break; case 0x05: /* FILD Bit64s */ gen_call_function_raw((void*)&FPU_PREP_PUSH); + dyn_fill_ea(FC_OP1); gen_mov_word_to_reg(FC_OP2,(void*)(&TOP),true); - dyn_fill_ea(FC_OP1); gen_call_function_RR((void*)&FPU_FLD_I64,FC_OP1,FC_OP2); break; case 0x06: /* FBSTP packed BCD */