From 1561e03647085cc19c5ca9f081f8382b813dcb7f Mon Sep 17 00:00:00 2001
From: Peter Veenstra <qbix79@users.sourceforge.net>
Date: Thu, 11 Mar 2004 20:35:25 +0000
Subject: [PATCH] Changes of Srecko in the parts he coded

Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@1715
---
 src/hardware/mpu401.cpp   | 43 ++++++++++++++++++++++++++++++++-------
 src/hardware/sblaster.cpp | 14 ++++++-------
 2 files changed, 43 insertions(+), 14 deletions(-)

diff --git a/src/hardware/mpu401.cpp b/src/hardware/mpu401.cpp
index ea60b8bb..409adb97 100644
--- a/src/hardware/mpu401.cpp
+++ b/src/hardware/mpu401.cpp
@@ -178,7 +178,7 @@ static struct {
 		bool conductor,cond_req,cond_set;
 		bool allnotes,realtime,allthru;
 		bool playing;
-		bool wsd,wsm;
+		bool wsd,wsm,wsd_start;
 		bool midi_thru;
 		bool run_irq,irq_pending;
 		Bits data_onoff;
@@ -245,18 +245,20 @@ static void MPU401_WriteCommand(Bit32u port,Bit8u val) {
 	}
 	else if (val>=0xa0 && val<=0xa7) {/* Request play counter */
 		if (mpu.state.cmask&(1<<(val&7))) QueueByte(mpu.playbuf[val&7].counter);
-	} 
+	}
 	else if (val>=0xd0 && val<=0xd7) { /* Request to send data */
 		mpu.state.channel=val&7;
 		//if (!mpu.playbuf[mpu.state.channel].active)
 		mpu.state.wsd=true;
 		mpu.state.wsm=false;
+		mpu.state.wsd_start=true;
 	} 
 	else
 	switch (val) {
 		case CMD_REQUEST_TO_SEND_SYSTEM_MSG:
 			mpu.state.wsd=false;
 			mpu.state.wsm=true;
+			mpu.state.wsd_start=true;
 			break;
 		case CMD_CONDUCTOR_ON:
 			mpu.state.cond_set=true;
@@ -443,16 +445,43 @@ static void MPU401_WriteData(Bit32u port,Bit8u val) {
 			mpu.state.command_byte=0;
 			return;
 	}
+	static Bitu length,cnt;
 	if (mpu.state.wsd) {
-		if (val>=0xf0 && !mpu.state.allthru) return;
-		MIDI_RawOutByte(val);
-		mpu.state.wsd=0;
+		if (mpu.state.wsd_start) {
+			mpu.state.wsd_start=0;
+			cnt=0;
+			switch (val&0xf0) {
+				case 0xc0:
+				case 0xd0: 
+					length=2;
+					break;
+				case 0xf0:
+					if (!mpu.state.allthru) {mpu.state.wsd=0;return;}
+					else {length=1;break;}
+				default:
+					length=3;
+			}
+		}
+		if (cnt<length) {MIDI_RawOutByte(val);cnt++;}
+		if (cnt==length) mpu.state.wsd=0;
 		return;
 	}
 	if (mpu.state.wsm) {
 		if (val==CMD_EOX) {mpu.state.wsm=0;return;}
-		if (val>=0xf0 && !mpu.state.allthru) return;
-		MIDI_RawOutByte(val);
+		if (mpu.state.wsd_start) {
+			mpu.state.wsd_start=0;
+			cnt=0;
+			switch (val) {
+				case 0xf2:{ length=3; break;}
+				case 0xf3:{ length=2; break;}
+				case 0xf6:{ length=1; break;}
+				case 0xf0:{ length=0; break;}
+				default:
+					length=0;
+			}
+		}
+		if (!length || cnt<length) {MIDI_RawOutByte(val);cnt++;}
+		if (cnt==length) mpu.state.wsm=0;
 		return;
 	}
 	if (mpu.state.cond_req) { /* Command */
diff --git a/src/hardware/sblaster.cpp b/src/hardware/sblaster.cpp
index 742fcc1f..bd37d7ed 100644
--- a/src/hardware/sblaster.cpp
+++ b/src/hardware/sblaster.cpp
@@ -388,7 +388,7 @@ static void GenerateDMASound(Bitu size) {
 			sb.tmp.buf.m[read+1]=decode_ADPCM_3_sample((sb.dma.buf.b8[read*3/8]>>3)&7,sb.adpcm.reference,sb.adpcm.stepsize);
 			read+=2;
 			if (ad==2) {
-				sb.tmp.buf.m[read]=decode_ADPCM_3_sample(((sb.dma.buf.b8[(read-2)*3/8-1]>>6)&3)&(sb.dma.buf.b8[read*3/8]&1),     sb.adpcm.reference,sb.adpcm.stepsize);
+				sb.tmp.buf.m[read]=decode_ADPCM_3_sample(((sb.dma.buf.b8[(read-2)*3/8-1]>>6)&3)&(sb.dma.buf.b8[(read-2)*3/8]&1),     sb.adpcm.reference,sb.adpcm.stepsize);
 				sb.tmp.buf.m[read+1]=decode_ADPCM_3_sample((sb.dma.buf.b8[(read-2)*3/8]>>1)&7,sb.adpcm.reference,sb.adpcm.stepsize);
 				sb.tmp.buf.m[read+2]=decode_ADPCM_3_sample((sb.dma.buf.b8[(read-2)*3/8]>>4)&7,sb.adpcm.reference,sb.adpcm.stepsize);
 				read+=3;
@@ -693,21 +693,21 @@ static void DSP_DoCommand(void) {
 		//TODO Maybe check limit for new irq?
 		sb.dma.total=1+sb.dsp.in.data[0]+(sb.dsp.in.data[1] << 8);
 		break;
-    case 0x75:  /* 075h : Single Cycle 4-bit ADPCM Reference */
+    	case 0x75:	/* 075h : Single Cycle 4-bit ADPCM Reference */
 		sb.adpcm.reference=0x1000000;
-    case 0x74:  /* 074h : Single Cycle 4-bit ADPCM */	
+    	case 0x74:	/* 074h : Single Cycle 4-bit ADPCM */	
 		sb.dma.total=1+sb.dsp.in.data[0]+(sb.dsp.in.data[1] << 8);
 		DSP_StartDMATranfser(DMA_4_SINGLE);
 		break;
-	case 0x77:  /* 074h : Single Cycle 3-bit(2.6bit) ADPCM Reference*/
+	case 0x77:	/* 077h : Single Cycle 3-bit(2.6bit) ADPCM Reference*/
 		sb.adpcm.reference=0x1000000;
-	case 0x76:  /* 074h : Single Cycle 3-bit(2.6bit) ADPCM */
+	case 0x76:	/* 076h : Single Cycle 3-bit(2.6bit) ADPCM */
 		sb.dma.total=1+sb.dsp.in.data[0]+(sb.dsp.in.data[1] << 8);
 		DSP_StartDMATranfser(DMA_3_SINGLE);
 		break;
-	case 0x17:  /* 074h : Single Cycle 2-bit ADPCM Reference*/
+	case 0x17:	/* 017h : Single Cycle 2-bit ADPCM Reference*/
 		sb.adpcm.reference=0x1000000;
-	case 0x16:  /* 074h : Single Cycle 2-bit ADPCM */
+	case 0x16:	/* 016h : Single Cycle 2-bit ADPCM */
 		sb.dma.total=1+sb.dsp.in.data[0]+(sb.dsp.in.data[1] << 8);
 		DSP_StartDMATranfser(DMA_2_SINGLE);
 		break;