From 1ae2780eceb243fea1465797bb86b87358057d60 Mon Sep 17 00:00:00 2001
From: Sjoerd van der Berg <harekiet@users.sourceforge.net>
Date: Mon, 28 Jul 2003 08:22:15 +0000
Subject: [PATCH] Interrupt now handled without using EXCEPTION. Exception now
 resets IP to the faulting instruction. LAHF uses the lower 8-bit of the flags
 word. SS changing instruction do another cycle to be interrupt free.

Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@1171
---
 src/cpu/core_16/main.h      | 41 ++++++++++++++++++++++---------------
 src/cpu/core_16/prefix_66.h |  2 +-
 src/cpu/core_16/prefix_of.h |  1 +
 src/cpu/core_16/support.h   | 23 +++++++++++----------
 4 files changed, 39 insertions(+), 28 deletions(-)

diff --git a/src/cpu/core_16/main.h b/src/cpu/core_16/main.h
index 2814fe54..2ccd460d 100644
--- a/src/cpu/core_16/main.h
+++ b/src/cpu/core_16/main.h
@@ -67,7 +67,8 @@ restart:
 		Push_16(SegValue(ss));break;
 	case 0x17:												/* POP SS */		
 		SegSet16(ss,Pop_16());
-		goto restart;
+		CPU_Cycles++;//Be sure we run another instruction
+		break;
 	case 0x18:												/* SBB Eb,Gb */
 		RMEbGb(SBBB);break;
 	case 0x19:												/* SBB Ew,Gw */
@@ -251,7 +252,7 @@ restart:
 			break;
 		case 0x67:												/* Address Size Prefix */
 #ifdef CPU_PREFIX_67
-			core_16.prefixes|=PREFIX_ADDR;
+			core_16.prefixes^=PREFIX_ADDR;
 			lookupEATable=EAPrefixTable[core_16.prefixes];
 			goto restart;
 #else
@@ -517,7 +518,7 @@ restart:
 					break;
 				case 0x10:					/* MOV SS,Ew */
 					SegSet16(ss,val);
-					goto restart;
+					CPU_Cycles++;//Be sure we run another instruction
 					break;
 				case 0x18:					/* MOV DS,Ew */
 					SegSet16(ds,val);break;
@@ -591,8 +592,8 @@ restart:
 			break;
 		case 0x9f:												/* LAHF */
 			{
-				reg_ah=(get_CF() << 0) | (get_PF() << 2) | (get_AF() << 4) | 
-					    (get_ZF() << 6) | (get_SF() << 7);
+				FILLFLAGS;
+				reg_ah=(Bit8u)flags.word;
 				break;
 			}
 		case 0xa0:												/* MOV AL,Ob */
@@ -795,29 +796,37 @@ restart:
 			}
 			break;
 		case 0xcc:												/* INT3 */
+			LEAVECORE;
 #if C_DEBUG	
-			SAVEIP;
 			if (DEBUG_Breakpoint()) {
-				LOADIP;
-				LEAVECORE;
 				return debugCallback;
 			}
-			LOADIP;
-#endif			
-			EXCEPTION(3);
-			break;
+#endif		
+			if (Interrupt(3)) {
+				if (GETFLAG(TF)) {
+					LOG_MSG("Switch to trap decoder");
+					cpudecoder=CPU_Real_16_Slow_Decode_Trap;
+					return CBRET_NONE;
+				}
+				goto decode_start;
+			} else return CBRET_NONE;
 		case 0xcd:												/* INT Ib */	
 			{
 				Bit8u num=Fetchb();
+				LEAVECORE;
 #if C_DEBUG
-				SAVEIP;
 				if (DEBUG_IntBreakpoint(num)) {
-					LOADIP;
-					LEAVECORE;	
 					return debugCallback;
 				}
 #endif
-				EXCEPTION(num);				
+				if (Interrupt(num)) {
+					if (GETFLAG(TF)) {
+						LOG_MSG("Switch to trap decoder");
+						cpudecoder=CPU_Real_16_Slow_Decode_Trap;
+						return CBRET_NONE;
+					}
+					goto decode_start;
+				} else return CBRET_NONE;
 			}
 			break;
 		case 0xce:												/* INTO */
diff --git a/src/cpu/core_16/prefix_66.h b/src/cpu/core_16/prefix_66.h
index a4b479eb..6173b87e 100644
--- a/src/cpu/core_16/prefix_66.h
+++ b/src/cpu/core_16/prefix_66.h
@@ -155,7 +155,7 @@ switch(Fetchb()) {
 		SegPrefix_66(gs);break;
 	case 0x67:												/* Address Size Prefix */
 #ifdef CPU_PREFIX_67
-			core_16.prefixes|=PREFIX_ADDR;
+			core_16.prefixes^=PREFIX_ADDR;
 			lookupEATable=EAPrefixTable[core_16.prefixes];
 			goto restart_66;
 #else
diff --git a/src/cpu/core_16/prefix_of.h b/src/cpu/core_16/prefix_of.h
index 55450955..f28113c8 100644
--- a/src/cpu/core_16/prefix_of.h
+++ b/src/cpu/core_16/prefix_of.h
@@ -262,6 +262,7 @@ switch(Fetchb()) {
 		{	
 			GetRMrw;GetEAa;
 			*rmrw=LoadMw(eaa);SegSet16(ss,LoadMw(eaa+2));
+			CPU_Cycles++;//Be sure we run another instruction
 			break;
 		}
 	case 0xb3:												/* BTR Ew,Gw */
diff --git a/src/cpu/core_16/support.h b/src/cpu/core_16/support.h
index ede6fe25..02ed3a44 100644
--- a/src/cpu/core_16/support.h
+++ b/src/cpu/core_16/support.h
@@ -42,17 +42,18 @@ static INLINE void ADDIPFAST(Bit16s blah) {
 	}
 
 
-#define EXCEPTION(blah)										\
-	{														\
-		Bit8u new_num=blah;									\
-		LEAVECORE;											\
-		if (Interrupt(new_num)) {							\
-			if (GETFLAG(TF)) {								\
-				cpudecoder=CPU_Real_16_Slow_Decode_Trap;	\
-				return CBRET_NONE;						\
-			}												\
-			goto decode_start;								\
-		} else return CBRET_NONE;							\
+#define EXCEPTION(blah)											\
+	{															\
+		Bit8u new_num=blah;										\
+		core_16.ip_lookup=core_16.ip_start;						\
+		LEAVECORE;												\
+		if (Interrupt(new_num)) {								\
+			if (GETFLAG(TF)) {									\
+				cpudecoder=CPU_Real_16_Slow_Decode_Trap;		\
+				return CBRET_NONE;								\
+			}													\
+			goto decode_start;									\
+		} else return CBRET_NONE;								\
 	}
 
 static INLINE Bit8u Fetchb() {