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add rdtsc instruction to full core as well for consistency

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Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@3709
This commit is contained in:
Sebastian Strohhäcker 2011-05-09 16:19:24 +00:00
parent c2ba5b3639
commit 1bf90c16c2
3 changed files with 10 additions and 2 deletions
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7
src/cpu/core_full/load.h
View file

@ -500,6 +500,13 @@ l_M_Ed:
case D_ICEBP:
CPU_SW_Interrupt_NoIOPLCheck(1,GetIP());
continue;
case D_RDTSC: {
if (CPU_ArchitectureType<CPU_ARCHTYPE_PENTIUMSLOW) goto illegalopcode;
Bit64s tsc=(Bit64s)(PIC_FullIndex()*(double)CPU_CycleMax);
reg_edx=(Bit32u)(tsc>>32);
reg_eax=(Bit32u)(tsc&0xffffffff);
break;
}
default:
LOG(LOG_CPU,LOG_ERROR)("LOAD:Unhandled code %d opcode %X",inst.code.load,inst.entry);
goto illegalopcode;

4
src/cpu/core_full/optable.h
View file

@ -234,7 +234,7 @@ static OpCode OpCodeTable[1024]={
{0 ,0 ,0 ,0 },{0 ,0 ,0 ,0 },
/* 0x130 - 0x137 */
{0 ,0 ,0 ,0 },{0 ,0 ,0 ,0 },
{0 ,0 ,0 ,0 },{D_RDTSC ,0 ,0 ,0 },
{0 ,0 ,0 ,0 },{0 ,0 ,0 ,0 },
{0 ,0 ,0 ,0 },{0 ,0 ,0 ,0 },
{0 ,0 ,0 ,0 },{0 ,0 ,0 ,0 },
@ -590,7 +590,7 @@ static OpCode OpCodeTable[1024]={
{0 ,0 ,0 ,0 },{0 ,0 ,0 ,0 },
/* 0x330 - 0x337 */
{0 ,0 ,0 ,0 },{0 ,0 ,0 ,0 },
{0 ,0 ,0 ,0 },{D_RDTSC ,0 ,0 ,0 },
{0 ,0 ,0 ,0 },{0 ,0 ,0 ,0 },
{0 ,0 ,0 ,0 },{0 ,0 ,0 ,0 },
{0 ,0 ,0 ,0 },{0 ,0 ,0 ,0 },

1
src/cpu/core_full/support.h
View file

@ -64,6 +64,7 @@ enum {
D_CPUID,
D_HLT,D_CLTS,
D_LOCK,D_ICEBP,
D_RDTSC,
L_ERROR
};