Change timer code so it works better when the timing gets off due to the cpu core not stopping at the right moment (patch by h-a-l-9000). Some minor LIKELY stuff
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@3534
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2 changed files with 25 additions and 20 deletions
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@ -75,9 +75,7 @@ static void PIT0_Event(Bitu /*val*/) {
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pit[0].delay=(1000.0f/((float)PIT_TICK_RATE/(float)pit[0].cntr));
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pit[0].update_count=false;
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}
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double error = pit[0].start - PIC_FullIndex();
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PIC_AddEvent(PIT0_Event,(float)(pit[0].delay + error));
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PIC_AddEvent(PIT0_Event,pit[0].delay);
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}
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}
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@ -271,9 +269,7 @@ static Bitu read_latch(Bitu port,Bitu /*iolen*/) {
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break;
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case 3: /* read LSB followed by MSB */
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ret = pit[counter].read_latch & 0xff;
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if (pit[counter].mode & 0x80) pit[counter].mode &= 7;
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else pit[counter].read_state = 0;
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pit[counter].read_state = 0;
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break;
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case 1: /* read LSB */
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ret = pit[counter].read_latch & 0xff;
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