fix cga colors when machine=vga
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@2316
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3932cb886b
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20c46346d6
1 changed files with 36 additions and 16 deletions
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@ -38,9 +38,9 @@ VideoModeBlock ModeList_VGA[]={
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{ 0x001 ,M_TEXT ,360 ,400 ,40 ,25 ,9 ,16 ,8 ,0xB8000 ,0x0800 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK },
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{ 0x002 ,M_TEXT ,720 ,400 ,80 ,25 ,9 ,16 ,8 ,0xB8000 ,0x1000 ,100 ,449 ,80 ,400 ,0 },
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{ 0x003 ,M_TEXT ,720 ,400 ,80 ,25 ,9 ,16 ,8 ,0xB8000 ,0x1000 ,100 ,449 ,80 ,400 ,0 },
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{ 0x004 ,M_CGA4 ,320 ,200 ,40 ,25 ,8 ,8 ,2 ,0xB8000 ,0x0800 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE},
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{ 0x005 ,M_CGA4 ,320 ,200 ,40 ,25 ,8 ,8 ,2 ,0xB8000 ,0x0800 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE},
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{ 0x006 ,M_CGA2 ,640 ,200 ,80 ,25 ,8 ,8 ,2 ,0xB8000 ,0x0800 ,100 ,449 ,80 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE},
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{ 0x004 ,M_CGA4 ,320 ,200 ,40 ,25 ,8 ,8 ,4 ,0xB8000 ,0x0800 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE},
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{ 0x005 ,M_CGA4 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xB8000 ,0x0800 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE},
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{ 0x006 ,M_CGA2 ,640 ,200 ,80 ,25 ,8 ,8 ,1 ,0xB8000 ,0x0800 ,100 ,449 ,80 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE},
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{ 0x007 ,M_TEXT ,720 ,400 ,80 ,25 ,9 ,16 ,8 ,0xB0000 ,0x1000 ,100 ,449 ,80 ,400 ,0 },
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{ 0x00D ,M_EGA16 ,320 ,200 ,40 ,25 ,8 ,8 ,8 ,0xA0000 ,0x2000 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE },
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@ -49,7 +49,7 @@ VideoModeBlock ModeList_VGA[]={
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{ 0x010 ,M_EGA16 ,640 ,350 ,80 ,25 ,8 ,14 ,2 ,0xA0000 ,0x8000 ,100 ,449 ,80 ,350 ,0 },
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{ 0x011 ,M_EGA16 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0xA000 ,100 ,525 ,80 ,480 ,0 },/*was EGA_2 */
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{ 0x012 ,M_EGA16 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0xA000 ,100 ,525 ,80 ,480 ,0 },
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{ 0x013 ,M_VGA ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x0000 ,100 ,449 ,80 ,400 ,0 },
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{ 0x013 ,M_VGA ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x2000 ,100 ,449 ,80 ,400 ,0 },
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{ 0x054 ,M_TEXT ,1056,688, 132,43, 8, 8, 1 ,0xB8000 ,0x4000, 192, 800, 132,688, 0 },
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{ 0x055 ,M_TEXT ,1056,400, 132,25, 8, 16, 1 ,0xB8000 ,0x2000, 192, 449, 132,400, 0 },
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@ -107,11 +107,24 @@ static Bit8u ega_palette[64][3]=
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{0x15,0x15,0x15}, {0x15,0x15,0x3f}, {0x15,0x3f,0x15}, {0x15,0x3f,0x3f}, {0x3f,0x15,0x15}, {0x3f,0x15,0x3f}, {0x3f,0x3f,0x15}, {0x3f,0x3f,0x3f}
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};
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static Bit8u cga_palette[16][3]= {
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static Bit8u cga_palette[16][3]=
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{
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{0x00,0x00,0x00}, {0x00,0x00,0x2a}, {0x00,0x2a,0x00}, {0x00,0x2a,0x2a}, {0x2a,0x00,0x00}, {0x2a,0x00,0x2a}, {0x2a,0x15,0x00}, {0x2a,0x2a,0x2a},
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{0x15,0x15,0x15}, {0x15,0x15,0x3f}, {0x15,0x3f,0x15}, {0x15,0x3f,0x3f}, {0x3f,0x15,0x15}, {0x3f,0x15,0x3f}, {0x3f,0x3f,0x15}, {0x3f,0x3f,0x3f},
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};
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static Bit8u cga_palette_2[64][3]=
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{
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{0x00,0x00,0x00}, {0x00,0x00,0x2a}, {0x00,0x2a,0x00}, {0x00,0x2a,0x2a}, {0x2a,0x00,0x00}, {0x2a,0x00,0x2a}, {0x2a,0x15,0x00}, {0x2a,0x2a,0x2a},
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{0x00,0x00,0x00}, {0x00,0x00,0x2a}, {0x00,0x2a,0x00}, {0x00,0x2a,0x2a}, {0x2a,0x00,0x00}, {0x2a,0x00,0x2a}, {0x2a,0x15,0x00}, {0x2a,0x2a,0x2a},
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{0x15,0x15,0x15}, {0x15,0x15,0x3f}, {0x15,0x3f,0x15}, {0x15,0x3f,0x3f}, {0x3f,0x15,0x15}, {0x3f,0x15,0x3f}, {0x3f,0x3f,0x15}, {0x3f,0x3f,0x3f},
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{0x15,0x15,0x15}, {0x15,0x15,0x3f}, {0x15,0x3f,0x15}, {0x15,0x3f,0x3f}, {0x3f,0x15,0x15}, {0x3f,0x15,0x3f}, {0x3f,0x3f,0x15}, {0x3f,0x3f,0x3f},
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{0x00,0x00,0x00}, {0x00,0x00,0x2a}, {0x00,0x2a,0x00}, {0x00,0x2a,0x2a}, {0x2a,0x00,0x00}, {0x2a,0x00,0x2a}, {0x2a,0x15,0x00}, {0x2a,0x2a,0x2a},
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{0x00,0x00,0x00}, {0x00,0x00,0x2a}, {0x00,0x2a,0x00}, {0x00,0x2a,0x2a}, {0x2a,0x00,0x00}, {0x2a,0x00,0x2a}, {0x2a,0x15,0x00}, {0x2a,0x2a,0x2a},
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{0x15,0x15,0x15}, {0x15,0x15,0x3f}, {0x15,0x3f,0x15}, {0x15,0x3f,0x3f}, {0x3f,0x15,0x15}, {0x3f,0x15,0x3f}, {0x3f,0x3f,0x15}, {0x3f,0x3f,0x3f},
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{0x15,0x15,0x15}, {0x15,0x15,0x3f}, {0x15,0x3f,0x15}, {0x15,0x3f,0x3f}, {0x3f,0x15,0x15}, {0x3f,0x15,0x3f}, {0x3f,0x3f,0x15}, {0x3f,0x3f,0x3f},
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};
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static Bit8u vga_palette[256][3]=
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{
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{0x00,0x00,0x00},{0x00,0x00,0x2a},{0x00,0x2a,0x00},{0x00,0x2a,0x2a},{0x2a,0x00,0x00},{0x2a,0x00,0x2a},{0x2a,0x15,0x00},{0x2a,0x2a,0x2a},
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@ -389,7 +402,7 @@ bool INT10_SetVideoMode(Bitu mode) {
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/* Program Sequencer */
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Bit8u seq_data[SEQ_REGS];
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memset(seq_data,0,SEQ_REGS);
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if (CurMode->twidth==8) seq_data[1]|=1; //8 dot fonts by default
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if (CurMode->cwidth==8) seq_data[1]|=1; //8 dot fonts by default
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if (CurMode->special & _EGA_HALF_CLOCK) seq_data[1]|=0x08; //Check for half clock
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seq_data[4]|=0x02; //More than 64kb
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switch (CurMode->type) {
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@ -664,16 +677,21 @@ att_text16:
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case M_CGA2:
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att_data[0x10]=0x01; //Color Graphics
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att_data[0]=0x0;
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att_data[1]=0xf;
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for (i=1;i<0x10;i++) att_data[i]=0x17;
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att_data[0x12]=0x1; //Only enable 1 plane
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real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_PAL,0x3f);
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break;
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case M_CGA4:
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att_data[0x10]=0x01; //Color Graphics
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att_data[0]=0x0;
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att_data[1]=0x3;
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att_data[2]=0x5;
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att_data[3]=0x7;
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att_data[1]=0x13;
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att_data[2]=0x15;
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att_data[3]=0x17;
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att_data[4]=0x2;
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att_data[5]=0x4;
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att_data[6]=0x6;
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att_data[7]=0x7;
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for (i=8;i<16;i++) att_data[i]=i+8;
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real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_PAL,0x30);
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break;
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case M_VGA:
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@ -701,10 +719,10 @@ att_text16:
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case M_CGA2:
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case M_CGA4:
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case M_TANDY16:
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for (i=0;i<16;i++) {
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IO_Write(0x3c9,cga_palette[i][0]);
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IO_Write(0x3c9,cga_palette[i][1]);
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IO_Write(0x3c9,cga_palette[i][2]);
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for (i=0;i<64;i++) {
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IO_Write(0x3c9,cga_palette_2[i][0]);
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IO_Write(0x3c9,cga_palette_2[i][1]);
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IO_Write(0x3c9,cga_palette_2[i][2]);
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}
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break;
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case M_TEXT:
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@ -729,11 +747,13 @@ dac_text16:
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switch (CurMode->type) {
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case M_CGA2:
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feature=(feature&~0x30)|0x20;
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real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,0x12);
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real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,0x1e);
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break;
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case M_CGA4:
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feature=(feature&~0x30)|0x20;
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real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,0x2);
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if (CurMode->mode==4) real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,0x2a);
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else if (CurMode->mode==5) real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,0x2e);
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else real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,0x2);
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break;
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case M_TANDY16:
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feature=(feature&~0x30)|0x20;
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