vga attrib register/blanking updates (hal); cleanup
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@3436
This commit is contained in:
Sebastian Strohhäcker
parent
eb9633a6e4
commit
26e4b50da0
4 changed files with 123 additions and 117 deletions
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@ -16,7 +16,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: int10_modes.cpp,v 1.85 2009-01-25 12:00:52 c2woody Exp $ */
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/* $Id: int10_modes.cpp,v 1.86 2009-06-28 14:56:14 c2woody Exp $ */
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#include <string.h>
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@ -357,20 +357,19 @@ static bool SetCurMode(VideoModeBlock modeblock[],Bitu mode) {
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static void FinishSetMode(bool clearmem) {
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Bitu i;
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/* Clear video memory if needs be */
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if (clearmem) {
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switch (CurMode->type) {
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case M_CGA4:
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case M_CGA2:
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case M_TANDY16:
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for (i=0;i<16*1024;i++) {
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real_writew( 0xb800,i*2,0x0000);
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for (Bit16u ct=0;ct<16*1024;ct++) {
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real_writew( 0xb800,ct*2,0x0000);
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}
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break;
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case M_TEXT: {
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Bit16u seg = (CurMode->mode==7)?0xb000:0xb800;
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for (i=0;i<16*1024;i++) real_writew(seg,i*2,0x0720);
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for (Bit16u ct=0;ct<16*1024;ct++) real_writew(seg,ct*2,0x0720);
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break;
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}
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case M_EGA:
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@ -386,13 +385,13 @@ static void FinishSetMode(bool clearmem) {
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}
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}
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/* Setup the BIOS */
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if (CurMode->mode<128) real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MODE,CurMode->mode);
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else real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MODE,CurMode->mode-0x98); //Looks like the s3 bios
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real_writew(BIOSMEM_SEG,BIOSMEM_NB_COLS,CurMode->twidth);
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real_writew(BIOSMEM_SEG,BIOSMEM_PAGE_SIZE,CurMode->plength);
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if (CurMode->mode<128) real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MODE,(Bit8u)CurMode->mode);
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else real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MODE,(Bit8u)(CurMode->mode-0x98)); //Looks like the s3 bios
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real_writew(BIOSMEM_SEG,BIOSMEM_NB_COLS,(Bit16u)CurMode->twidth);
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real_writew(BIOSMEM_SEG,BIOSMEM_PAGE_SIZE,(Bit16u)CurMode->plength);
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real_writew(BIOSMEM_SEG,BIOSMEM_CRTC_ADDRESS,((CurMode->mode==7 )|| (CurMode->mode==0x0f)) ? 0x3b4 : 0x3d4);
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real_writeb(BIOSMEM_SEG,BIOSMEM_NB_ROWS,CurMode->theight-1);
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real_writew(BIOSMEM_SEG,BIOSMEM_CHAR_HEIGHT,CurMode->cheight);
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real_writeb(BIOSMEM_SEG,BIOSMEM_NB_ROWS,(Bit8u)(CurMode->theight-1));
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real_writew(BIOSMEM_SEG,BIOSMEM_CHAR_HEIGHT,(Bit16u)CurMode->cheight);
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real_writeb(BIOSMEM_SEG,BIOSMEM_VIDEO_CTL,(0x60|(clearmem?0:0x80)));
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real_writeb(BIOSMEM_SEG,BIOSMEM_SWITCHES,0x09);
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real_writeb(BIOSMEM_SEG,BIOSMEM_MODESET_CTL,real_readb(BIOSMEM_SEG,BIOSMEM_MODESET_CTL)&0x7f);
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@ -402,11 +401,11 @@ static void FinishSetMode(bool clearmem) {
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real_writed(BIOSMEM_SEG,BIOSMEM_VS_POINTER,int10.rom.video_save_pointers);
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// Set cursor shape
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if(CurMode->type==M_TEXT) {
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if (CurMode->type==M_TEXT) {
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INT10_SetCursorShape(0x06,07);
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}
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// Set cursor pos for page 0..7
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for(i=0;i<8;i++) INT10_SetCursorPos(0,0,(Bit8u)i);
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for (Bit8u ct=0;ct<8;ct++) INT10_SetCursorPos(0,0,ct);
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// Set active page 0
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INT10_SetActivePage(0);
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/* Set some interrupt vectors */
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@ -420,7 +419,6 @@ static void FinishSetMode(bool clearmem) {
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}
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bool INT10_SetVideoMode_OTHER(Bitu mode,bool clearmem) {
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Bitu i;
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switch (machine) {
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case MCH_CGA:
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if (mode>6) return false;
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@ -479,9 +477,9 @@ bool INT10_SetVideoMode_OTHER(Bitu mode,bool clearmem) {
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}
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IO_WriteW(crtc_base,0x09 | (scanline-1) << 8);
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//Setup the CGA palette using VGA DAC palette
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for (i=0;i<16;i++) VGA_DAC_SetEntry(i,cga_palette[i][0],cga_palette[i][1],cga_palette[i][2]);
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for (Bit8u ct=0;ct<16;ct++) VGA_DAC_SetEntry(ct,cga_palette[ct][0],cga_palette[ct][1],cga_palette[ct][2]);
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//Setup the tandy palette
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for (i=0;i<16;i++) VGA_DAC_CombineColor(i,i);
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for (Bit8u ct=0;ct<16;ct++) VGA_DAC_CombineColor(ct,ct);
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//Setup the special registers for each machine type
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Bit8u mode_control_list[0xa+1]={
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0x2c,0x28,0x2d,0x29, //0-3
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@ -696,9 +694,9 @@ bool INT10_SetVideoMode(Bitu mode) {
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seq_data[4]|=0xc; //Graphics - odd/even - Chained
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break;
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}
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for (i=0;i<SEQ_REGS;i++) {
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IO_Write(0x3c4,i);
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IO_Write(0x3c5,seq_data[i]);
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for (Bit8u ct=0;ct<SEQ_REGS;ct++) {
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IO_Write(0x3c4,ct);
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IO_Write(0x3c5,seq_data[ct]);
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}
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vga.config.compatible_chain4 = true; // this may be changed by SVGA chipset emulation
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@ -707,19 +705,19 @@ bool INT10_SetVideoMode(Bitu mode) {
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IO_Write(crtc_base,0x11);
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IO_Write(crtc_base+1,IO_Read(crtc_base+1)&0x7f);
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/* Clear all the regs */
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for (i=0x0;i<=0x18;i++) {
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IO_Write(crtc_base,i);IO_Write(crtc_base+1,0);
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for (Bit8u ct=0x0;ct<=0x18;ct++) {
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IO_Write(crtc_base,ct);IO_Write(crtc_base+1,0);
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}
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Bit8u overflow=0;Bit8u max_scanline=0;
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Bit8u ver_overflow=0;Bit8u hor_overflow=0;
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/* Horizontal Total */
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IO_Write(crtc_base,0x00);IO_Write(crtc_base+1,CurMode->htotal-5);
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IO_Write(crtc_base,0x00);IO_Write(crtc_base+1,(Bit8u)(CurMode->htotal-5));
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hor_overflow|=((CurMode->htotal-5) & 0x100) >> 8;
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/* Horizontal Display End */
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IO_Write(crtc_base,0x01);IO_Write(crtc_base+1,CurMode->hdispend-1);
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IO_Write(crtc_base,0x01);IO_Write(crtc_base+1,(Bit8u)(CurMode->hdispend-1));
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hor_overflow|=((CurMode->hdispend-1) & 0x100) >> 7;
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/* Start horizontal Blanking */
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IO_Write(crtc_base,0x02);IO_Write(crtc_base+1,CurMode->hdispend);
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IO_Write(crtc_base,0x02);IO_Write(crtc_base+1,(Bit8u)CurMode->hdispend);
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hor_overflow|=((CurMode->hdispend) & 0x100) >> 6;
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/* End horizontal Blanking */
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Bitu blank_end=(CurMode->htotal-2) & 0x7f;
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@ -730,7 +728,7 @@ bool INT10_SetVideoMode(Bitu mode) {
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if ((CurMode->special & _EGA_HALF_CLOCK) && (CurMode->type!=M_CGA2)) ret_start = (CurMode->hdispend+3);
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else if (CurMode->type==M_TEXT) ret_start = (CurMode->hdispend+5);
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else ret_start = (CurMode->hdispend+4);
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IO_Write(crtc_base,0x04);IO_Write(crtc_base+1,ret_start);
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IO_Write(crtc_base,0x04);IO_Write(crtc_base+1,(Bit8u)ret_start);
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hor_overflow|=(ret_start & 0x100) >> 4;
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/* End Horizontal Retrace */
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@ -742,10 +740,10 @@ bool INT10_SetVideoMode(Bitu mode) {
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} else if (CurMode->type==M_TEXT) ret_end = (CurMode->htotal-3) & 0x1f;
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else ret_end = (CurMode->htotal-4) & 0x1f;
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IO_Write(crtc_base,0x05);IO_Write(crtc_base+1,ret_end | (blank_end & 0x20) << 2);
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IO_Write(crtc_base,0x05);IO_Write(crtc_base+1,(Bit8u)(ret_end | (blank_end & 0x20) << 2));
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/* Vertical Total */
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IO_Write(crtc_base,0x06);IO_Write(crtc_base+1,(CurMode->vtotal-2));
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IO_Write(crtc_base,0x06);IO_Write(crtc_base+1,(Bit8u)(CurMode->vtotal-2));
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overflow|=((CurMode->vtotal-2) & 0x100) >> 8;
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overflow|=((CurMode->vtotal-2) & 0x200) >> 4;
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ver_overflow|=((CurMode->vtotal-2) & 0x400) >> 10;
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@ -770,7 +768,7 @@ bool INT10_SetVideoMode(Bitu mode) {
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}
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/* Vertical Retrace Start */
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IO_Write(crtc_base,0x10);IO_Write(crtc_base+1,vretrace);
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IO_Write(crtc_base,0x10);IO_Write(crtc_base+1,(Bit8u)vretrace);
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overflow|=(vretrace & 0x100) >> 6;
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overflow|=(vretrace & 0x200) >> 2;
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ver_overflow|=(vretrace & 0x400) >> 6;
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@ -779,7 +777,7 @@ bool INT10_SetVideoMode(Bitu mode) {
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IO_Write(crtc_base,0x11);IO_Write(crtc_base+1,(vretrace+2) & 0xF);
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/* Vertical Display End */
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IO_Write(crtc_base,0x12);IO_Write(crtc_base+1,(CurMode->vdispend-1));
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IO_Write(crtc_base,0x12);IO_Write(crtc_base+1,(Bit8u)(CurMode->vdispend-1));
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overflow|=((CurMode->vdispend-1) & 0x100) >> 7;
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overflow|=((CurMode->vdispend-1) & 0x200) >> 3;
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ver_overflow|=((CurMode->vdispend-1) & 0x400) >> 9;
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@ -804,13 +802,13 @@ bool INT10_SetVideoMode(Bitu mode) {
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}
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/* Vertical Blank Start */
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IO_Write(crtc_base,0x15);IO_Write(crtc_base+1,(CurMode->vdispend+vblank_trim));
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IO_Write(crtc_base,0x15);IO_Write(crtc_base+1,(Bit8u)(CurMode->vdispend+vblank_trim));
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overflow|=((CurMode->vdispend+vblank_trim) & 0x100) >> 5;
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max_scanline|=((CurMode->vdispend+vblank_trim) & 0x200) >> 4;
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ver_overflow|=((CurMode->vdispend+vblank_trim) & 0x400) >> 8;
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/* Vertical Blank End */
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IO_Write(crtc_base,0x16);IO_Write(crtc_base+1,(CurMode->vtotal-vblank_trim-2));
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IO_Write(crtc_base,0x16);IO_Write(crtc_base+1,(Bit8u)(CurMode->vtotal-vblank_trim-2));
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/* Line Compare */
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Bitu line_compare=(CurMode->vtotal < 1024) ? 1023 : 2047;
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@ -881,7 +879,7 @@ bool INT10_SetVideoMode(Bitu mode) {
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/* Extended System Control 2 Register */
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/* This register actually has more bits but only use the extended offset ones */
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IO_Write(crtc_base,0x51);
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IO_Write(crtc_base + 1,(offset & 0x300) >> 4);
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IO_Write(crtc_base + 1,(Bit8u)((offset & 0x300) >> 4));
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/* Clear remaining bits of the display start */
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IO_Write(crtc_base,0x69);
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IO_Write(crtc_base + 1,0);
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@ -995,9 +993,9 @@ bool INT10_SetVideoMode(Bitu mode) {
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}
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break;
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}
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for (i=0;i<GFX_REGS;i++) {
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IO_Write(0x3ce,i);
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IO_Write(0x3cf,gfx_data[i]);
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for (Bit8u ct=0;ct<GFX_REGS;ct++) {
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IO_Write(0x3ce,ct);
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IO_Write(0x3cf,gfx_data[ct]);
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}
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Bit8u att_data[ATT_REGS];
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memset(att_data,0,ATT_REGS);
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@ -1025,16 +1023,16 @@ bool INT10_SetVideoMode(Bitu mode) {
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default:
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if ( CurMode->type == M_LIN4 )
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goto att_text16;
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for (i=0;i<8;i++) {
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att_data[i]=i;
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att_data[i+8]=i+0x10;
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for (Bit8u ct=0;ct<8;ct++) {
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att_data[ct]=ct;
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att_data[ct+8]=ct+0x10;
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}
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break;
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}
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break;
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case M_TANDY16:
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att_data[0x10]=0x01; //Color Graphics
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for (i=0;i<16;i++) att_data[i]=i;
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for (Bit8u ct=0;ct<16;ct++) att_data[ct]=ct;
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break;
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case M_TEXT:
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if (machine==MCH_EGA) {
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@ -1054,9 +1052,9 @@ att_text16:
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att_data[i+8]=0x18;
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}
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} else {
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for (i=0;i<8;i++) {
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att_data[i]=i;
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att_data[i+8]=i+0x38;
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for (Bit8u ct=0;ct<8;ct++) {
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att_data[ct]=ct;
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att_data[ct+8]=ct+0x38;
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}
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if (IS_VGA_ARCH) att_data[0x06]=0x14; //Odd Color 6 yellow/brown.
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}
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@ -1078,8 +1076,8 @@ att_text16:
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att_data[5]=0x04;
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att_data[6]=0x06;
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att_data[7]=0x07;
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for (i=0x8;i<0x10;i++)
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att_data[i] = i + 0x8;
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for (Bit8u ct=0x8;ct<0x10;ct++)
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att_data[ct] = ct + 0x8;
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real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_PAL,0x30);
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break;
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case M_VGA:
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@ -1087,15 +1085,15 @@ att_text16:
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case M_LIN15:
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case M_LIN16:
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case M_LIN32:
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for (i=0;i<16;i++) att_data[i]=i;
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for (Bit8u ct=0;ct<16;ct++) att_data[ct]=ct;
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att_data[0x10]=0x41; //Color Graphics 8-bit
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break;
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}
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IO_Read(mono_mode ? 0x3ba : 0x3da);
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if ((modeset_ctl & 8)==0) {
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for (i=0;i<ATT_REGS;i++) {
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IO_Write(0x3c0,i);
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IO_Write(0x3c0,att_data[i]);
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for (Bit8u ct=0;ct<ATT_REGS;ct++) {
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IO_Write(0x3c0,ct);
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IO_Write(0x3c0,att_data[ct]);
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}
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vga.config.pel_panning = 0;
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IO_Write(0x3c0,0x20); IO_Write(0x3c0,0x00); //Disable palette access
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@ -1173,10 +1171,10 @@ dac_text16:
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}
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}
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} else {
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for (i=0x10;i<ATT_REGS;i++) {
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if (i==0x11) continue; // skip overscan register
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IO_Write(0x3c0,i);
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IO_Write(0x3c0,att_data[i]);
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for (Bit8u ct=0x10;ct<ATT_REGS;ct++) {
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if (ct==0x11) continue; // skip overscan register
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IO_Write(0x3c0,ct);
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IO_Write(0x3c0,att_data[ct]);
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}
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vga.config.pel_panning = 0;
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IO_Write(0x3c0,0x20); //Disable palette access
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@ -1222,11 +1220,11 @@ dac_text16:
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IO_Write(crtc_base+1,0);
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/* Setup the linear frame buffer */
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IO_Write(crtc_base,0x59);
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IO_Write(crtc_base+1,(Bit8u)(S3_LFB_BASE >> 24));
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IO_Write(crtc_base+1,(Bit8u)((S3_LFB_BASE >> 24)&0xff));
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IO_Write(crtc_base,0x5a);
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IO_Write(crtc_base+1,(Bit8u)(S3_LFB_BASE >> 16));
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IO_Write(crtc_base+1,(Bit8u)((S3_LFB_BASE >> 16)&0xff));
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IO_Write(crtc_base,0x6b); // BIOS scratchpad
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IO_Write(crtc_base+1,(Bit8u)(S3_LFB_BASE >> 24));
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IO_Write(crtc_base+1,(Bit8u)((S3_LFB_BASE >> 24)&0xff));
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/* Setup some remaining S3 registers */
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IO_Write(crtc_base,0x41); // BIOS scratchpad
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@ -1255,7 +1253,7 @@ dac_text16:
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}
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IO_WriteB(crtc_base,0x50); IO_WriteB(crtc_base+1,reg_50);
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Bitu reg_31, reg_3a;
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Bit8u reg_31, reg_3a;
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switch (CurMode->type) {
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case M_LIN15:
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case M_LIN16:
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@ -1303,6 +1301,11 @@ dac_text16:
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}
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FinishSetMode(clearmem);
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/* Set vga attrib register into defined state */
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IO_Read(mono_mode ? 0x3ba : 0x3da);
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IO_Write(0x3c0,0x20);
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/* Load text mode font */
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if (CurMode->type==M_TEXT) {
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if (IS_VGA_ARCH) INT10_LoadFont(Real2Phys(int10.rom.font_16),true,256,0,0,16);
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