diff --git a/src/cpu/core_full/load.h b/src/cpu/core_full/load.h
index 25ccd258..1b33fe4c 100644
--- a/src/cpu/core_full/load.h
+++ b/src/cpu/core_full/load.h
@@ -321,6 +321,9 @@ l_M_Ed:
 	case D_CBW:
 		reg_ax=(Bit8s)reg_al;
 		goto nextopcode;
+	case D_CWDE:
+		reg_eax=(Bit16s)reg_ax;
+		goto nextopcode;
 	case D_CWD:
 		if (reg_ax & 0x8000) reg_dx=0xffff;
 		else reg_dx=0;
diff --git a/src/cpu/core_full/optable.h b/src/cpu/core_full/optable.h
index fb5b2877..011f41ab 100644
--- a/src/cpu/core_full/optable.h
+++ b/src/cpu/core_full/optable.h
@@ -465,7 +465,7 @@ static OpCode OpCodeTable[1024]={
 {L_REGd		,O_XCHG_EAX	,S_REGd	,REGI_SP},{L_REGd	,O_XCHG_EAX	,S_REGd	,REGI_BP},
 {L_REGd		,O_XCHG_EAX	,S_REGd	,REGI_SI},{L_REGd	,O_XCHG_EAX	,S_REGd	,REGI_DI},
 /* 0x298 - 0x29f */
-{D_CBW		,0			,0		,0		},{D_CDQ	,0			,0		,0		},
+{D_CWDE		,0			,0		,0		},{D_CDQ	,0			,0		,0		},
 {L_Ifd		,O_CALLFd	,0		,0		},{L_ERROR	,0			,0		,0		},
 {L_FLG		,0			,S_PUSHd,0		},{L_POPd	,0			,S_FLGd	,0		},
 {L_REGb		,0			,S_FLGb	,REGI_AH},{L_FLG	,0			,S_REGb	,REGI_AH},
diff --git a/src/cpu/core_full/support.h b/src/cpu/core_full/support.h
index 965316ff..23afd1db 100644
--- a/src/cpu/core_full/support.h
+++ b/src/cpu/core_full/support.h
@@ -31,7 +31,8 @@ enum {
 	D_POPAw,D_POPAd,
 	D_DAA,D_DAS,
 	D_AAA,D_AAS,
-	D_CBW,D_CWD,D_CDQ,
+	D_CBW,D_CWDE,
+	D_CWD,D_CDQ,
 	D_SETALC,
 	D_XLAT,
 	D_CLI,D_STI,D_STC,D_CLC,D_CMC,D_CLD,D_STD,