Fix the POP Mod/rm issue
Changes for new interrupts Some privileged instructions. Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@1447
This commit is contained in:
Sjoerd van der Berg
parent
f854f9a58c
commit
2fbf5e8972
6 changed files with 36 additions and 19 deletions
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@ -71,6 +71,7 @@ typedef PhysPt EAPoint;
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Bits Full_DeCode(void) {
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FullData inst;
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restart_core:
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if (CPU_Cycles<=0) return CBRET_NONE;
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if (!cpu.code.big) {
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inst.start_prefix=0x0;;
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inst.start_entry=0x0;
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@ -81,10 +82,9 @@ restart_core:
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EAPoint IPPoint;
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LoadIP();
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lflags.type=t_UNKNOWN;
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while (CPU_Cycles>0) {
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while (CPU_Cycles--) {
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#if C_DEBUG
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cycle_count++;
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CPU_Cycles--;
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#if C_HEAVY_DEBUG
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SaveIP();
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if (DEBUG_HeavyIsBreakpoint()) {
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@ -104,6 +104,7 @@ restartopcode:
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#include "core_full/save.h"
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nextopcode:;
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}
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exit_core:
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LEAVECORE;
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return CBRET_NONE;
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}
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@ -1,5 +1,12 @@
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switch (inst.code.load) {
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/* General loading */
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case L_POPwRM:
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inst.op1.w = Pop_16();
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goto case_L_MODRM;
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case L_POPdRM:
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inst.op1.d = Pop_32();
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goto case_L_MODRM;
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case_L_MODRM:
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case L_MODRM:
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inst.rm=Fetchb();
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inst.rm_index=(inst.rm >> 3) & 7;
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@ -245,7 +252,7 @@ l_M_Ed:
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break;
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/* Special cases */
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case L_DOUBLE:
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inst.entry|=0x100;
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inst.entry=inst.start_prefix^0x100;
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goto restartopcode;
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case L_PRESEG:
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inst.prefix|=PREFIX_SEG;
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@ -479,7 +486,7 @@ l_M_Ed:
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goto nextopcode;
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case D_HLT:
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LEAVECORE;
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CPU_HLT();
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CPU_HLT(IPPoint-inst.start);
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return CBRET_NONE;
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default:
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LOG(LOG_CPU,LOG_ERROR)("LOAD:Unhandled code %d opcode %X",inst.code.load,inst.entry);
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@ -340,10 +340,12 @@ switch (inst.code.op) {
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case O_INT:
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LEAVECORE;
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#if C_DEBUG
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if (((inst.entry & 0xFF)==0xcc) && DEBUG_Breakpoint()) return debugCallback;
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else if (DEBUG_IntBreakpoint(inst.op1.b)) return debugCallback;
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if (((inst.entry & 0xFF)==0xcc) && DEBUG_Breakpoint())
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return debugCallback;
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else if (DEBUG_IntBreakpoint(inst.op1.b))
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return debugCallback;
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#endif
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Interrupt(inst.op1.b);
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CPU_SW_Interrupt(inst.op1.b,IPPoint-inst.start);
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goto restart_core;
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case O_INb:
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reg_al=IO_Read(inst.op1.d);
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@ -444,12 +446,19 @@ switch (inst.code.op) {
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LOG(LOG_CPU,LOG_ERROR)("Group 7 Illegal subfunction %X",inst.rm_index);
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}
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break;
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case O_M_Cd_Rd:
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case O_M_CRx_Rd:
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CPU_SET_CRX(inst.rm_index,inst.op1.d);
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break;
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case O_M_Rd_Cd:
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case O_M_Rd_CRx:
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inst.op1.d=CPU_GET_CRX(inst.rm_index);
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break;
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case O_M_DRx_Rd:
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LOG(LOG_CPU,LOG_NORMAL)("MOV DR%d,%X",inst.rm_index,inst.op1.d);
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break;
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case O_M_Rd_DRx:
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inst.op1.d=0;
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LOG(LOG_CPU,LOG_NORMAL)("MOV %X,DR%d",inst.op1.d,inst.rm_index);
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break;
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case O_LAR:
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{
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FillFlags();
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@ -100,7 +100,7 @@ static OpCode OpCodeTable[1024]={
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{L_MODRM ,0 ,S_Eb ,M_Gb },{L_MODRM ,0 ,S_Ew ,M_Gw },
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{L_MODRM ,0 ,S_Gb ,M_Eb },{L_MODRM ,0 ,S_Gw ,M_Ew },
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{L_MODRM ,0 ,S_Ew ,M_SEG },{L_MODRM ,0 ,S_Gw ,M_EA },
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{L_MODRM ,0 ,S_SEGm ,M_Ew },{L_MODRM ,0 ,S_Ew ,M_POPw },
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{L_MODRM ,0 ,S_SEGm ,M_Ew },{L_POPwRM ,0 ,S_Ew ,M_None },
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/* 0x90 - 0x97 */
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{D_NOP ,0 ,0 ,0 },{L_REGw ,O_XCHG_AX ,S_REGw ,REGI_CX},
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@ -203,8 +203,8 @@ static OpCode OpCodeTable[1024]={
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{0 ,0 ,0 ,0 },{0 ,0 ,0 ,0 },
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/* 0x120 - 0x127 */
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{L_MODRM ,O_M_Rd_Cd ,S_Ed ,0 },{0 ,0 ,0 ,0 },
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{L_MODRM ,O_M_Cd_Rd ,0 ,M_Ed },{0 ,0 ,0 ,0 },
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{L_MODRM ,O_M_Rd_CRx ,S_Ed ,0 },{L_MODRM ,O_M_Rd_DRx ,S_Ed ,0 },
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{L_MODRM ,O_M_CRx_Rd ,0 ,M_Ed },{L_MODRM ,O_M_DRx_Rd ,0 ,M_Ed },
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{0 ,0 ,0 ,0 },{0 ,0 ,0 ,0 },
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{0 ,0 ,0 ,0 },{0 ,0 ,0 ,0 },
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@ -456,7 +456,7 @@ static OpCode OpCodeTable[1024]={
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{L_MODRM ,0 ,S_Eb ,M_Gb },{L_MODRM ,0 ,S_Ed ,M_Gd },
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{L_MODRM ,0 ,S_Gb ,M_Eb },{L_MODRM ,0 ,S_Gd ,M_Ed },
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{L_MODRM ,0 ,S_EdMw ,M_SEG },{L_MODRM ,0 ,S_Gd ,M_EA },
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{L_MODRM ,0 ,S_SEGm ,M_Ew },{L_MODRM ,0 ,S_Ed ,M_POPd },
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{L_MODRM ,0 ,S_SEGm ,M_Ew },{L_POPdRM ,0 ,S_Ed ,M_None },
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/* 0x290 - 0x297 */
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{D_NOP ,0 ,0 ,0 },{L_REGd ,O_XCHG_EAX ,S_REGd ,REGI_CX},
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@ -559,8 +559,8 @@ static OpCode OpCodeTable[1024]={
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{0 ,0 ,0 ,0 },{0 ,0 ,0 ,0 },
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/* 0x320 - 0x327 */
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{L_MODRM ,O_M_Rd_Cd ,S_Ed ,0 },{0 ,0 ,0 ,0 },
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{L_MODRM ,O_M_Cd_Rd ,0 ,M_Ed },{0 ,0 ,0 ,0 },
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{L_MODRM ,O_M_Rd_CRx ,S_Ed ,0 },{L_MODRM ,O_M_Rd_DRx ,S_Ed ,0 },
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{L_MODRM ,O_M_CRx_Rd ,0 ,M_Ed },{L_MODRM ,O_M_DRx_Rd ,0 ,M_Ed },
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{0 ,0 ,0 ,0 },{0 ,0 ,0 ,0 },
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{0 ,0 ,0 ,0 },{0 ,0 ,0 ,0 },
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@ -23,6 +23,7 @@
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count=1;
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} else {
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/* Calculate amount of ops to do before cycles run out */
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CPU_Cycles++;
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if ((count>(Bitu)CPU_Cycles) && (inst.code.op<R_SCASB)) {
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count_left=count-CPU_Cycles;
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count=CPU_Cycles;
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@ -2,7 +2,7 @@ enum {
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L_N=0,
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L_SKIP,
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/* Grouped ones using MOD/RM */
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L_MODRM,
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L_MODRM,L_POPwRM,L_POPdRM,
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L_Ib,L_Iw,L_Id,
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L_Ibx,L_Iwx,L_Idx, //Sign extend
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@ -15,8 +15,6 @@ enum {
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L_POPfw,L_POPfd,
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L_SEG,
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L_FLG,L_INTO,
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L_VAL,
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@ -82,7 +80,8 @@ enum {
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O_GRP6w,O_GRP6d,
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O_GRP7w,O_GRP7d,
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O_M_Cd_Rd,O_M_Rd_Cd,
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O_M_CRx_Rd,O_M_Rd_CRx,
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O_M_DRx_Rd,O_M_Rd_DRx,
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O_LAR,O_LSL,
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O_ARPL,
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