From 3070b19d737f180558d3859d193683ae7be0953b Mon Sep 17 00:00:00 2001 From: Sjoerd van der Berg Date: Sat, 26 Jul 2003 10:36:56 +0000 Subject: [PATCH] Little bit of cleaning up Callbacks now return from the cpu core. Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@1155 --- src/cpu/core_16/helpers.h | 3 +- src/cpu/core_16/main.h | 61 +++------ src/cpu/core_16/prefix_66.h | 19 +-- src/cpu/core_16/support.h | 78 +++++------ src/cpu/core_16/table_ea.h | 266 +++++++++++++++++------------------- src/cpu/slow_16.cpp | 31 +++-- 6 files changed, 206 insertions(+), 252 deletions(-) diff --git a/src/cpu/core_16/helpers.h b/src/cpu/core_16/helpers.h index c6586e1b..11099840 100644 --- a/src/cpu/core_16/helpers.h +++ b/src/cpu/core_16/helpers.h @@ -18,7 +18,7 @@ #define GetEAa \ - EAPoint eaa=(*lookupEATable)[rm](); + PhysPt eaa=(*lookupEATable)[rm](); #define GetRMEAa \ GetRM; \ @@ -140,3 +140,4 @@ GetEAa;FPU_ESC ## code ## _EA(rm,eaa); \ } \ } + diff --git a/src/cpu/core_16/main.h b/src/cpu/core_16/main.h index bf6ba202..97ff4080 100644 --- a/src/cpu/core_16/main.h +++ b/src/cpu/core_16/main.h @@ -82,7 +82,7 @@ restart: AXIw(SBBW);break; case 0x1e: /* PUSH DS */ Push_16(SegValue(ds));break; - case 0x1f: /* POP DS */ + case 0x1f: /* POP DS */ SegSet16(ds,Pop_16());break; case 0x20: /* AND Eb,Gb */ RMEbGb(ANDB);break; @@ -251,11 +251,8 @@ restart: break; case 0x67: /* Address Size Prefix */ #ifdef CPU_PREFIX_67 - prefix.mark|=PREFIX_ADDR; -#ifdef CPU_PREFIX_COUNT - prefix.count++; -#endif - lookupEATable=EAPrefixTable[prefix.mark]; + core_16.prefixes|=PREFIX_ADDR; + lookupEATable=EAPrefixTable[core_16.prefixes]; goto restart; #else NOTDONE; @@ -500,9 +497,9 @@ restart: } case 0x8d: /* LEA */ { - prefix.segbase=0; - prefix.mark|=PREFIX_SEG; - lookupEATable=EAPrefixTable[prefix.mark]; + core_16.segbase=0; + core_16.prefixes|=PREFIX_SEG; + lookupEATable=EAPrefixTable[core_16.prefixes]; GetRMrw;GetEAa; *rmrw=(Bit16u)eaa; break; @@ -600,22 +597,22 @@ restart: } case 0xa0: /* MOV AL,Ob */ { - reg_al=LoadMb(GetEADirect[prefix.mark]()); + reg_al=LoadMb(GetEADirect[core_16.prefixes]()); } break; case 0xa1: /* MOV AX,Ow */ { - reg_ax=LoadMw(GetEADirect[prefix.mark]()); + reg_ax=LoadMw(GetEADirect[core_16.prefixes]()); } break; case 0xa2: /* MOV Ob,AL */ { - SaveMb(GetEADirect[prefix.mark](),reg_al); + SaveMb(GetEADirect[core_16.prefixes](),reg_al); } break; case 0xa3: /* MOV Ow,AX */ { - SaveMw(GetEADirect[prefix.mark](),reg_ax); + SaveMw(GetEADirect[core_16.prefixes](),reg_ax); } break; case 0xa4: /* MOVSB */ @@ -777,7 +774,7 @@ restart: { Bit16u bytes=Fetchw();Bit8u level=Fetchb(); Push_16(reg_bp);reg_bp=reg_sp;reg_sp-=bytes; - EAPoint reader=SegBase(ss)+reg_bp; + PhysPt reader=SegBase(ss)+reg_bp; for (Bit8u i=1;i>3) & 7); break; diff --git a/src/cpu/core_16/prefix_66.h b/src/cpu/core_16/prefix_66.h index c23b4985..a4b479eb 100644 --- a/src/cpu/core_16/prefix_66.h +++ b/src/cpu/core_16/prefix_66.h @@ -155,11 +155,8 @@ switch(Fetchb()) { SegPrefix_66(gs);break; case 0x67: /* Address Size Prefix */ #ifdef CPU_PREFIX_67 - prefix.mark|=PREFIX_ADDR; -#ifdef CPU_PREFIX_COUNT - prefix.count++; -#endif - lookupEATable=EAPrefixTable[prefix.mark]; + core_16.prefixes|=PREFIX_ADDR; + lookupEATable=EAPrefixTable[core_16.prefixes]; goto restart_66; #else NOTDONE; @@ -262,9 +259,9 @@ switch(Fetchb()) { break; case 0x8d: /* LEA */ { - prefix.segbase=0; - prefix.mark|=PREFIX_SEG; - lookupEATable=EAPrefixTable[prefix.mark]; + core_16.segbase=0; + core_16.prefixes|=PREFIX_SEG; + lookupEATable=EAPrefixTable[core_16.prefixes]; GetRMrd;GetEAa; *rmrd=(Bit32u)eaa; break; @@ -317,10 +314,10 @@ switch(Fetchb()) { #endif break; case 0xa1: /* MOV EAX,Ow */ - reg_eax=LoadMd(GetEADirect[prefix.mark]()); + reg_eax=LoadMd(GetEADirect[core_16.prefixes]()); break; case 0xa3: /* MOV Ow,EAX */ - SaveMd(GetEADirect[prefix.mark](),reg_eax); + SaveMd(GetEADirect[core_16.prefixes](),reg_eax); break; case 0xa5: /* MOVSD */ { @@ -417,11 +414,9 @@ switch(Fetchb()) { IO_Write(reg_dx+3,(Bit8u)(reg_eax>>24)); break; case 0xf2: /* REPNZ */ - prefix.count++; Repeat_Normal(false,true); continue; case 0xf3: /* REPZ */ - prefix.count++; Repeat_Normal(true,true); continue; case 0xf7: /* GRP3 Ed(,Id) */ diff --git a/src/cpu/core_16/support.h b/src/cpu/core_16/support.h index 45957f70..ede6fe25 100644 --- a/src/cpu/core_16/support.h +++ b/src/cpu/core_16/support.h @@ -16,24 +16,23 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -EAPoint IPPoint; -#define SUBIP(a) IPPoint-=a -#define SETIP(a) IPPoint=SegBase(cs)+a -#define GETIP (Bit16u)(IPPoint-SegBase(cs)) +#define SUBIP(a) core_16.ip_lookup-=a +#define SETIP(a) core_16.ip_lookup=SegBase(cs)+a +#define GETIP (Bit16u)(core_16.ip_lookup-SegBase(cs)) #define SAVEIP reg_ip=GETIP -#define LOADIP IPPoint=SegBase(cs)+reg_ip +#define LOADIP core_16.ip_lookup=SegBase(cs)+reg_ip #define LEAVECORE \ SAVEIP; \ FILLFLAGS; static INLINE void ADDIP(Bit16u add) { - IPPoint=SegBase(cs)+((Bit16u)(((Bit16u)(IPPoint-SegBase(cs)))+(Bit16u)add)); + core_16.ip_lookup=SegBase(cs)+((Bit16u)(((Bit16u)(core_16.ip_lookup-SegBase(cs)))+(Bit16u)add)); } static INLINE void ADDIPFAST(Bit16s blah) { - IPPoint+=blah; + core_16.ip_lookup+=blah; } #define CheckTF() \ @@ -57,19 +56,19 @@ static INLINE void ADDIPFAST(Bit16s blah) { } static INLINE Bit8u Fetchb() { - Bit8u temp=LoadMb(IPPoint); - IPPoint+=1; + Bit8u temp=LoadMb(core_16.ip_lookup); + core_16.ip_lookup+=1; return temp; } static INLINE Bit16u Fetchw() { - Bit16u temp=LoadMw(IPPoint); - IPPoint+=2; + Bit16u temp=LoadMw(core_16.ip_lookup); + core_16.ip_lookup+=2; return temp; } static INLINE Bit32u Fetchd() { - Bit32u temp=LoadMd(IPPoint); - IPPoint+=4; + Bit32u temp=LoadMd(core_16.ip_lookup); + core_16.ip_lookup+=4; return temp; } @@ -135,14 +134,13 @@ static INLINE Bit32u Pop_32() { #define stringDI \ - EAPoint to; \ + PhysPt to; \ to=SegBase(es)+reg_di #define stringSI \ - EAPoint from; \ - if (prefix.mark & PREFIX_SEG) { \ - from=(prefix.segbase+reg_si); \ - PrefixReset; \ + PhysPt from; \ + if (core_16.prefixes & PREFIX_SEG) { \ + from=(core_16.segbase+reg_si); \ } else { \ from=SegBase(ds)+reg_si; \ } @@ -159,46 +157,39 @@ static void Repeat_Normal(bool testz,bool prefix_66) { if (GETFLAG(DF)) direct=-1; else direct=1; base_di=SegBase(es); - if (prefix.mark & PREFIX_ADDR) E_Exit("Unhandled 0x67 prefixed string op"); + if (core_16.prefixes & PREFIX_ADDR) E_Exit("Unhandled 0x67 prefixed string op"); rep_again: - if (prefix.mark & PREFIX_SEG) { - base_si=(prefix.segbase); + if (core_16.prefixes & PREFIX_SEG) { + base_si=(core_16.segbase); } else { base_si=SegBase(ds); } switch (Fetchb()) { case 0x26: /* ES Prefix */ - prefix.segbase=SegBase(es); - prefix.mark|=PREFIX_SEG; - prefix.count++; + core_16.segbase=SegBase(es); + core_16.prefixes|=PREFIX_SEG; goto rep_again; case 0x2e: /* CS Prefix */ - prefix.segbase=SegBase(cs); - prefix.mark|=PREFIX_SEG; - prefix.count++; + core_16.segbase=SegBase(cs); + core_16.prefixes|=PREFIX_SEG; goto rep_again; case 0x36: /* SS Prefix */ - prefix.segbase=SegBase(ss); - prefix.mark|=PREFIX_SEG; - prefix.count++; + core_16.segbase=SegBase(ss); + core_16.prefixes|=PREFIX_SEG; goto rep_again; case 0x3e: /* DS Prefix */ - prefix.segbase=SegBase(ds); - prefix.mark|=PREFIX_SEG; - prefix.count++; + core_16.segbase=SegBase(ds); + core_16.prefixes|=PREFIX_SEG; goto rep_again; case 0x64: /* FS Prefix */ - prefix.segbase=SegBase(fs); - prefix.mark|=PREFIX_SEG; - prefix.count++; + core_16.segbase=SegBase(fs); + core_16.prefixes|=PREFIX_SEG; goto rep_again; case 0x65: /* GS Prefix */ - prefix.segbase=SegBase(gs); - prefix.mark|=PREFIX_SEG; - prefix.count++; + core_16.segbase=SegBase(gs); + core_16.prefixes|=PREFIX_SEG; goto rep_again; case 0x66: /* Size Prefix */ - prefix.count++; prefix_66=!prefix_66; goto rep_again; case 0x6c: /* REP INSB */ @@ -398,13 +389,12 @@ rep_again: } break; default: - IPPoint--; + core_16.ip_lookup--; LOG(LOG_CPU,LOG_ERROR)("Unhandled REP Prefix %X",Fetchb()); goto normalexit; } /* If we end up here it's because the CPU_Cycles counter is 0, so restart instruction */ - IPPoint-=(prefix.count+2); /* Rep instruction and whatever string instruction */ -normalexit: - PrefixReset; + core_16.ip_lookup=core_16.ip_start; +normalexit:; } diff --git a/src/cpu/core_16/table_ea.h b/src/cpu/core_16/table_ea.h index 8cecfee7..28ec08b7 100644 --- a/src/cpu/core_16/table_ea.h +++ b/src/cpu/core_16/table_ea.h @@ -18,8 +18,8 @@ /* Some variables for EA Loolkup */ -typedef EAPoint (*GetEATable[256])(void); -typedef EAPoint (*EA_LookupHandler)(void); +typedef PhysPt (*GetEATable[256])(void); +typedef PhysPt (*EA_LookupHandler)(void); static GetEATable * lookupEATable; @@ -28,64 +28,51 @@ static GetEATable * lookupEATable; #define PREFIX_ADDR 0x2 #define PREFIX_SEG_ADDR 0x3 -static struct { - Bitu mark; - Bitu count; - EAPoint segbase; -} prefix; /* Gets initialized at the bottem, can't seem to declare forward references */ static GetEATable * EAPrefixTable[4]; #define SegPrefix(blah) \ - prefix.segbase=SegBase(blah); \ - prefix.mark|=PREFIX_SEG; \ - prefix.count++; \ - lookupEATable=EAPrefixTable[prefix.mark]; \ + core_16.segbase=SegBase(blah); \ + core_16.prefixes|=PREFIX_SEG; \ + lookupEATable=EAPrefixTable[core_16.prefixes]; \ goto restart; #define SegPrefix_66(blah) \ - prefix.segbase=SegBase(blah); \ - prefix.mark|=PREFIX_SEG; \ - prefix.count++; \ - lookupEATable=EAPrefixTable[prefix.mark]; \ + core_16.segbase=SegBase(blah); \ + core_16.prefixes|=PREFIX_SEG; \ + lookupEATable=EAPrefixTable[core_16.prefixes]; \ goto restart_66; -#define PrefixReset \ - prefix.mark=PREFIX_NONE; \ - prefix.count=0; \ - lookupEATable=EAPrefixTable[PREFIX_NONE]; - - /* The MOD/RM Decoder for EA for this decoder's addressing modes */ -static EAPoint EA_16_00_n(void) { return SegBase(ds)+(Bit16u)(reg_bx+(Bit16s)reg_si); } -static EAPoint EA_16_01_n(void) { return SegBase(ds)+(Bit16u)(reg_bx+(Bit16s)reg_di); } -static EAPoint EA_16_02_n(void) { return SegBase(ss)+(Bit16u)(reg_bp+(Bit16s)reg_si); } -static EAPoint EA_16_03_n(void) { return SegBase(ss)+(Bit16u)(reg_bp+(Bit16s)reg_di); } -static EAPoint EA_16_04_n(void) { return SegBase(ds)+(Bit16u)(reg_si); } -static EAPoint EA_16_05_n(void) { return SegBase(ds)+(Bit16u)(reg_di); } -static EAPoint EA_16_06_n(void) { return SegBase(ds)+(Bit16u)(Fetchw());} -static EAPoint EA_16_07_n(void) { return SegBase(ds)+(Bit16u)(reg_bx); } +static PhysPt EA_16_00_n(void) { return SegBase(ds)+(Bit16u)(reg_bx+(Bit16s)reg_si); } +static PhysPt EA_16_01_n(void) { return SegBase(ds)+(Bit16u)(reg_bx+(Bit16s)reg_di); } +static PhysPt EA_16_02_n(void) { return SegBase(ss)+(Bit16u)(reg_bp+(Bit16s)reg_si); } +static PhysPt EA_16_03_n(void) { return SegBase(ss)+(Bit16u)(reg_bp+(Bit16s)reg_di); } +static PhysPt EA_16_04_n(void) { return SegBase(ds)+(Bit16u)(reg_si); } +static PhysPt EA_16_05_n(void) { return SegBase(ds)+(Bit16u)(reg_di); } +static PhysPt EA_16_06_n(void) { return SegBase(ds)+(Bit16u)(Fetchw());} +static PhysPt EA_16_07_n(void) { return SegBase(ds)+(Bit16u)(reg_bx); } -static EAPoint EA_16_40_n(void) { return SegBase(ds)+(Bit16u)(reg_bx+(Bit16s)reg_si+Fetchbs()); } -static EAPoint EA_16_41_n(void) { return SegBase(ds)+(Bit16u)(reg_bx+(Bit16s)reg_di+Fetchbs()); } -static EAPoint EA_16_42_n(void) { return SegBase(ss)+(Bit16u)(reg_bp+(Bit16s)reg_si+Fetchbs()); } -static EAPoint EA_16_43_n(void) { return SegBase(ss)+(Bit16u)(reg_bp+(Bit16s)reg_di+Fetchbs()); } -static EAPoint EA_16_44_n(void) { return SegBase(ds)+(Bit16u)(reg_si+Fetchbs()); } -static EAPoint EA_16_45_n(void) { return SegBase(ds)+(Bit16u)(reg_di+Fetchbs()); } -static EAPoint EA_16_46_n(void) { return SegBase(ss)+(Bit16u)(reg_bp+Fetchbs()); } -static EAPoint EA_16_47_n(void) { return SegBase(ds)+(Bit16u)(reg_bx+Fetchbs()); } +static PhysPt EA_16_40_n(void) { return SegBase(ds)+(Bit16u)(reg_bx+(Bit16s)reg_si+Fetchbs()); } +static PhysPt EA_16_41_n(void) { return SegBase(ds)+(Bit16u)(reg_bx+(Bit16s)reg_di+Fetchbs()); } +static PhysPt EA_16_42_n(void) { return SegBase(ss)+(Bit16u)(reg_bp+(Bit16s)reg_si+Fetchbs()); } +static PhysPt EA_16_43_n(void) { return SegBase(ss)+(Bit16u)(reg_bp+(Bit16s)reg_di+Fetchbs()); } +static PhysPt EA_16_44_n(void) { return SegBase(ds)+(Bit16u)(reg_si+Fetchbs()); } +static PhysPt EA_16_45_n(void) { return SegBase(ds)+(Bit16u)(reg_di+Fetchbs()); } +static PhysPt EA_16_46_n(void) { return SegBase(ss)+(Bit16u)(reg_bp+Fetchbs()); } +static PhysPt EA_16_47_n(void) { return SegBase(ds)+(Bit16u)(reg_bx+Fetchbs()); } -static EAPoint EA_16_80_n(void) { return SegBase(ds)+(Bit16u)(reg_bx+(Bit16s)reg_si+Fetchws()); } -static EAPoint EA_16_81_n(void) { return SegBase(ds)+(Bit16u)(reg_bx+(Bit16s)reg_di+Fetchws()); } -static EAPoint EA_16_82_n(void) { return SegBase(ss)+(Bit16u)(reg_bp+(Bit16s)reg_si+Fetchws()); } -static EAPoint EA_16_83_n(void) { return SegBase(ss)+(Bit16u)(reg_bp+(Bit16s)reg_di+Fetchws()); } -static EAPoint EA_16_84_n(void) { return SegBase(ds)+(Bit16u)(reg_si+Fetchws()); } -static EAPoint EA_16_85_n(void) { return SegBase(ds)+(Bit16u)(reg_di+Fetchws()); } -static EAPoint EA_16_86_n(void) { return SegBase(ss)+(Bit16u)(reg_bp+Fetchws()); } -static EAPoint EA_16_87_n(void) { return SegBase(ds)+(Bit16u)(reg_bx+Fetchws()); } +static PhysPt EA_16_80_n(void) { return SegBase(ds)+(Bit16u)(reg_bx+(Bit16s)reg_si+Fetchws()); } +static PhysPt EA_16_81_n(void) { return SegBase(ds)+(Bit16u)(reg_bx+(Bit16s)reg_di+Fetchws()); } +static PhysPt EA_16_82_n(void) { return SegBase(ss)+(Bit16u)(reg_bp+(Bit16s)reg_si+Fetchws()); } +static PhysPt EA_16_83_n(void) { return SegBase(ss)+(Bit16u)(reg_bp+(Bit16s)reg_di+Fetchws()); } +static PhysPt EA_16_84_n(void) { return SegBase(ds)+(Bit16u)(reg_si+Fetchws()); } +static PhysPt EA_16_85_n(void) { return SegBase(ds)+(Bit16u)(reg_di+Fetchws()); } +static PhysPt EA_16_86_n(void) { return SegBase(ss)+(Bit16u)(reg_bp+Fetchws()); } +static PhysPt EA_16_87_n(void) { return SegBase(ds)+(Bit16u)(reg_bx+Fetchws()); } static GetEATable GetEA_16_n={ /* 00 */ @@ -123,34 +110,33 @@ static GetEATable GetEA_16_n={ }; -#define segprefixed(val) EAPoint ret=prefix.segbase+val;PrefixReset;return ret; -static EAPoint EA_16_00_s(void) { segprefixed((Bit16u)(reg_bx+(Bit16s)reg_si)) } -static EAPoint EA_16_01_s(void) { segprefixed((Bit16u)(reg_bx+(Bit16s)reg_di)) } -static EAPoint EA_16_02_s(void) { segprefixed((Bit16u)(reg_bp+(Bit16s)reg_si)) } -static EAPoint EA_16_03_s(void) { segprefixed((Bit16u)(reg_bp+(Bit16s)reg_di)) } -static EAPoint EA_16_04_s(void) { segprefixed((Bit16u)(reg_si)) } -static EAPoint EA_16_05_s(void) { segprefixed((Bit16u)(reg_di)) } -static EAPoint EA_16_06_s(void) { segprefixed((Bit16u)(Fetchw())) } -static EAPoint EA_16_07_s(void) { segprefixed((Bit16u)(reg_bx)) } +static PhysPt EA_16_00_s(void) { return core_16.segbase+(Bit16u)(reg_bx+(Bit16s)reg_si); } +static PhysPt EA_16_01_s(void) { return core_16.segbase+(Bit16u)(reg_bx+(Bit16s)reg_di); } +static PhysPt EA_16_02_s(void) { return core_16.segbase+(Bit16u)(reg_bp+(Bit16s)reg_si); } +static PhysPt EA_16_03_s(void) { return core_16.segbase+(Bit16u)(reg_bp+(Bit16s)reg_di); } +static PhysPt EA_16_04_s(void) { return core_16.segbase+(Bit16u)(reg_si); } +static PhysPt EA_16_05_s(void) { return core_16.segbase+(Bit16u)(reg_di); } +static PhysPt EA_16_06_s(void) { return core_16.segbase+(Bit16u)(Fetchw()); } +static PhysPt EA_16_07_s(void) { return core_16.segbase+(Bit16u)(reg_bx); } -static EAPoint EA_16_40_s(void) { segprefixed((Bit16u)(reg_bx+(Bit16s)reg_si+Fetchbs())) } -static EAPoint EA_16_41_s(void) { segprefixed((Bit16u)(reg_bx+(Bit16s)reg_di+Fetchbs())) } -static EAPoint EA_16_42_s(void) { segprefixed((Bit16u)(reg_bp+(Bit16s)reg_si+Fetchbs())) } -static EAPoint EA_16_43_s(void) { segprefixed((Bit16u)(reg_bp+(Bit16s)reg_di+Fetchbs())) } -static EAPoint EA_16_44_s(void) { segprefixed((Bit16u)(reg_si+Fetchbs())) } -static EAPoint EA_16_45_s(void) { segprefixed((Bit16u)(reg_di+Fetchbs())) } -static EAPoint EA_16_46_s(void) { segprefixed((Bit16u)(reg_bp+Fetchbs())) } -static EAPoint EA_16_47_s(void) { segprefixed((Bit16u)(reg_bx+Fetchbs())) } +static PhysPt EA_16_40_s(void) { return core_16.segbase+(Bit16u)(reg_bx+(Bit16s)reg_si+Fetchbs()); } +static PhysPt EA_16_41_s(void) { return core_16.segbase+(Bit16u)(reg_bx+(Bit16s)reg_di+Fetchbs()); } +static PhysPt EA_16_42_s(void) { return core_16.segbase+(Bit16u)(reg_bp+(Bit16s)reg_si+Fetchbs()); } +static PhysPt EA_16_43_s(void) { return core_16.segbase+(Bit16u)(reg_bp+(Bit16s)reg_di+Fetchbs()); } +static PhysPt EA_16_44_s(void) { return core_16.segbase+(Bit16u)(reg_si+Fetchbs()); } +static PhysPt EA_16_45_s(void) { return core_16.segbase+(Bit16u)(reg_di+Fetchbs()); } +static PhysPt EA_16_46_s(void) { return core_16.segbase+(Bit16u)(reg_bp+Fetchbs()); } +static PhysPt EA_16_47_s(void) { return core_16.segbase+(Bit16u)(reg_bx+Fetchbs()); } -static EAPoint EA_16_80_s(void) { segprefixed((Bit16u)(reg_bx+(Bit16s)reg_si+Fetchws())) } -static EAPoint EA_16_81_s(void) { segprefixed((Bit16u)(reg_bx+(Bit16s)reg_di+Fetchws())) } -static EAPoint EA_16_82_s(void) { segprefixed((Bit16u)(reg_bp+(Bit16s)reg_si+Fetchws())) } -static EAPoint EA_16_83_s(void) { segprefixed((Bit16u)(reg_bp+(Bit16s)reg_di+Fetchws())) } -static EAPoint EA_16_84_s(void) { segprefixed((Bit16u)(reg_si+Fetchws())) } -static EAPoint EA_16_85_s(void) { segprefixed((Bit16u)(reg_di+Fetchws())) } -static EAPoint EA_16_86_s(void) { segprefixed((Bit16u)(reg_bp+Fetchws())) } -static EAPoint EA_16_87_s(void) { segprefixed((Bit16u)(reg_bx+Fetchws())) } +static PhysPt EA_16_80_s(void) { return core_16.segbase+(Bit16u)(reg_bx+(Bit16s)reg_si+Fetchws()); } +static PhysPt EA_16_81_s(void) { return core_16.segbase+(Bit16u)(reg_bx+(Bit16s)reg_di+Fetchws()); } +static PhysPt EA_16_82_s(void) { return core_16.segbase+(Bit16u)(reg_bp+(Bit16s)reg_si+Fetchws()); } +static PhysPt EA_16_83_s(void) { return core_16.segbase+(Bit16u)(reg_bp+(Bit16s)reg_di+Fetchws()); } +static PhysPt EA_16_84_s(void) { return core_16.segbase+(Bit16u)(reg_si+Fetchws()); } +static PhysPt EA_16_85_s(void) { return core_16.segbase+(Bit16u)(reg_di+Fetchws()); } +static PhysPt EA_16_86_s(void) { return core_16.segbase+(Bit16u)(reg_bp+Fetchws()); } +static PhysPt EA_16_87_s(void) { return core_16.segbase+(Bit16u)(reg_bx+Fetchws()); } static GetEATable GetEA_16_s={ /* 00 */ @@ -190,9 +176,9 @@ static GetEATable GetEA_16_s={ static Bit32u SIBZero=0; static Bit32u * SIBIndex[8]= { ®_eax,®_ecx,®_edx,®_ebx,&SIBZero,®_ebp,®_esi,®_edi }; -INLINE EAPoint Sib(Bitu mode) { +INLINE PhysPt Sib(Bitu mode) { Bit8u sib=Fetchb(); - EAPoint base; + PhysPt base; switch (sib&7) { case 0: /* EAX Base */ base=SegBase(ds)+reg_eax;break; @@ -220,32 +206,32 @@ INLINE EAPoint Sib(Bitu mode) { }; -static EAPoint EA_32_00_n(void) { PrefixReset;return SegBase(ds)+reg_eax; } -static EAPoint EA_32_01_n(void) { PrefixReset;return SegBase(ds)+reg_ecx; } -static EAPoint EA_32_02_n(void) { PrefixReset;return SegBase(ds)+reg_edx; } -static EAPoint EA_32_03_n(void) { PrefixReset;return SegBase(ds)+reg_ebx; } -static EAPoint EA_32_04_n(void) { PrefixReset;return Sib(0);} -static EAPoint EA_32_05_n(void) { PrefixReset;return SegBase(ds)+Fetchd(); } -static EAPoint EA_32_06_n(void) { PrefixReset;return SegBase(ds)+reg_esi; } -static EAPoint EA_32_07_n(void) { PrefixReset;return SegBase(ds)+reg_edi; } +static PhysPt EA_32_00_n(void) { return SegBase(ds)+reg_eax; } +static PhysPt EA_32_01_n(void) { return SegBase(ds)+reg_ecx; } +static PhysPt EA_32_02_n(void) { return SegBase(ds)+reg_edx; } +static PhysPt EA_32_03_n(void) { return SegBase(ds)+reg_ebx; } +static PhysPt EA_32_04_n(void) { return Sib(0);} +static PhysPt EA_32_05_n(void) { return SegBase(ds)+Fetchd(); } +static PhysPt EA_32_06_n(void) { return SegBase(ds)+reg_esi; } +static PhysPt EA_32_07_n(void) { return SegBase(ds)+reg_edi; } -static EAPoint EA_32_40_n(void) { PrefixReset;return SegBase(ds)+reg_eax+Fetchbs(); } -static EAPoint EA_32_41_n(void) { PrefixReset;return SegBase(ds)+reg_ecx+Fetchbs(); } -static EAPoint EA_32_42_n(void) { PrefixReset;return SegBase(ds)+reg_edx+Fetchbs(); } -static EAPoint EA_32_43_n(void) { PrefixReset;return SegBase(ds)+reg_ebx+Fetchbs(); } -static EAPoint EA_32_44_n(void) { PrefixReset;EAPoint temp=Sib(1);return temp+Fetchbs();} -static EAPoint EA_32_45_n(void) { PrefixReset;return SegBase(ss)+reg_ebp+Fetchbs(); } -static EAPoint EA_32_46_n(void) { PrefixReset;return SegBase(ds)+reg_esi+Fetchbs(); } -static EAPoint EA_32_47_n(void) { PrefixReset;return SegBase(ds)+reg_edi+Fetchbs(); } +static PhysPt EA_32_40_n(void) { return SegBase(ds)+reg_eax+Fetchbs(); } +static PhysPt EA_32_41_n(void) { return SegBase(ds)+reg_ecx+Fetchbs(); } +static PhysPt EA_32_42_n(void) { return SegBase(ds)+reg_edx+Fetchbs(); } +static PhysPt EA_32_43_n(void) { return SegBase(ds)+reg_ebx+Fetchbs(); } +static PhysPt EA_32_44_n(void) { PhysPt temp=Sib(1);return temp+Fetchbs();} +static PhysPt EA_32_45_n(void) { return SegBase(ss)+reg_ebp+Fetchbs(); } +static PhysPt EA_32_46_n(void) { return SegBase(ds)+reg_esi+Fetchbs(); } +static PhysPt EA_32_47_n(void) { return SegBase(ds)+reg_edi+Fetchbs(); } -static EAPoint EA_32_80_n(void) { PrefixReset;return SegBase(ds)+reg_eax+Fetchds(); } -static EAPoint EA_32_81_n(void) { PrefixReset;return SegBase(ds)+reg_ecx+Fetchds(); } -static EAPoint EA_32_82_n(void) { PrefixReset;return SegBase(ds)+reg_edx+Fetchds(); } -static EAPoint EA_32_83_n(void) { PrefixReset;return SegBase(ds)+reg_ebx+Fetchds(); } -static EAPoint EA_32_84_n(void) { PrefixReset;EAPoint temp=Sib(2);return temp+Fetchds();} -static EAPoint EA_32_85_n(void) { PrefixReset;return SegBase(ss)+reg_ebp+Fetchds(); } -static EAPoint EA_32_86_n(void) { PrefixReset;return SegBase(ds)+reg_esi+Fetchds(); } -static EAPoint EA_32_87_n(void) { PrefixReset;return SegBase(ds)+reg_edi+Fetchds(); } +static PhysPt EA_32_80_n(void) { return SegBase(ds)+reg_eax+Fetchds(); } +static PhysPt EA_32_81_n(void) { return SegBase(ds)+reg_ecx+Fetchds(); } +static PhysPt EA_32_82_n(void) { return SegBase(ds)+reg_edx+Fetchds(); } +static PhysPt EA_32_83_n(void) { return SegBase(ds)+reg_ebx+Fetchds(); } +static PhysPt EA_32_84_n(void) { PhysPt temp=Sib(2);return temp+Fetchds();} +static PhysPt EA_32_85_n(void) { return SegBase(ss)+reg_ebp+Fetchds(); } +static PhysPt EA_32_86_n(void) { return SegBase(ds)+reg_esi+Fetchds(); } +static PhysPt EA_32_87_n(void) { return SegBase(ds)+reg_edi+Fetchds(); } static GetEATable GetEA_32_n={ /* 00 */ @@ -282,64 +268,62 @@ static GetEATable GetEA_32_n={ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; -INLINE EAPoint Sib_s(Bitu mode) { +INLINE PhysPt Sib_s(Bitu mode) { Bit8u sib=Fetchb(); - EAPoint base; + PhysPt base; switch (sib&7) { case 0: /* EAX Base */ - base=prefix.segbase+reg_eax;break; + base=core_16.segbase+reg_eax;break; case 1: /* ECX Base */ - base=prefix.segbase+reg_ecx;break; + base=core_16.segbase+reg_ecx;break; case 2: /* EDX Base */ - base=prefix.segbase+reg_edx;break; + base=core_16.segbase+reg_edx;break; case 3: /* EBX Base */ - base=prefix.segbase+reg_ebx;break; + base=core_16.segbase+reg_ebx;break; case 4: /* ESP Base */ - base=prefix.segbase+reg_esp;break; + base=core_16.segbase+reg_esp;break; case 5: /* #1 Base */ if (!mode) { - base=prefix.segbase+Fetchd();break; + base=core_16.segbase+Fetchd();break; } else { - base=prefix.segbase+reg_ebp;break; + base=core_16.segbase+reg_ebp;break; } case 6: /* ESI Base */ - base=prefix.segbase+reg_esi;break; + base=core_16.segbase+reg_esi;break; case 7: /* EDI Base */ - base=prefix.segbase+reg_edi;break; + base=core_16.segbase+reg_edi;break; } base+=*SIBIndex[(sib >> 3) &7] << (sib >> 6); - PrefixReset; return base; }; -#define segprefixed_32(val) EAPoint ret=prefix.segbase+(Bit32u)(val);PrefixReset;return ret; -static EAPoint EA_32_00_s(void) { segprefixed_32(reg_eax); } -static EAPoint EA_32_01_s(void) { segprefixed_32(reg_ecx); } -static EAPoint EA_32_02_s(void) { segprefixed_32(reg_edx); } -static EAPoint EA_32_03_s(void) { segprefixed_32(reg_ebx); } -static EAPoint EA_32_04_s(void) { return Sib_s(0);} -static EAPoint EA_32_05_s(void) { segprefixed_32(Fetchd()); } -static EAPoint EA_32_06_s(void) { segprefixed_32(reg_esi); } -static EAPoint EA_32_07_s(void) { segprefixed_32(reg_edi); } +static PhysPt EA_32_00_s(void) { return core_16.segbase+(Bit32u)(reg_eax); } +static PhysPt EA_32_01_s(void) { return core_16.segbase+(Bit32u)(reg_ecx); } +static PhysPt EA_32_02_s(void) { return core_16.segbase+(Bit32u)(reg_edx); } +static PhysPt EA_32_03_s(void) { return core_16.segbase+(Bit32u)(reg_ebx); } +static PhysPt EA_32_04_s(void) { return core_16.segbase+(Bit32u)(Sib_s(0));} +static PhysPt EA_32_05_s(void) { return core_16.segbase+(Bit32u)(Fetchd()); } +static PhysPt EA_32_06_s(void) { return core_16.segbase+(Bit32u)(reg_esi); } +static PhysPt EA_32_07_s(void) { return core_16.segbase+(Bit32u)(reg_edi); } -static EAPoint EA_32_40_s(void) { segprefixed_32(reg_eax+Fetchbs()); } -static EAPoint EA_32_41_s(void) { segprefixed_32(reg_ecx+Fetchbs()); } -static EAPoint EA_32_42_s(void) { segprefixed_32(reg_edx+Fetchbs()); } -static EAPoint EA_32_43_s(void) { segprefixed_32(reg_ebx+Fetchbs()); } -static EAPoint EA_32_44_s(void) { return Sib_s(1)+Fetchbs();} -static EAPoint EA_32_45_s(void) { segprefixed_32(reg_ebp+Fetchbs()); } -static EAPoint EA_32_46_s(void) { segprefixed_32(reg_esi+Fetchbs()); } -static EAPoint EA_32_47_s(void) { segprefixed_32(reg_edi+Fetchbs()); } +static PhysPt EA_32_40_s(void) { return core_16.segbase+(Bit32u)(reg_eax+Fetchbs()); } +static PhysPt EA_32_41_s(void) { return core_16.segbase+(Bit32u)(reg_ecx+Fetchbs()); } +static PhysPt EA_32_42_s(void) { return core_16.segbase+(Bit32u)(reg_edx+Fetchbs()); } +static PhysPt EA_32_43_s(void) { return core_16.segbase+(Bit32u)(reg_ebx+Fetchbs()); } +static PhysPt EA_32_44_s(void) { return core_16.segbase+(Bit32u)(Sib_s(1)+Fetchbs());} +static PhysPt EA_32_45_s(void) { return core_16.segbase+(Bit32u)(reg_ebp+Fetchbs()); } +static PhysPt EA_32_46_s(void) { return core_16.segbase+(Bit32u)(reg_esi+Fetchbs()); } +static PhysPt EA_32_47_s(void) { return core_16.segbase+(Bit32u)(reg_edi+Fetchbs()); } -static EAPoint EA_32_80_s(void) { segprefixed_32(reg_eax+Fetchds()); } -static EAPoint EA_32_81_s(void) { segprefixed_32(reg_ecx+Fetchds()); } -static EAPoint EA_32_82_s(void) { segprefixed_32(reg_edx+Fetchds()); } -static EAPoint EA_32_83_s(void) { segprefixed_32(reg_ebx+Fetchds()); } -static EAPoint EA_32_84_s(void) { return Sib_s(2)+Fetchds();} -static EAPoint EA_32_85_s(void) { segprefixed_32(reg_ebp+Fetchds()); } -static EAPoint EA_32_86_s(void) { segprefixed_32(reg_esi+Fetchds()); } -static EAPoint EA_32_87_s(void) { segprefixed_32(reg_edi+Fetchds()); } +static PhysPt EA_32_80_s(void) { return core_16.segbase+(Bit32u)(reg_eax+Fetchds()); } +static PhysPt EA_32_81_s(void) { return core_16.segbase+(Bit32u)(reg_ecx+Fetchds()); } +static PhysPt EA_32_82_s(void) { return core_16.segbase+(Bit32u)(reg_edx+Fetchds()); } +static PhysPt EA_32_83_s(void) { return core_16.segbase+(Bit32u)(reg_ebx+Fetchds()); } +static PhysPt EA_32_84_s(void) { return core_16.segbase+(Bit32u)(Sib_s(2)+Fetchds());} +static PhysPt EA_32_85_s(void) { return core_16.segbase+(Bit32u)(reg_ebp+Fetchds()); } +static PhysPt EA_32_86_s(void) { return core_16.segbase+(Bit32u)(reg_esi+Fetchds()); } +static PhysPt EA_32_87_s(void) { return core_16.segbase+(Bit32u)(reg_edi+Fetchds()); } static GetEATable GetEA_32_s={ @@ -377,20 +361,20 @@ static GetEATable GetEA_32_s={ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; -static EAPoint GetEADirect_NONE(void) { - EAPoint result=SegBase(ds)+Fetchw(); +static PhysPt GetEADirect_NONE(void) { + PhysPt result=SegBase(ds)+Fetchw(); return result; } -static EAPoint GetEADirect_SEG(void) { - EAPoint result=prefix.segbase+Fetchw();PrefixReset; +static PhysPt GetEADirect_SEG(void) { + PhysPt result=core_16.segbase+Fetchw(); return result; } -static EAPoint GetEADirect_ADDR(void) { - EAPoint result=SegBase(ds)+Fetchd();PrefixReset; +static PhysPt GetEADirect_ADDR(void) { + PhysPt result=SegBase(ds)+Fetchd(); return result; } -static EAPoint GetEADirect_SEG_ADDR(void) { - EAPoint result=prefix.segbase+Fetchd();PrefixReset; +static PhysPt GetEADirect_SEG_ADDR(void) { + PhysPt result=core_16.segbase+Fetchd(); return result; } diff --git a/src/cpu/slow_16.cpp b/src/cpu/slow_16.cpp index 091e52f5..67b08d87 100644 --- a/src/cpu/slow_16.cpp +++ b/src/cpu/slow_16.cpp @@ -57,21 +57,25 @@ extern Bitu cycle_count; /* Enable parts of the cpu emulation */ #define CPU_386 //Enable 386 instructions #define CPU_PREFIX_67 //Enable the 0x67 prefix -#define CPU_PREFIX_COUNT //Enable counting of prefixes #define CPU_PIC_CHECK //Check for IRQ's on critical moment #if C_FPU #define CPU_FPU //Enable FPU escape instructions #endif - +static struct { + Bitu prefixes; + PhysPt segbase; + PhysPt ip_lookup; + PhysPt ip_start; +}core_16 ; #include "instructions.h" #include "core_16/support.h" -static Bitu CPU_Real_16_Slow_Decode_Trap(void); +static Bits CPU_Real_16_Slow_Decode_Trap(void); -static Bitu CPU_Real_16_Slow_Decode(void) { +static Bits CPU_Real_16_Slow_Decode(void) { decode_start: LOADIP; flags.type=t_UNKNOWN; @@ -83,12 +87,10 @@ decode_start: if (DEBUG_HeavyIsBreakpoint()) return 1; #endif #endif + core_16.ip_start=core_16.ip_lookup; + core_16.prefixes=0; + lookupEATable=EAPrefixTable[0]; #include "core_16/main.h" - if (prefix.count) { - PrefixReset; - //DEBUG_HeavyWriteLogInstruction(); - LOG(LOG_CPU,LOG_NORMAL)("Prefix for non prefixed instruction"); - } CPU_Cycles--; } decode_end: @@ -96,11 +98,11 @@ decode_end: return CBRET_NONE; } -static Bitu CPU_Real_16_Slow_Decode_Trap(void) { +static Bits CPU_Real_16_Slow_Decode_Trap(void) { Bits oldCycles = CPU_Cycles; CPU_Cycles = 1; - CPU_Real_16_Slow_Decode(); + Bits ret=CPU_Real_16_Slow_Decode(); // LOG_DEBUG("TRAP: Trap Flag executed"); Interrupt(1); @@ -108,15 +110,16 @@ static Bitu CPU_Real_16_Slow_Decode_Trap(void) { CPU_Cycles = oldCycles-1; cpudecoder = &CPU_Real_16_Slow_Decode; - return CBRET_NONE; + return ret; } -void CPU_Real_16_Slow_Start(void) { +void CPU_Real_16_Slow_Start(bool big) { + if (big) E_Exit("Core 16 only runs 16-bit code"); cpudecoder=&CPU_Real_16_Slow_Decode; EAPrefixTable[2]=&GetEA_32_n; EAPrefixTable[3]=&GetEA_32_s; EAPrefixTable[0]=&GetEA_16_n; EAPrefixTable[1]=&GetEA_16_s; - PrefixReset; + };