diff --git a/src/cpu/core_full.cpp b/src/cpu/core_full.cpp
index 455df95f..f49edb9c 100644
--- a/src/cpu/core_full.cpp
+++ b/src/cpu/core_full.cpp
@@ -61,7 +61,7 @@ typedef PhysPt EAPoint;
 #define EXCEPTION(blah)										\
 	{														\
 		Bit8u new_num=blah;									\
-		IPPoint=inst.start_entry;							\
+		IPPoint=inst.opcode_start;							\
 		LEAVECORE;											\
 		CPU_Exception(new_num,0);							\
 		LoadIP();											\
@@ -93,7 +93,7 @@ restart_core:
 		};
 #endif
 #endif
-		inst.start=IPPoint;
+		inst.opcode_start=IPPoint;
 		inst.entry=inst.start_entry;
 		inst.prefix=inst.start_prefix;
 restartopcode:
diff --git a/src/cpu/core_full/load.h b/src/cpu/core_full/load.h
index dd7c2db5..d5b7987b 100644
--- a/src/cpu/core_full/load.h
+++ b/src/cpu/core_full/load.h
@@ -359,14 +359,14 @@ l_M_Ed:
 	case D_POPSEGw:
 		if (CPU_SetSegGeneral((SegNames)inst.code.extra,Pop_16())) {
 			LEAVECORE;
-			reg_eip-=(IPPoint-inst.start);reg_esp-=2;
+			reg_eip-=(IPPoint-inst.opcode_start);reg_esp-=2;
 			CPU_StartException();goto restart_core;
 		}
 		goto nextopcode;
 	case D_POPSEGd:
 		if (CPU_SetSegGeneral((SegNames)inst.code.extra,Pop_32())) {
 			LEAVECORE;
-			reg_eip-=(IPPoint-inst.start);reg_esp-=4;
+			reg_eip-=(IPPoint-inst.opcode_start);reg_esp-=4;
 			CPU_StartException();goto restart_core;
 		}
 		goto nextopcode;
@@ -524,7 +524,7 @@ l_M_Ed:
 		goto nextopcode;
 	case D_HLT:
 		LEAVECORE;
-		CPU_HLT(IPPoint-inst.start);
+		CPU_HLT(IPPoint-inst.opcode_start);
 		return CBRET_NONE;
 	default:
 		LOG(LOG_CPU,LOG_ERROR)("LOAD:Unhandled code %d opcode %X",inst.code.load,inst.entry);
diff --git a/src/cpu/core_full/op.h b/src/cpu/core_full/op.h
index 045180b2..5d4ee345 100644
--- a/src/cpu/core_full/op.h
+++ b/src/cpu/core_full/op.h
@@ -345,7 +345,7 @@ switch (inst.code.op) {
 		else if (DEBUG_IntBreakpoint(inst.op1.b)) 
 			return debugCallback;
 #endif
-		CPU_SW_Interrupt(inst.op1.b,IPPoint-inst.start);
+		CPU_SW_Interrupt(inst.op1.b,IPPoint-inst.opcode_start);
 		goto restart_core;
 	case O_INb:
 		reg_al=IO_ReadB(inst.op1.d);
diff --git a/src/cpu/core_full/save.h b/src/cpu/core_full/save.h
index e732a047..157364c6 100644
--- a/src/cpu/core_full/save.h
+++ b/src/cpu/core_full/save.h
@@ -58,7 +58,7 @@ switch (inst.code.save) {
 	case S_SEGm:
 		if (CPU_SetSegGeneral((SegNames)inst.rm_index,inst.op1.w)) {
 			LEAVECORE;
-			reg_eip-=(IPPoint-inst.start);
+			reg_eip-=(IPPoint-inst.opcode_start);
 			CPU_StartException();
 			goto restart_core;
 		}
@@ -66,7 +66,7 @@ switch (inst.code.save) {
 	case S_SEGGw:
 		if (CPU_SetSegGeneral((SegNames)inst.code.extra,inst.op2.w)) {
 			LEAVECORE;
-			reg_eip-=(IPPoint-inst.start);
+			reg_eip-=(IPPoint-inst.opcode_start);
 			CPU_StartException();
 			goto restart_core;
 		}
@@ -75,7 +75,7 @@ switch (inst.code.save) {
 	case S_SEGGd:
 		if (CPU_SetSegGeneral((SegNames)inst.code.extra,inst.op2.w)) {
 			LEAVECORE;
-			reg_eip-=(IPPoint-inst.start);
+			reg_eip-=(IPPoint-inst.opcode_start);
 			CPU_StartException();
 			goto restart_core;
 		}
diff --git a/src/cpu/core_full/string.h b/src/cpu/core_full/string.h
index 036a8f3f..5556f444 100644
--- a/src/cpu/core_full/string.h
+++ b/src/cpu/core_full/string.h
@@ -28,7 +28,7 @@
 			count_left=count-CPU_Cycles;
 			count=CPU_Cycles;
 			CPU_Cycles=0;
-			IPPoint=inst.start;		//Reset IP to start of instruction
+			IPPoint=inst.opcode_start;		//Reset IP to start of instruction
 		} else {
 			/* Won't interrupt scas and cmps instruction since they can interrupt themselves */
 			count_left=0;
diff --git a/src/cpu/core_full/support.h b/src/cpu/core_full/support.h
index 5d4b2fd4..d3e94623 100644
--- a/src/cpu/core_full/support.h
+++ b/src/cpu/core_full/support.h
@@ -155,7 +155,7 @@ struct OpCode {
 
 struct FullData {
 	Bitu entry;
-	EAPoint start;
+	EAPoint opcode_start;
 	Bitu rm;
 	EAPoint rm_eaa;
 	Bitu rm_off;