Seperate read and write faults(wd). And lowered priority a bit of the log messages
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@2092
This commit is contained in:
parent
d17551ad8c
commit
3fd1789b95
1 changed files with 23 additions and 16 deletions
|
@ -105,7 +105,7 @@ Bitu DEBUG_EnableDebugger(void);
|
|||
|
||||
bool first=false;
|
||||
|
||||
void PAGING_PageFault(PhysPt lin_addr,Bitu page_addr,Bitu type) {
|
||||
void PAGING_PageFault(PhysPt lin_addr,Bitu page_addr,bool writefault,Bitu faultcode) {
|
||||
/* Save the state of the cpu cores */
|
||||
LazyFlags old_lflags;
|
||||
memcpy(&old_lflags,&lflags,sizeof(LazyFlags));
|
||||
|
@ -114,14 +114,14 @@ void PAGING_PageFault(PhysPt lin_addr,Bitu page_addr,Bitu type) {
|
|||
cpudecoder=&PageFaultCore;
|
||||
paging.cr2=lin_addr;
|
||||
PF_Entry * entry=&pf_queue.entries[pf_queue.used++];
|
||||
LOG(LOG_PAGING,LOG_NORMAL)("PageFault at %X type %d queue %d",lin_addr,type,pf_queue.used);
|
||||
LOG(LOG_PAGING,LOG_NORMAL)("PageFault at %X type [%x:%x] queue %d",lin_addr,writefault,faultcode,pf_queue.used);
|
||||
// LOG_MSG("EAX:%04X ECX:%04X EDX:%04X EBX:%04X",reg_eax,reg_ecx,reg_edx,reg_ebx);
|
||||
// LOG_MSG("CS:%04X EIP:%08X SS:%04x SP:%08X",SegValue(cs),reg_eip,SegValue(ss),reg_esp);
|
||||
entry->cs=SegValue(cs);
|
||||
entry->eip=reg_eip;
|
||||
entry->page_addr=page_addr;
|
||||
//Caused by a write by default?
|
||||
CPU_Exception(14,0x2 );
|
||||
CPU_Exception(14,(writefault?0x02:0x00) | faultcode);
|
||||
#if C_DEBUG
|
||||
// DEBUG_EnableDebugger();
|
||||
#endif
|
||||
|
@ -137,30 +137,30 @@ class InitPageHandler : public PageHandler {
|
|||
public:
|
||||
InitPageHandler() {flags=PFLAG_INIT|PFLAG_NOCODE;}
|
||||
Bitu readb(PhysPt addr) {
|
||||
InitPage(addr);
|
||||
InitPage(addr,false);
|
||||
return mem_readb(addr);
|
||||
}
|
||||
Bitu readw(PhysPt addr) {
|
||||
InitPage(addr);
|
||||
InitPage(addr,false);
|
||||
return mem_readw(addr);
|
||||
}
|
||||
Bitu readd(PhysPt addr) {
|
||||
InitPage(addr);
|
||||
InitPage(addr,false);
|
||||
return mem_readd(addr);
|
||||
}
|
||||
void writeb(PhysPt addr,Bitu val) {
|
||||
InitPage(addr);
|
||||
InitPage(addr,true);
|
||||
mem_writeb(addr,val);
|
||||
}
|
||||
void writew(PhysPt addr,Bitu val) {
|
||||
InitPage(addr);
|
||||
InitPage(addr,true);
|
||||
mem_writew(addr,val);
|
||||
}
|
||||
void writed(PhysPt addr,Bitu val) {
|
||||
InitPage(addr);
|
||||
InitPage(addr,true);
|
||||
mem_writed(addr,val);
|
||||
}
|
||||
void InitPage(Bitu lin_addr) {
|
||||
void InitPage(Bitu lin_addr,bool writing) {
|
||||
Bitu lin_page=lin_addr >> 12;
|
||||
Bitu phys_page;
|
||||
if (paging.enabled) {
|
||||
|
@ -170,25 +170,32 @@ public:
|
|||
X86PageEntry table;
|
||||
table.load=phys_readd(table_addr);
|
||||
if (!table.block.p) {
|
||||
LOG(LOG_PAGING,LOG_ERROR)("NP Table");
|
||||
PAGING_PageFault(lin_addr,table_addr,0);
|
||||
LOG(LOG_PAGING,LOG_NORMAL)("NP Table");
|
||||
PAGING_PageFault(lin_addr,table_addr,false,0); // read fault
|
||||
table.load=phys_readd(table_addr);
|
||||
if (!table.block.p)
|
||||
E_Exit("Pagefault didn't correct table");
|
||||
}
|
||||
table.block.a=table.block.d=1; //Set access/Dirty
|
||||
table.block.a=1; //Set access
|
||||
phys_writed(table_addr,table.load);
|
||||
X86PageEntry entry;
|
||||
Bitu entry_addr=(table.block.base<<12)+t_index*4;
|
||||
entry.load=phys_readd(entry_addr);
|
||||
if (!entry.block.p) {
|
||||
LOG(LOG_PAGING,LOG_ERROR)("NP Page");
|
||||
PAGING_PageFault(lin_addr,entry_addr,0);
|
||||
// LOG(LOG_PAGING,LOG_NORMAL)("NP Page");
|
||||
PAGING_PageFault(lin_addr,entry_addr,false,0);
|
||||
entry.load=phys_readd(entry_addr);
|
||||
if (!entry.block.p)
|
||||
E_Exit("Pagefault didn't correct page");
|
||||
}
|
||||
entry.block.a=entry.block.d=1; //Set access/Dirty
|
||||
entry.block.a=1; //Set access
|
||||
if (cpu.cpl==3) {
|
||||
if ((entry.block.us==0) || (table.block.us==0) || (((entry.block.wr==0) || (table.block.wr==0)) && writing)) {
|
||||
LOG(LOG_PAGING,LOG_NORMAL)("Page access denied: cpl=%i, %x:%x:%x:%x",cpu.cpl,entry.block.us,table.block.us,entry.block.wr,table.block.wr);
|
||||
PAGING_PageFault(lin_addr,entry_addr,writing,0x05);
|
||||
}
|
||||
}
|
||||
entry.block.d=1; //Set dirty
|
||||
phys_writed(entry_addr,entry.load);
|
||||
phys_page=entry.block.base;
|
||||
} else {
|
||||
|
|
Loading…
Add table
Reference in a new issue