From 417fb048ba059318030693a77ae35027f368556d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Sebastian=20Strohh=C3=A4cker?= Date: Tue, 27 Sep 2005 11:05:44 +0000 Subject: [PATCH] better vga compatibility (rom strings, initial mode field) for 221b Baker Street/Coloring Book 2; fixes for monochrome modes, clearmem flag; corrections from ih8regs Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@2320 --- src/ints/int10.cpp | 2 +- src/ints/int10_memory.cpp | 13 ++++--- src/ints/int10_misc.cpp | 8 ++-- src/ints/int10_modes.cpp | 79 +++++++++++++++++++++++++++++++-------- src/ints/int10_pal.cpp | 28 ++++++++------ src/ints/int10_vesa.cpp | 4 +- 6 files changed, 95 insertions(+), 39 deletions(-) diff --git a/src/ints/int10.cpp b/src/ints/int10.cpp index 40f1d5c1..1cd0d074 100644 --- a/src/ints/int10.cpp +++ b/src/ints/int10.cpp @@ -125,7 +125,7 @@ static Bitu INT10_Handler(void) { break; case 0x0F: /* Get videomode */ reg_bh=real_readb(BIOSMEM_SEG,BIOSMEM_CURRENT_PAGE); - reg_al=real_readb(BIOSMEM_SEG,BIOSMEM_CURRENT_MODE); + reg_al=real_readb(BIOSMEM_SEG,BIOSMEM_CURRENT_MODE)|(real_readb(BIOSMEM_SEG,BIOSMEM_VIDEO_CTL)&0x80); reg_ah=(Bit8u)real_readw(BIOSMEM_SEG,BIOSMEM_NB_COLS); break; case 0x10: /* EGA/VGA Palette functions */ diff --git a/src/ints/int10_memory.cpp b/src/ints/int10_memory.cpp index 6d391bdf..52f51a3d 100644 --- a/src/ints/int10_memory.cpp +++ b/src/ints/int10_memory.cpp @@ -72,17 +72,20 @@ void INT10_LoadFont(PhysPt font,bool reload,Bitu count,Bitu offset,Bitu map,Bitu } } - - - void INT10_SetupRomMemory(void) { /* This should fill up certain structures inside the Video Bios Rom Area */ PhysPt rom_base=PhysMake(0xc000,0); Bitu i; - int10.rom.used=3; // int10.rom.used=2; Size of ROM added + int10.rom.used=3; if (machine==MCH_VGA) { + // set up the start of the ROM phys_writew(rom_base+0,0xaa55); - phys_writeb(rom_base+2,0x40); // Size of ROM: 64 512-blocks = 32KB + phys_writeb(rom_base+2,0x40); // Size of ROM: 64 512-blocks = 32KB + phys_writeb(rom_base+0x1e,0x49); // IBM string + phys_writeb(rom_base+0x1f,0x42); + phys_writeb(rom_base+0x20,0x4d); + phys_writeb(rom_base+0x21,0x00); + int10.rom.used=0x100; } int10.rom.font_8_first=RealMake(0xC000,int10.rom.used); for (i=0;i<128*8;i++) { diff --git a/src/ints/int10_misc.cpp b/src/ints/int10_misc.cpp index 299d150f..92d7fea5 100644 --- a/src/ints/int10_misc.cpp +++ b/src/ints/int10_misc.cpp @@ -92,13 +92,13 @@ void INT10_GetFuncStateInformation(PhysPt save) { Bit16u col_count=0; switch (CurMode->type) { case M_TEXT: - col_count=16;break; + if (CurMode->mode==0x7) col_count=1; else col_count=16;break; case M_CGA2: col_count=2;break; case M_CGA4: col_count=4;break; case M_EGA16: - col_count=16;break; + if (CurMode->mode==0x11 || CurMode->mode==0x0f) col_count=2; else col_count=16;break; case M_VGA: col_count=256;break; default: @@ -119,7 +119,9 @@ void INT10_GetFuncStateInformation(PhysPt save) { case 480: mem_writeb(save+0x2a,3);break; }; - //TODO Maybe misc flags + /* misc flags */ + if (CurMode->type==M_TEXT) mem_writeb(save+0x2d,0x21); + else mem_writeb(save+0x2d,0x01); /* Video Memory available */ mem_writeb(save+0x31,3); } diff --git a/src/ints/int10_modes.cpp b/src/ints/int10_modes.cpp index 673025b8..24d433be 100644 --- a/src/ints/int10_modes.cpp +++ b/src/ints/int10_modes.cpp @@ -38,9 +38,9 @@ VideoModeBlock ModeList_VGA[]={ { 0x001 ,M_TEXT ,360 ,400 ,40 ,25 ,9 ,16 ,8 ,0xB8000 ,0x0800 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK }, { 0x002 ,M_TEXT ,720 ,400 ,80 ,25 ,9 ,16 ,8 ,0xB8000 ,0x1000 ,100 ,449 ,80 ,400 ,0 }, { 0x003 ,M_TEXT ,720 ,400 ,80 ,25 ,9 ,16 ,8 ,0xB8000 ,0x1000 ,100 ,449 ,80 ,400 ,0 }, -{ 0x004 ,M_CGA4 ,320 ,200 ,40 ,25 ,8 ,8 ,4 ,0xB8000 ,0x0800 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE}, -{ 0x005 ,M_CGA4 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xB8000 ,0x0800 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE}, -{ 0x006 ,M_CGA2 ,640 ,200 ,80 ,25 ,8 ,8 ,1 ,0xB8000 ,0x0800 ,100 ,449 ,80 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE}, +{ 0x004 ,M_CGA4 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xB8000 ,0x4000 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE}, +{ 0x005 ,M_CGA4 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xB8000 ,0x4000 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE}, +{ 0x006 ,M_CGA2 ,640 ,200 ,80 ,25 ,8 ,8 ,1 ,0xB8000 ,0x4000 ,100 ,449 ,80 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE}, { 0x007 ,M_TEXT ,720 ,400 ,80 ,25 ,9 ,16 ,8 ,0xB0000 ,0x1000 ,100 ,449 ,80 ,400 ,0 }, { 0x00D ,M_EGA16 ,320 ,200 ,40 ,25 ,8 ,8 ,8 ,0xA0000 ,0x2000 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE }, @@ -95,6 +95,18 @@ static Bit8u text_palette[64][3]= {0x15,0x15,0x15},{0x15,0x15,0x3f},{0x15,0x3f,0x15},{0x15,0x3f,0x3f},{0x3f,0x15,0x15},{0x3f,0x15,0x3f},{0x3f,0x3f,0x15},{0x3f,0x3f,0x3f} }; +static Bit8u mtext_palette[64][3]= +{ + 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, + 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, + 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, + 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, + 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, + 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, + 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, + 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f +}; + static Bit8u ega_palette[64][3]= { {0x00,0x00,0x00}, {0x00,0x00,0x2a}, {0x00,0x2a,0x00}, {0x00,0x2a,0x2a}, {0x2a,0x00,0x00}, {0x2a,0x00,0x2a}, {0x2a,0x15,0x00}, {0x2a,0x2a,0x2a}, @@ -210,10 +222,10 @@ static void FinishSetMode(bool clearmem) { else real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MODE,CurMode->mode-0x98); //Looks like the s3 bios real_writew(BIOSMEM_SEG,BIOSMEM_NB_COLS,CurMode->twidth); real_writew(BIOSMEM_SEG,BIOSMEM_PAGE_SIZE,CurMode->plength); - real_writew(BIOSMEM_SEG,BIOSMEM_CRTC_ADDRESS,CurMode->mode==7 ? 0x3b4 : 0x3d4); + real_writew(BIOSMEM_SEG,BIOSMEM_CRTC_ADDRESS,((CurMode->mode==7 )|| (CurMode->mode==0x0f)) ? 0x3b4 : 0x3d4); real_writeb(BIOSMEM_SEG,BIOSMEM_NB_ROWS,CurMode->theight-1); real_writew(BIOSMEM_SEG,BIOSMEM_CHAR_HEIGHT,CurMode->cheight); - real_writeb(BIOSMEM_SEG,BIOSMEM_VIDEO_CTL,(0x60|(clearmem << 7))); + real_writeb(BIOSMEM_SEG,BIOSMEM_VIDEO_CTL,(0x60|(clearmem?0:0x80))); real_writeb(BIOSMEM_SEG,BIOSMEM_SWITCHES,0x09); real_writeb(BIOSMEM_SEG,BIOSMEM_MODESET_CTL,real_readb(BIOSMEM_SEG,BIOSMEM_MODESET_CTL)&0x7f); @@ -358,9 +370,13 @@ bool INT10_SetVideoMode_OTHER(Bitu mode,bool clearmem) { bool INT10_SetVideoMode(Bitu mode) { bool clearmem=true;Bitu i; - if ((mode<256) && (mode & 128)) { + if (mode>=0x100) { + if (mode & 0x8000) clearmem=false; + mode&=0xfff; + } + if ((mode<0x100) && (mode & 0x80)) { clearmem=false; - mode-=128; + mode-=0x80; } LOG(LOG_INT10,LOG_NORMAL)("Set Video Mode %X",mode); if (machine!=MCH_VGA) return INT10_SetVideoMode_OTHER(mode,clearmem); @@ -615,7 +631,7 @@ bool INT10_SetVideoMode(Bitu mode) { misc_control_2=0x0; break; } - IO_WriteB(0x3d4,0x67);IO_WriteB(0x3d5,misc_control_2); + IO_WriteB(crtc_base,0x67);IO_WriteB(crtc_base+1,misc_control_2); /* Write Misc Output */ IO_Write(0x3c2,misc_output); /* Program Graphics controller */ @@ -654,10 +670,26 @@ bool INT10_SetVideoMode(Bitu mode) { switch (CurMode->type) { case M_EGA16: att_data[0x10]=0x01; //Color Graphics - if (CurMode->mode>0xe) goto att_text16; + switch (CurMode->mode) { + case 0x0f: + att_data[0x10]|=0x0a; //Monochrome + att_data[0x01]=0x08; + att_data[0x04]=0x18; + att_data[0x05]=0x18; + att_data[0x09]=0x08; + att_data[0x0d]=0x18; + break; + case 0x11: + for (i=1;i<16;i++) att_data[i]=0x3f; + break; + case 0x10: + case 0x12: goto att_text16; + default: for (i=0;i<8;i++) { - att_data[i]=i; - att_data[i+8]=i+0x10; + att_data[i]=i; + att_data[i+8]=i+0x10; + } + break; } break; case M_TANDY16: @@ -667,6 +699,7 @@ bool INT10_SetVideoMode(Bitu mode) { case M_TEXT: att_data[0x13]=0x08; //Pel panning on 8, although we don't have 9 dot text mode att_data[0x10]=0x0C; //Color Text with blinking + real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_PAL,0x30); att_text16: for (i=0;i<8;i++) { att_data[i]=i; @@ -709,7 +742,8 @@ att_text16: IO_Write(0x3c8,0); switch (CurMode->type) { case M_EGA16: - if (CurMode->mode>0xe) goto dac_text16; + if (CurMode->mode>0xf) goto dac_text16; + else if (CurMode->mode==0xf) goto dac_mtext16; for (i=0;i<64;i++) { IO_Write(0x3c9,ega_palette[i][0]); IO_Write(0x3c9,ega_palette[i][1]); @@ -726,6 +760,15 @@ att_text16: } break; case M_TEXT: + if (CurMode->mode==7) { +dac_mtext16: + for (i=0;i<64;i++) { + IO_Write(0x3c9,mtext_palette[i][0]); + IO_Write(0x3c9,mtext_palette[i][1]); + IO_Write(0x3c9,mtext_palette[i][2]); + } + break; + } dac_text16: for (i=0;i<64;i++) { IO_Write(0x3c9,text_palette[i][0]); @@ -760,6 +803,12 @@ dac_text16: break; case M_TEXT: feature=(feature&~0x30)|0x20; + switch (CurMode->mode) { + case 0:real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,0x2c);break; + case 1:real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,0x28);break; + case 2:real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,0x2d);break; + case 3:real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,0x29);break; + } break; case M_EGA16: case M_VGA: @@ -767,7 +816,8 @@ dac_text16: break; } - real_writeb(BIOSMEM_SEG,BIOSMEM_INITIAL_MODE,feature); + // disabled, has to be set in bios.cpp exclusively +// real_writeb(BIOSMEM_SEG,BIOSMEM_INITIAL_MODE,feature); /* Setup the CPU Window */ IO_Write(crtc_base,0x6a); IO_Write(crtc_base+1,0); @@ -790,6 +840,3 @@ dac_text16: } return true; } - - - diff --git a/src/ints/int10_pal.cpp b/src/ints/int10_pal.cpp index 631095e7..480d3d76 100644 --- a/src/ints/int10_pal.cpp +++ b/src/ints/int10_pal.cpp @@ -23,6 +23,10 @@ #define ACTL_MAX_REG 0x14 +static INLINE void ResetACTL(void) { + IO_Read(real_readw(BIOSMEM_SEG,BIOSMEM_CRTC_ADDRESS) + 6); +} + void INT10_SetSinglePaletteRegister(Bit8u reg,Bit8u val) { switch (machine) { case MCH_TANDY: @@ -32,7 +36,7 @@ void INT10_SetSinglePaletteRegister(Bit8u reg,Bit8u val) { break; case MCH_VGA: if(reg<=ACTL_MAX_REG) { - IO_Read(VGAREG_ACTL_RESET); + ResetACTL(); IO_Write(VGAREG_ACTL_ADDRESS,reg); IO_Write(VGAREG_ACTL_WRITE_DATA,val); } @@ -43,7 +47,7 @@ void INT10_SetSinglePaletteRegister(Bit8u reg,Bit8u val) { void INT10_SetOverscanBorderColor(Bit8u val) { - IO_Read(VGAREG_ACTL_RESET); + ResetACTL(); IO_Write(VGAREG_ACTL_ADDRESS,0x11); IO_Write(VGAREG_ACTL_WRITE_DATA,val); IO_Write(VGAREG_ACTL_ADDRESS,32); //Enable output and protect palette @@ -64,7 +68,7 @@ void INT10_SetAllPaletteRegisters(PhysPt data) { IO_Write(VGAREG_TDY_DATA,mem_readb(data)); break; case MCH_VGA: - IO_Read(VGAREG_ACTL_RESET); + ResetACTL(); // First the colors for(Bit8u i=0;i<0x10;i++) { IO_Write(VGAREG_ACTL_ADDRESS,i); @@ -82,14 +86,14 @@ void INT10_SetAllPaletteRegisters(PhysPt data) { void INT10_ToggleBlinkingBit(Bit8u state) { Bit8u value; state&=0x01; - IO_Read(VGAREG_ACTL_RESET); + ResetACTL(); IO_Write(VGAREG_ACTL_ADDRESS,0x10); value=IO_Read(VGAREG_ACTL_READ_DATA); value&=0xf7; value|=state<<3; - IO_Read(VGAREG_ACTL_RESET); + ResetACTL(); IO_Write(VGAREG_ACTL_ADDRESS,0x10); IO_Write(VGAREG_ACTL_WRITE_DATA,value); IO_Write(VGAREG_ACTL_ADDRESS,32); //Enable output and protect palette @@ -97,7 +101,7 @@ void INT10_ToggleBlinkingBit(Bit8u state) { void INT10_GetSinglePaletteRegister(Bit8u reg,Bit8u * val) { if(reg<=ACTL_MAX_REG) { - IO_Read(VGAREG_ACTL_RESET); + ResetACTL(); IO_Write(VGAREG_ACTL_ADDRESS,reg+32); *val=IO_Read(VGAREG_ACTL_READ_DATA); IO_Write(VGAREG_ACTL_WRITE_DATA,*val); @@ -105,25 +109,25 @@ void INT10_GetSinglePaletteRegister(Bit8u reg,Bit8u * val) { } void INT10_GetOverscanBorderColor(Bit8u * val) { - IO_Read(VGAREG_ACTL_RESET); + ResetACTL(); IO_Write(VGAREG_ACTL_ADDRESS,0x11+32); *val=IO_Read(VGAREG_ACTL_READ_DATA); IO_Write(VGAREG_ACTL_WRITE_DATA,*val); } void INT10_GetAllPaletteRegisters(PhysPt data) { - IO_Read(VGAREG_ACTL_RESET); + ResetACTL(); // First the colors for(Bit8u i=0;i<0x10;i++) { IO_Write(VGAREG_ACTL_ADDRESS,i); mem_writeb(data,IO_Read(VGAREG_ACTL_READ_DATA)); - IO_Read(VGAREG_ACTL_RESET); + ResetACTL(); data++; } // Then the border IO_Write(VGAREG_ACTL_ADDRESS,0x11+32); mem_writeb(data,IO_Read(VGAREG_ACTL_READ_DATA)); - IO_Read(VGAREG_ACTL_RESET); + ResetACTL(); } void INT10_SetSingleDacRegister(Bit8u index,Bit8u red,Bit8u green,Bit8u blue) { @@ -159,7 +163,7 @@ void INT10_GetDACBlock(Bit16u index,Bit16u count,PhysPt data) { } void INT10_SelectDACPage(Bit8u function,Bit8u mode) { - IO_Read(VGAREG_ACTL_RESET); + ResetACTL(); IO_Write(VGAREG_ACTL_ADDRESS,0x10); Bit8u old10=IO_Read(VGAREG_ACTL_READ_DATA); if (!function) { //Select paging mode @@ -178,7 +182,7 @@ void INT10_SelectDACPage(Bit8u function,Bit8u mode) { } void INT10_GetDACPage(Bit8u* mode,Bit8u* page) { - IO_Read(VGAREG_ACTL_RESET); + ResetACTL(); IO_Write(VGAREG_ACTL_ADDRESS,0x10); Bit8u reg10=IO_Read(VGAREG_ACTL_READ_DATA); IO_Write(VGAREG_ACTL_WRITE_DATA,reg10); diff --git a/src/ints/int10_vesa.cpp b/src/ints/int10_vesa.cpp index 2d9378db..579bd2e6 100644 --- a/src/ints/int10_vesa.cpp +++ b/src/ints/int10_vesa.cpp @@ -16,7 +16,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* $Id: int10_vesa.cpp,v 1.16 2005-04-27 18:58:08 qbix79 Exp $ */ +/* $Id: int10_vesa.cpp,v 1.17 2005-09-27 11:05:44 c2woody Exp $ */ #include #include @@ -158,7 +158,7 @@ foundit: Bit8u VESA_SetSVGAMode(Bit16u mode) { - if (INT10_SetVideoMode(mode & 0xfff)) return 0x00; + if (INT10_SetVideoMode(mode)) return 0x00; return 0x01; };