diff --git a/src/ints/int10.cpp b/src/ints/int10.cpp
index b5b3abe0..fed4a7d7 100644
--- a/src/ints/int10.cpp
+++ b/src/ints/int10.cpp
@@ -138,8 +138,7 @@ static Bitu INT10_Handler(void) {
 		reg_ah=(Bit8u)real_readw(BIOSMEM_SEG,BIOSMEM_NB_COLS);
 		break;					
 	case 0x10:								/* Palette functions */
-		if ((machine==MCH_CGA) || ((!IS_VGA_ARCH) && (reg_al>0x02))) break;
-		//TODO: subfunction 0x03 for ega
+		if ((machine==MCH_CGA) || ((!IS_VGA_ARCH) && (reg_al>0x03))) break;
 		switch (reg_al) {
 		case 0x00:							/* SET SINGLE PALETTE REGISTER */
 			INT10_SetSinglePaletteRegister(reg_bl,reg_bh);
@@ -302,13 +301,8 @@ graphics_chars:
 				break;
 			}
 			if ((reg_bh<=7) || (svgaCard==SVGA_TsengET4K)) {
-				if (machine==MCH_EGA) {
-					reg_cx=0x0e;
-					reg_dl=0x18;
-				} else {
-					reg_cx=real_readw(BIOSMEM_SEG,BIOSMEM_CHAR_HEIGHT);
-					reg_dl=real_readb(BIOSMEM_SEG,BIOSMEM_NB_ROWS);
-				}
+				reg_cx=real_readw(BIOSMEM_SEG,BIOSMEM_CHAR_HEIGHT);
+				reg_dl=real_readb(BIOSMEM_SEG,BIOSMEM_NB_ROWS);
 			}
 			break;
 		default:
diff --git a/src/ints/int10_memory.cpp b/src/ints/int10_memory.cpp
index 789d52a3..646894f5 100644
--- a/src/ints/int10_memory.cpp
+++ b/src/ints/int10_memory.cpp
@@ -66,9 +66,21 @@ void INT10_LoadFont(PhysPt font,bool reload,Bitu count,Bitu offset,Bitu map,Bitu
 		Bit16u base=real_readw(BIOSMEM_SEG,BIOSMEM_CRTC_ADDRESS);
 		IO_Write(base,0x9);
 		IO_Write(base+1,(IO_Read(base+1) & 0xe0)|(height-1));
-		//Vertical display end bios says, but should stay the same?
+		// Vertical display end bios says, but should stay the same?
+		// Not on EGA.
+        Bitu rows = CurMode->sheight/height;
+		if (machine==MCH_EGA) {
+			Bitu displayend = rows*height - 1;
+			IO_Write(base,0x12);
+			IO_Write(base+1,(Bit8u)(displayend & 0xff));
+			IO_Write(base,0x7);
+			// Note: IBM EGA registers can't be read
+			Bitu v_overflow = IO_Read(base+1) & ~0x2;
+			if (displayend & 0x100) v_overflow |= 0x2;
+			IO_Write(base+1,(Bit8u)v_overflow);
+		}
 		//Rows setting in bios segment
-		real_writeb(BIOSMEM_SEG,BIOSMEM_NB_ROWS,(CurMode->sheight/height)-1);
+		real_writeb(BIOSMEM_SEG,BIOSMEM_NB_ROWS,rows-1);
 		real_writeb(BIOSMEM_SEG,BIOSMEM_CHAR_HEIGHT,(Bit8u)height);
 		//TODO Reprogram cursor size?
 	}
diff --git a/src/ints/int10_pal.cpp b/src/ints/int10_pal.cpp
index e9ff967d..266ac263 100644
--- a/src/ints/int10_pal.cpp
+++ b/src/ints/int10_pal.cpp
@@ -96,25 +96,42 @@ void INT10_SetAllPaletteRegisters(PhysPt data) {
 }
 
 void INT10_ToggleBlinkingBit(Bit8u state) {
-	Bit8u value;
-//	state&=0x01;
-	if ((state>1) && (svgaCard==SVGA_S3Trio)) return;
-	ResetACTL();
-	
-	IO_Write(VGAREG_ACTL_ADDRESS,0x10);
-	value=IO_Read(VGAREG_ACTL_READ_DATA);
-	if (state<=1) {
-		value&=0xf7;
-		value|=state<<3;
-	}
+	if(IS_VGA_ARCH) {
+		Bit8u value;
+	//	state&=0x01;
+		if ((state>1) && (svgaCard==SVGA_S3Trio)) return;
+		ResetACTL();
+		
+		IO_Write(VGAREG_ACTL_ADDRESS,0x10);
+		value=IO_Read(VGAREG_ACTL_READ_DATA);
+		if (state<=1) {
+			value&=0xf7;
+			value|=state<<3;
+		}
 
-	ResetACTL();
-	IO_Write(VGAREG_ACTL_ADDRESS,0x10);
-	IO_Write(VGAREG_ACTL_WRITE_DATA,value);
-	IO_Write(VGAREG_ACTL_ADDRESS,32);		//Enable output and protect palette
+		ResetACTL();
+		IO_Write(VGAREG_ACTL_ADDRESS,0x10);
+		IO_Write(VGAREG_ACTL_WRITE_DATA,value);
+		IO_Write(VGAREG_ACTL_ADDRESS,32);		//Enable output and protect palette
 
-	if (state<=1) {
-		Bit8u msrval=real_readb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR)&0xdf;
+		if (state<=1) {
+			Bit8u msrval=real_readb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR)&0xdf;
+			if (state) msrval|=0x20;
+			real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,msrval);
+		}
+	} else { // EGA
+		// Usually it reads this from the mode list in ROM
+		if (CurMode->type!=M_TEXT) return;
+
+		Bit8u value = (CurMode->cwidth==9)? 0x4:0x0;
+		if (state) value |= 0x8;
+		
+		ResetACTL();
+		IO_Write(VGAREG_ACTL_ADDRESS,0x10);
+		IO_Write(VGAREG_ACTL_WRITE_DATA,value);
+		IO_Write(VGAREG_ACTL_ADDRESS,0x20);
+
+		Bit8u msrval=real_readb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR)& ~0x20;
 		if (state) msrval|=0x20;
 		real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,msrval);
 	}