valter/dosbox-staging
1
0
Fork 0
Code Releases Activity

Allow CRTC read/write access on all mirror ports for non-VGA machine types. Fixes Tandy and EGA display in International Hockey booter. Thanks Great Hierophant for testing on real systems.

Browse source 
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@3904
This commit is contained in:
ripsaw8080 2015-03-13 13:05:18 +00:00
parent 8a464fb312
commit 4a221045be
2 changed files with 18 additions and 37 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

42
src/hardware/vga_misc.cpp
View file

@ -57,34 +57,26 @@ Bitu vga_read_p3da(Bitu port,Bitu iolen) {
static void write_p3c2(Bitu port,Bitu val,Bitu iolen) {
vga.misc_output=val;
if (val & 0x1) {
IO_RegisterWriteHandler(0x3d4,vga_write_p3d4,IO_MB);
IO_RegisterReadHandler(0x3d4,vga_read_p3d4,IO_MB);
IO_RegisterReadHandler(0x3da,vga_read_p3da,IO_MB);
IO_RegisterWriteHandler(0x3d5,vga_write_p3d5,IO_MB);
IO_RegisterReadHandler(0x3d5,vga_read_p3d5,IO_MB);
Bitu base=(val & 0x1) ? 0x3d0 : 0x3b0;
Bitu free=(val & 0x1) ? 0x3b0 : 0x3d0;
Bitu first=2, last=2;
if (machine==MCH_EGA) {first=0; last=3;}
IO_FreeWriteHandler(0x3b4,IO_MB);
IO_FreeReadHandler(0x3b4,IO_MB);
IO_FreeWriteHandler(0x3b5,IO_MB);
IO_FreeReadHandler(0x3b5,IO_MB);
IO_FreeReadHandler(0x3ba,IO_MB);
} else {
IO_RegisterWriteHandler(0x3b4,vga_write_p3d4,IO_MB);
IO_RegisterReadHandler(0x3b4,vga_read_p3d4,IO_MB);
IO_RegisterReadHandler(0x3ba,vga_read_p3da,IO_MB);
IO_RegisterWriteHandler(0x3b5,vga_write_p3d5,IO_MB);
IO_RegisterReadHandler(0x3b5,vga_read_p3d5,IO_MB);
IO_FreeWriteHandler(0x3d4,IO_MB);
IO_FreeReadHandler(0x3d4,IO_MB);
IO_FreeWriteHandler(0x3d5,IO_MB);
IO_FreeReadHandler(0x3d5,IO_MB);
IO_FreeReadHandler(0x3da,IO_MB);
for (Bitu i=first; i<=last; i++) {
IO_RegisterWriteHandler(base+i*2,vga_write_p3d4,IO_MB);
IO_RegisterReadHandler(base+i*2,vga_read_p3d4,IO_MB);
IO_RegisterWriteHandler(base+i*2+1,vga_write_p3d5,IO_MB);
IO_RegisterReadHandler(base+i*2+1,vga_read_p3d5,IO_MB);
IO_FreeWriteHandler(free+i*2,IO_MB);
IO_FreeReadHandler(free+i*2,IO_MB);
IO_FreeWriteHandler(free+i*2+1,IO_MB);
IO_FreeReadHandler(free+i*2+1,IO_MB);
}
IO_RegisterReadHandler(base+0xa,vga_read_p3da,IO_MB);
IO_FreeReadHandler(free+0xa,IO_MB);
/*
0 If set Color Emulation. Base Address=3Dxh else Mono Emulation. Base Address=3Bxh.
2-3 Clock Select. 0: 25MHz, 1: 28MHz

13
src/hardware/vga_other.cpp
View file

@ -835,9 +835,6 @@ void VGA_SetupOther(void) {
write_pcjr( 0x3df, 0x7 | (0x7 << 3), 0 );
IO_RegisterWriteHandler(0x3da,write_pcjr,IO_MB);
IO_RegisterWriteHandler(0x3df,write_pcjr,IO_MB);
// additional CRTC access documented
IO_RegisterWriteHandler(0x3d0,write_crtc_index_other,IO_MB);
IO_RegisterWriteHandler(0x3d1,write_crtc_data_other,IO_MB);
}
if (machine==MCH_HERC) {
Bitu base=0x3b0;
@ -855,8 +852,7 @@ void VGA_SetupOther(void) {
IO_RegisterWriteHandler(0x3b8,write_hercules,IO_MB);
IO_RegisterWriteHandler(0x3bf,write_hercules,IO_MB);
IO_RegisterReadHandler(0x3ba,read_herc_status,IO_MB);
}
if (machine==MCH_CGA) {
} else if (!IS_EGAVGA_ARCH) {
Bitu base=0x3d0;
for (Bitu port_ct=0; port_ct<4; port_ct++) {
IO_RegisterWriteHandler(base+port_ct*2,write_crtc_index_other,IO_MB);
@ -865,12 +861,5 @@ void VGA_SetupOther(void) {
IO_RegisterReadHandler(base+port_ct*2+1,read_crtc_data_other,IO_MB);
}
}
if (IS_TANDY_ARCH) {
Bitu base=0x3d4;
IO_RegisterWriteHandler(base,write_crtc_index_other,IO_MB);
IO_RegisterWriteHandler(base+1,write_crtc_data_other,IO_MB);
IO_RegisterReadHandler(base,read_crtc_index_other,IO_MB);
IO_RegisterReadHandler(base+1,read_crtc_data_other,IO_MB);
}
}