1
0
Fork 0

Add beta2 patch: merge in old trap skip logic again; give trap priority over hw interrupts

Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@2741
This commit is contained in:
Sebastian Strohhäcker 2007-01-09 17:18:52 +00:00
parent d3883f677d
commit 4b6d005406
7 changed files with 25 additions and 10 deletions

View file

@ -446,6 +446,7 @@ struct CPUBlock {
Bitu which,error;
} exception;
Bits direction;
bool trap_skip;
Bit32u drx[8];
Bit32u trx[8];
};

View file

@ -346,9 +346,10 @@ run_block:
Bits CPU_Core_Dyn_X86_Trap_Run(void) {
Bits oldCycles = CPU_Cycles;
CPU_Cycles = 1;
cpu.trap_skip = false;
Bits ret=CPU_Core_Normal_Run();
if (GETFLAG(TF)) CPU_HW_Interrupt(1);
if (!cpu.trap_skip) CPU_HW_Interrupt(1);
CPU_Cycles = oldCycles-1;
cpudecoder = &CPU_Core_Dyn_X86_Run;

View file

@ -191,9 +191,10 @@ decode_end:
Bits CPU_Core_Normal_Trap_Run(void) {
Bits oldCycles = CPU_Cycles;
CPU_Cycles = 1;
cpu.trap_skip = false;
Bits ret=CPU_Core_Normal_Run();
if (GETFLAG(TF)) CPU_HW_Interrupt(1);
if (!cpu.trap_skip) CPU_HW_Interrupt(1);
CPU_Cycles = oldCycles-1;
cpudecoder = &CPU_Core_Normal_Run;

View file

@ -746,6 +746,9 @@
return debugCallback;
#endif
CPU_SW_Interrupt_NoIOPLCheck(3,GETIP);
#if CPU_TRAP_CHECK
cpu.trap_skip=true;
#endif
continue;
CASE_B(0xcd) /* INT Ib */
{
@ -757,12 +760,18 @@
}
#endif
CPU_SW_Interrupt(num,GETIP);
#if CPU_TRAP_CHECK
cpu.trap_skip=true;
#endif
continue;
}
CASE_B(0xce) /* INTO */
if (get_OF()) {
FillFlags();
CPU_SW_Interrupt(4,GETIP);
#if CPU_TRAP_CHECK
cpu.trap_skip=true;
#endif
continue;
}
break;
@ -946,6 +955,9 @@
CASE_B(0xf1) /* ICEBP */
FillFlags();
CPU_SW_Interrupt_NoIOPLCheck(1,GETIP);
#if CPU_TRAP_CHECK
cpu.trap_skip=true;
#endif
continue;
CASE_B(0xf2) /* REPNZ */
DO_PREFIX_REP(false);

View file

@ -93,9 +93,6 @@ static struct {
bool rep_zero;
Bitu prefixes;
GetEAHandler * ea_table;
struct {
bool skip;
} trap;
} core;
#define GETIP (core.cseip-SegBase(cs)-MemBase)
@ -188,15 +185,16 @@ decode_end:
return CBRET_NONE;
}
// not really used
Bits CPU_Core_Simple_Trap_Run(void) {
Bits oldCycles = CPU_Cycles;
CPU_Cycles = 1;
cpu.trap_skip = false;
Bits ret=CPU_Core_Normal_Run();
if (GETFLAG(TF)) CPU_SW_Interrupt(1,reg_eip);
if (!cpu.trap_skip) CPU_HW_Interrupt(1);
CPU_Cycles = oldCycles-1;
cpudecoder = &CPU_Core_Normal_Run;
cpudecoder = &CPU_Core_Simple_Run;
return ret;
}

View file

@ -16,7 +16,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
/* $Id: cpu.cpp,v 1.91 2007-01-08 19:45:38 qbix79 Exp $ */
/* $Id: cpu.cpp,v 1.92 2007-01-09 17:18:52 c2woody Exp $ */
#include <assert.h>
#include "dosbox.h"
@ -2025,6 +2025,7 @@ public:
cpu.stack.mask=0xffff;
cpu.stack.notmask=0xffff0000;
cpu.stack.big=false;
cpu.trap_skip=false;
cpu.idt.SetBase(0);
cpu.idt.SetLimit(1023);

View file

@ -16,7 +16,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
/* $Id: pic.cpp,v 1.37 2007-01-08 19:45:40 qbix79 Exp $ */
/* $Id: pic.cpp,v 1.38 2007-01-09 17:18:52 c2woody Exp $ */
#include <list>
@ -282,6 +282,7 @@ static inline bool PIC_startIRQ(Bitu i) {
void PIC_runIRQs(void) {
if (!GETFLAG(IF)) return;
if (!PIC_IRQCheck) return;
if (cpudecoder==CPU_Core_Normal_Trap_Run) return;
static Bitu IRQ_priority_order[16] =
{ 0,1,2,8,9,10,11,12,13,14,15,3,4,5,6,7 };