diff --git a/src/cpu/paging.cpp b/src/cpu/paging.cpp index af2230f4..ea14b6d3 100644 --- a/src/cpu/paging.cpp +++ b/src/cpu/paging.cpp @@ -132,10 +132,7 @@ void PAGING_PageFault(PhysPt lin_addr,Bitu page_addr,Bitu type) { void MEM_PhysWriteD(Bitu addr,Bit32u val); class InitPageHandler : public PageHandler { public: - InitPageHandler() {flags=PFLAG_ILLEGAL;} - void AddPageLink(Bitu lin_page, Bitu phys_page) { - assert(0); - } + InitPageHandler() {flags=PFLAG_INIT|PFLAG_NOCODE;} Bitu readb(PhysPt addr) { InitPage(addr); return mem_readb(addr); @@ -179,7 +176,7 @@ public: table.block.a=table.block.d=1; //Set access/Dirty MEM_PhysWriteD(table_addr,table.load); X86PageEntry entry; - Bitu entry_addr=(table.block.base << 12)+t_index*4; + Bitu entry_addr=(table.block.base<<12)+t_index*4; entry.load=MEM_PhysReadD(entry_addr); if (!entry.block.p) { LOG(LOG_PAGING,LOG_ERROR)("NP Page"); @@ -199,6 +196,23 @@ public: } }; +bool PAGING_MakePhysPage(Bitu & page) { + if (paging.enabled) { + Bitu d_index=page >> 10; + Bitu t_index=page & 0x3ff; + X86PageEntry table; + table.load=MEM_PhysReadD((paging.base.page<<12)+d_index*4); + if (!table.block.p) return false; + X86PageEntry entry; + entry.load=MEM_PhysReadD((table.block.base<<12)+t_index*4); + if (!entry.block.p) return false; + page=entry.block.base; + } else { + if (page0;pages--) { +void PAGING_ClearTLB(void) { + Bit32u * entries=&paging.links.entries[0]; + for (;paging.links.used>0;paging.links.used--) { Bitu page=*entries++; paging.tlb.read[page]=0; paging.tlb.write[page]=0; paging.tlb.handler[page]=&init_page_handler; } + paging.links.used=0; +} + +void PAGING_UnlinkPages(Bitu lin_page,Bitu pages) { + for (;pages>0;pages--) { + paging.tlb.read[lin_page]=0; + paging.tlb.write[lin_page]=0; + paging.tlb.handler[lin_page]=&init_page_handler; + } } void PAGING_LinkPage(Bitu lin_page,Bitu phys_page) { - PageHandler * handler=MEM_GetPageHandler(phys_page); Bitu lin_base=lin_page << 12; @@ -249,8 +261,8 @@ void PAGING_LinkPage(Bitu lin_page,Bitu phys_page) { else paging.tlb.read[lin_page]=0; if (handler->flags & PFLAG_WRITEABLE) paging.tlb.write[lin_page]=host_mem-lin_base; else paging.tlb.write[lin_page]=0; - - handler->AddPageLink(lin_page,phys_page); + if (paging.links.used>=PAGING_LINKS) E_Exit("Not enough paging links"); + paging.links.entries[paging.links.used++]=lin_page; paging.tlb.handler[lin_page]=handler; } diff --git a/src/hardware/vga_memory.cpp b/src/hardware/vga_memory.cpp index 2deb3d3d..fde8dcc5 100644 --- a/src/hardware/vga_memory.cpp +++ b/src/hardware/vga_memory.cpp @@ -126,34 +126,17 @@ static void VGA_GFX_256U_WriteHandler(PhysPt start,Bit8u val) { /* Gonna assume that whoever maps vga memory, maps it on 32/64kb boundary */ -#define LINK_MAX 64 #define VGA_PAGES (128/4) #define VGA_PAGE_A0 (0xA0000/4096) #define VGA_PAGE_B0 (0xB0000/4096) #define VGA_PAGE_B8 (0xB8000/4096) static struct { - Bitu used_links; - Bit32u links[LINK_MAX]; Bit8u ram_area[VGA_PAGES*4096]; Bitu map_base; } vgapages; - -void VGA_ClearPageLinks(void) { - PAGING_ClearTLBEntries(vgapages.used_links,vgapages.links); - vgapages.used_links=0; -} - -class VGA_PageHandler : public PageHandler { - void AddPageLink(Bitu lin_page, Bitu phys_page) { - if (vgapages.used_links