change callback code; get rid of several calls to DOSBOX_RunMachine()
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@2677
This commit is contained in:
Sebastian Strohhäcker
parent
fcd1a96808
commit
6215071ebc
8 changed files with 527 additions and 328 deletions
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@ -16,7 +16,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: callback.cpp,v 1.33 2006-06-25 18:49:32 c2woody Exp $ */
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/* $Id: callback.cpp,v 1.34 2006-07-24 19:06:55 c2woody Exp $ */
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#include <stdlib.h>
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#include <string.h>
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@ -26,7 +26,7 @@
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#include "mem.h"
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#include "cpu.h"
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/* CallBack are located at 0xC800:0
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/* CallBack are located at 0xF100:0 (see CB_SEG in callback.h)
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And they are 16 bytes each and you can define them to behave in certain ways like a
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far return or and IRET
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*/
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@ -65,7 +65,7 @@ void CALLBACK_Idle(void) {
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Bit16u oldcs=SegValue(cs);
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Bit32u oldeip=reg_eip;
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SegSet16(cs,CB_SEG);
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reg_eip=call_idle<<4;
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reg_eip=call_idle*CB_SIZE;
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DOSBOX_RunMachine();
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reg_eip=oldeip;
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SegSet16(cs,oldcs);
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@ -87,7 +87,7 @@ static Bitu stop_handler(void) {
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void CALLBACK_RunRealFar(Bit16u seg,Bit16u off) {
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reg_sp-=4;
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mem_writew(SegPhys(ss)+reg_sp,call_stop<<4);
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mem_writew(SegPhys(ss)+reg_sp,call_stop*CB_SIZE);
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mem_writew(SegPhys(ss)+reg_sp+2,CB_SEG);
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Bit32u oldeip=reg_eip;
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Bit16u oldcs=SegValue(cs);
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@ -101,7 +101,7 @@ void CALLBACK_RunRealFar(Bit16u seg,Bit16u off) {
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void CALLBACK_RunRealInt(Bit8u intnum) {
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Bit32u oldeip=reg_eip;
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Bit16u oldcs=SegValue(cs);
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reg_eip=(CB_MAX*16)+(intnum*6);
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reg_eip=(CB_MAX*CB_SIZE)+(intnum*6);
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SegSet16(cs,CB_SEG);
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DOSBOX_RunMachine();
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reg_eip=oldeip;
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@ -133,65 +133,254 @@ const char* CALLBACK_GetDescription(Bitu nr) {
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return CallBack_Description[nr];
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};
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Bitu CALLBACK_SetupExtra(Bitu callback, Bitu type, PhysPt physAddress) {
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Bitu CALLBACK_SetupExtra(Bitu callback, Bitu type, PhysPt physAddress, bool use_cb=true) {
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if (callback>=CB_MAX)
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return 0;
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switch (type) {
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case CB_RETN:
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phys_writeb(physAddress+0,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+1,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+2, callback); //The immediate word
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phys_writeb(physAddress+4,(Bit8u)0xC3); //A RETN Instruction
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return 5;
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if (use_cb) {
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phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x02, callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x00,(Bit8u)0xC3); //A RETN Instruction
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return (use_cb?5:1);
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case CB_RETF:
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phys_writeb(physAddress+0,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+1,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+2, callback); //The immediate word
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phys_writeb(physAddress+4,(Bit8u)0xCB); //A RETF Instruction
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return 5;
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if (use_cb) {
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phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x02, callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x00,(Bit8u)0xCB); //A RETF Instruction
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return (use_cb?5:1);
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case CB_IRET:
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phys_writeb(physAddress+0,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+1,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+2,callback); //The immediate word
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phys_writeb(physAddress+4,(Bit8u)0xCF); //An IRET Instruction
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return 5;
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if (use_cb) {
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phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x02,callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x00,(Bit8u)0xCF); //An IRET Instruction
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return (use_cb?5:1);
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case CB_IRETD:
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phys_writeb(physAddress+0,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+1,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+2,callback); //The immediate word
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phys_writeb(physAddress+4,(Bit8u)0x66); //An IRETD Instruction
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phys_writeb(physAddress+5,(Bit8u)0xCF);
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return 6;
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if (use_cb) {
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phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x02,callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x00,(Bit8u)0x66); //An IRETD Instruction
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phys_writeb(physAddress+0x01,(Bit8u)0xCF);
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return (use_cb?6:2);
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case CB_IRET_STI:
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phys_writeb(physAddress+0,(Bit8u)0xFB); //STI
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phys_writeb(physAddress+1,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+2,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+3, callback); //The immediate word
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phys_writeb(physAddress+5,(Bit8u)0xCF); //An IRET Instruction
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return 6;
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phys_writeb(physAddress+0x00,(Bit8u)0xFB); //STI
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if (use_cb) {
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phys_writeb(physAddress+0x01,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x02,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x03, callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x01,(Bit8u)0xCF); //An IRET Instruction
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return (use_cb?6:2);
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case CB_IRET_EOI_PIC1:
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phys_writeb(physAddress+0,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+1,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+2,callback); //The immediate word
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phys_writeb(physAddress+4,(Bit8u)0x50); // push ax
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phys_writeb(physAddress+5,(Bit8u)0xb0); // mov al, 0x20
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phys_writeb(physAddress+6,(Bit8u)0x20);
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phys_writeb(physAddress+7,(Bit8u)0xe6); // out 0x20, al
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phys_writeb(physAddress+8,(Bit8u)0x20);
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phys_writeb(physAddress+9,(Bit8u)0x58); // pop ax
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phys_writeb(physAddress+10,(Bit8u)0xcf);//An IRET Instruction
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return 11;
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if (use_cb) {
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phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x02,callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x00,(Bit8u)0x50); // push ax
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phys_writeb(physAddress+0x01,(Bit8u)0xb0); // mov al, 0x20
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phys_writeb(physAddress+0x02,(Bit8u)0x20);
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phys_writeb(physAddress+0x03,(Bit8u)0xe6); // out 0x20, al
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phys_writeb(physAddress+0x04,(Bit8u)0x20);
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phys_writeb(physAddress+0x05,(Bit8u)0x58); // pop ax
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phys_writeb(physAddress+0x06,(Bit8u)0xcf); //An IRET Instruction
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return (use_cb?0x0b:0x07);
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case CB_IRQ0: // timer int8
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if (use_cb) {
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phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x02,callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x00,(Bit8u)0x50); // push ax
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phys_writeb(physAddress+0x01,(Bit8u)0x52); // push dx
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phys_writeb(physAddress+0x02,(Bit8u)0x1e); // push ds
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phys_writew(physAddress+0x03,(Bit16u)0x1ccd); // int 1c
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phys_writeb(physAddress+0x05,(Bit8u)0xfa); // cli
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phys_writeb(physAddress+0x06,(Bit8u)0x1f); // pop ds
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phys_writeb(physAddress+0x07,(Bit8u)0x5a); // pop dx
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phys_writew(physAddress+0x08,(Bit16u)0x20b0); // mov al, 0x20
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phys_writew(physAddress+0x0a,(Bit16u)0x20e6); // out 0x20, al
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phys_writeb(physAddress+0x0c,(Bit8u)0x58); // pop ax
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phys_writeb(physAddress+0x0d,(Bit8u)0xcf); //An IRET Instruction
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return (use_cb?0x12:0x0e);
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case CB_IRQ1: // keyboard int9
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phys_writeb(physAddress+0x00,(Bit8u)0x50); // push ax
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phys_writew(physAddress+0x01,(Bit16u)0x60e4); // in al, 0x60
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phys_writew(physAddress+0x03,(Bit16u)0x4fb4); // mov ah, 0x4f
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phys_writeb(physAddress+0x05,(Bit8u)0xf9); // stc
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phys_writew(physAddress+0x06,(Bit16u)0x15cd); // int 15
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if (use_cb) {
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phys_writew(physAddress+0x08,(Bit16u)0x0473); // jc skip
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phys_writeb(physAddress+0x0a,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x0b,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x0c,callback); //The immediate word
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// jump here to (skip):
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physAddress+=6;
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}
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phys_writeb(physAddress+0x08,(Bit8u)0xfa); // cli
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phys_writew(physAddress+0x09,(Bit16u)0x20b0); // mov al, 0x20
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phys_writew(physAddress+0x0b,(Bit16u)0x20e6); // out 0x20, al
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phys_writeb(physAddress+0x0d,(Bit8u)0x58); // pop ax
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phys_writeb(physAddress+0x0e,(Bit8u)0xcf); //An IRET Instruction
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return (use_cb?0x15:0x0f);
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case CB_IRQ9: // pic cascade interrupt
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if (use_cb) {
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phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x02,callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x00,(Bit8u)0x50); // push ax
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phys_writew(physAddress+0x01,(Bit16u)0x61b0); // mov al, 0x61
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phys_writew(physAddress+0x03,(Bit16u)0xa0e6); // out 0xa0, al
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phys_writew(physAddress+0x05,(Bit16u)0x0acd); // int a
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phys_writeb(physAddress+0x07,(Bit8u)0xfa); // cli
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phys_writeb(physAddress+0x08,(Bit8u)0x58); // pop ax
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phys_writeb(physAddress+0x09,(Bit8u)0xcf); //An IRET Instruction
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return (use_cb?0x0e:0x0a);
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case CB_IRQ12: // ps2 mouse int74
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if (!use_cb) E_Exit("int74 callback must implement a callback handler!");
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phys_writeb(physAddress+0x00,(Bit8u)0x1e); // push ds
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phys_writeb(physAddress+0x01,(Bit8u)0x06); // push es
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phys_writew(physAddress+0x02,(Bit16u)0x6066); // pushad
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phys_writeb(physAddress+0x04,(Bit8u)0xfb); // sti
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phys_writeb(physAddress+0x05,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x06,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x07,callback); //The immediate word
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return 0x09;
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case CB_IRQ12_RET: // ps2 mouse int74 return
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if (use_cb) {
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phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x02,callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x00,(Bit8u)0xfa); // cli
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phys_writew(physAddress+0x01,(Bit16u)0x20b0); // mov al, 0x20
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phys_writew(physAddress+0x03,(Bit16u)0xa0e6); // out 0xa0, al
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phys_writew(physAddress+0x05,(Bit16u)0x20e6); // out 0x20, al
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phys_writew(physAddress+0x07,(Bit16u)0x6166); // popad
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phys_writeb(physAddress+0x09,(Bit8u)0x07); // pop es
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phys_writeb(physAddress+0x0a,(Bit8u)0x1f); // pop ds
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phys_writeb(physAddress+0x0b,(Bit8u)0xcf); //An IRET Instruction
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return (use_cb?0x10:0x0c);
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case CB_IRQ6_PCJR: // pcjr keyboard interrupt
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phys_writeb(physAddress+0x00,(Bit8u)0x50); // push ax
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phys_writew(physAddress+0x01,(Bit16u)0x60e4); // in al, 0x60
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phys_writew(physAddress+0x03,(Bit16u)0xe03c); // cmp al, 0xe0
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if (use_cb) {
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phys_writew(physAddress+0x05,(Bit16u)0x0674); // je skip
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phys_writeb(physAddress+0x07,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x08,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x09,callback); //The immediate word
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physAddress+=4;
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} else {
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phys_writew(physAddress+0x05,(Bit16u)0x0274); // je skip
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}
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phys_writew(physAddress+0x07,(Bit16u)0x09cd); // int 9
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// jump here to (skip):
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phys_writeb(physAddress+0x09,(Bit8u)0xfa); // cli
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phys_writew(physAddress+0x0a,(Bit16u)0x20b0); // mov al, 0x20
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phys_writew(physAddress+0x0c,(Bit16u)0x20e6); // out 0x20, al
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phys_writeb(physAddress+0x0e,(Bit8u)0x58); // pop ax
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phys_writeb(physAddress+0x0f,(Bit8u)0xcf); //An IRET Instruction
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return (use_cb?0x14:0x10);
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case CB_INT16:
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phys_writeb(physAddress+0x00,(Bit8u)0xFB); //STI
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if (use_cb) {
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phys_writeb(physAddress+0x01,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x02,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x03, callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x01,(Bit8u)0xCF); //An IRET Instruction
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for (Bitu i=0;i<=0x0b;i++) phys_writeb(physAddress+0x02+i,0x90);
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phys_writew(physAddress+0x0e,(Bit16u)0xedeb); //jmp callback
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return (use_cb?0x10:0x0c);
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case CB_INT29: // fast console output
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if (use_cb) {
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phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x02,callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x00,(Bit8u)0x50); // push ax
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phys_writew(physAddress+0x01,(Bit8u)0x0eb4); // mov ah, 0x0e
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phys_writew(physAddress+0x03,(Bit8u)0x10cd); // int 10
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phys_writeb(physAddress+0x05,(Bit8u)0x58); // pop ax
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phys_writeb(physAddress+0x06,(Bit8u)0xcf); //An IRET Instruction
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return (use_cb?0x0b:0x07);
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case CB_HOOKABLE:
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phys_writeb(physAddress+0,(Bit8u)0xEB); //jump near
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phys_writeb(physAddress+1,(Bit8u)0x03); //offset
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phys_writeb(physAddress+2,(Bit8u)0x90); //NOP
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phys_writeb(physAddress+3,(Bit8u)0x90); //NOP
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phys_writeb(physAddress+4,(Bit8u)0x90); //NOP
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phys_writeb(physAddress+5,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+6,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+7,callback); //The immediate word
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phys_writeb(physAddress+9,(Bit8u)0xCB); //A RETF Instruction
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return 10;
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phys_writeb(physAddress+0x00,(Bit8u)0xEB); //jump near
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phys_writeb(physAddress+0x01,(Bit8u)0x03); //offset
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phys_writeb(physAddress+0x02,(Bit8u)0x90); //NOP
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phys_writeb(physAddress+0x03,(Bit8u)0x90); //NOP
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phys_writeb(physAddress+0x04,(Bit8u)0x90); //NOP
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if (use_cb) {
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phys_writeb(physAddress+0x05,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x06,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x07,callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x05,(Bit8u)0xCB); //A RETF Instruction
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return (use_cb?0x0a:0x06);
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case CB_TDE_IRET: // TandyDAC end transfer
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if (use_cb) {
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phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x02,callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x00,(Bit8u)0x50); // push ax
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phys_writeb(physAddress+0x01,(Bit8u)0xb8); // mov ax, 0x91fb
|
||||
phys_writew(physAddress+0x02,(Bit16u)0x91fb);
|
||||
phys_writew(physAddress+0x04,(Bit16u)0x15cd); // int 15
|
||||
phys_writeb(physAddress+0x06,(Bit8u)0xfa); // cli
|
||||
phys_writew(physAddress+0x07,(Bit16u)0x20b0); // mov al, 0x20
|
||||
phys_writew(physAddress+0x09,(Bit16u)0x20e6); // out 0x20, al
|
||||
phys_writeb(physAddress+0x0b,(Bit8u)0x58); // pop ax
|
||||
phys_writeb(physAddress+0x0c,(Bit8u)0xcf); //An IRET Instruction
|
||||
return (use_cb?0x11:0x0d);
|
||||
/* case CB_IPXESR: // IPX ESR
|
||||
if (!use_cb) E_Exit("ipx esr must implement a callback handler!");
|
||||
phys_writeb(physAddress+0x00,(Bit8u)0x1e); // push ds
|
||||
phys_writeb(physAddress+0x01,(Bit8u)0x06); // push es
|
||||
phys_writew(physAddress+0x02,(Bit16u)0xa00f); // push fs
|
||||
phys_writew(physAddress+0x04,(Bit16u)0xa80f); // push gs
|
||||
phys_writeb(physAddress+0x06,(Bit8u)0x60); // pusha
|
||||
phys_writeb(physAddress+0x07,(Bit8u)0xFE); //GRP 4
|
||||
phys_writeb(physAddress+0x08,(Bit8u)0x38); //Extra Callback instruction
|
||||
phys_writew(physAddress+0x09,callback); //The immediate word
|
||||
phys_writeb(physAddress+0x0b,(Bit8u)0xCB); //A RETF Instruction
|
||||
return 0x0c;
|
||||
case CB_IPXESR_RET: // IPX ESR return
|
||||
if (use_cb) E_Exit("ipx esr return must not implement a callback handler!");
|
||||
phys_writeb(physAddress+0x00,(Bit8u)0xfa); // cli
|
||||
phys_writew(physAddress+0x01,(Bit16u)0x20b0); // mov al, 0x20
|
||||
phys_writew(physAddress+0x03,(Bit16u)0xa0e6); // out 0xa0, al
|
||||
phys_writew(physAddress+0x05,(Bit16u)0x20e6); // out 0x20, al
|
||||
phys_writeb(physAddress+0x07,(Bit8u)0x61); // popa
|
||||
phys_writew(physAddress+0x08,(Bit16u)0xA90F); // pop gs
|
||||
phys_writew(physAddress+0x0a,(Bit16u)0xA10F); // pop fs
|
||||
phys_writeb(physAddress+0x0c,(Bit8u)0x07); // pop es
|
||||
phys_writeb(physAddress+0x0d,(Bit8u)0x1f); // pop ds
|
||||
phys_writeb(physAddress+0x0e,(Bit8u)0xcf); //An IRET Instruction
|
||||
return 0x0f; */
|
||||
default:
|
||||
E_Exit("CALLBACK:Setup:Illegal type %d",type);
|
||||
}
|
||||
|
|
@ -200,7 +389,7 @@ Bitu CALLBACK_SetupExtra(Bitu callback, Bitu type, PhysPt physAddress) {
|
|||
|
||||
bool CALLBACK_Setup(Bitu callback,CallBack_Handler handler,Bitu type,const char* descr) {
|
||||
if (callback>=CB_MAX) return false;
|
||||
CALLBACK_SetupExtra(callback,type,CB_BASE+(callback<<4)+0);
|
||||
CALLBACK_SetupExtra(callback,type,CALLBACK_PhysPointer(callback)+0,(handler!=NULL));
|
||||
CallBack_Handlers[callback]=handler;
|
||||
CALLBACK_SetDescription(callback,descr);
|
||||
return true;
|
||||
|
|
@ -208,7 +397,7 @@ bool CALLBACK_Setup(Bitu callback,CallBack_Handler handler,Bitu type,const char*
|
|||
|
||||
Bitu CALLBACK_Setup(Bitu callback,CallBack_Handler handler,Bitu type,PhysPt addr,const char* descr) {
|
||||
if (callback>=CB_MAX) return 0;
|
||||
Bitu csize=CALLBACK_SetupExtra(callback,type,addr);
|
||||
Bitu csize=CALLBACK_SetupExtra(callback,type,addr,(handler!=NULL));
|
||||
if (csize>0) {
|
||||
CallBack_Handlers[callback]=handler;
|
||||
CALLBACK_SetDescription(callback,descr);
|
||||
|
|
@ -218,7 +407,7 @@ Bitu CALLBACK_Setup(Bitu callback,CallBack_Handler handler,Bitu type,PhysPt addr
|
|||
|
||||
void CALLBACK_RemoveSetup(Bitu callback) {
|
||||
for (Bitu i = 0;i < 16;i++) {
|
||||
phys_writeb(CB_BASE+(callback<<4)+i ,(Bit8u) 0x00);
|
||||
phys_writeb(CALLBACK_PhysPointer(callback)+i ,(Bit8u) 0x00);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -259,6 +448,7 @@ void CALLBACK_HandlerObject::Install(CallBack_Handler handler,Bitu type,PhysPt a
|
|||
CALLBACK_Setup(m_callback,handler,type,addr,description);
|
||||
} else E_Exit("Allready installed");
|
||||
}
|
||||
|
||||
void CALLBACK_HandlerObject::Allocate(CallBack_Handler handler,const char* description) {
|
||||
if(!installed) {
|
||||
installed=true;
|
||||
|
|
@ -282,21 +472,23 @@ void CALLBACK_Init(Section* sec) {
|
|||
for (i=0;i<CB_MAX;i++) {
|
||||
CallBack_Handlers[i]=&illegal_handler;
|
||||
}
|
||||
|
||||
/* Setup the Stop Handler */
|
||||
call_stop=CALLBACK_Allocate();
|
||||
CallBack_Handlers[call_stop]=stop_handler;
|
||||
CALLBACK_SetDescription(call_stop,"stop");
|
||||
phys_writeb(CB_BASE+(call_stop<<4)+0,0xFE);
|
||||
phys_writeb(CB_BASE+(call_stop<<4)+1,0x38);
|
||||
phys_writew(CB_BASE+(call_stop<<4)+2,call_stop);
|
||||
phys_writeb(CALLBACK_PhysPointer(call_stop)+0,0xFE);
|
||||
phys_writeb(CALLBACK_PhysPointer(call_stop)+1,0x38);
|
||||
phys_writew(CALLBACK_PhysPointer(call_stop)+2,call_stop);
|
||||
|
||||
/* Setup the idle handler */
|
||||
call_idle=CALLBACK_Allocate();
|
||||
CallBack_Handlers[call_idle]=stop_handler;
|
||||
CALLBACK_SetDescription(call_idle,"idle");
|
||||
for (i=0;i<=11;i++) phys_writeb(CB_BASE+(call_idle<<4)+i,0x90);
|
||||
phys_writeb(CB_BASE+(call_idle<<4)+12,0xFE);
|
||||
phys_writeb(CB_BASE+(call_idle<<4)+13,0x38);
|
||||
phys_writew(CB_BASE+(call_idle<<4)+14,call_idle);
|
||||
for (i=0;i<=11;i++) phys_writeb(CALLBACK_PhysPointer(call_idle)+i,0x90);
|
||||
phys_writeb(CALLBACK_PhysPointer(call_idle)+12,0xFE);
|
||||
phys_writeb(CALLBACK_PhysPointer(call_idle)+13,0x38);
|
||||
phys_writew(CALLBACK_PhysPointer(call_idle)+14,call_idle);
|
||||
|
||||
/* Setup all Interrupt to point to the default handler */
|
||||
call_default=CALLBACK_Allocate();
|
||||
|
|
@ -307,7 +499,7 @@ void CALLBACK_Init(Section* sec) {
|
|||
real_writed(0,i*4,CALLBACK_RealPointer(call_default));
|
||||
}
|
||||
/* Setup block of 0xCD 0xxx instructions */
|
||||
PhysPt rint_base=CB_BASE+CB_MAX*16;
|
||||
PhysPt rint_base=(CB_SEG << 4)+CB_MAX*CB_SIZE;
|
||||
for (i=0;i<=0xff;i++) {
|
||||
phys_writeb(rint_base,0xCD);
|
||||
phys_writeb(rint_base+1,i);
|
||||
|
|
@ -318,6 +510,7 @@ void CALLBACK_Init(Section* sec) {
|
|||
|
||||
}
|
||||
// setup a few interrupt handlers that point to bios IRETs by default
|
||||
real_writed(0,0x66*4,CALLBACK_RealPointer(call_default)); //war2d
|
||||
real_writed(0,0x67*4,CALLBACK_RealPointer(call_default));
|
||||
real_writed(0,0x68*4,CALLBACK_RealPointer(call_default));
|
||||
real_writed(0,0x5c*4,CALLBACK_RealPointer(call_default)); //Network stuff
|
||||
|
|
@ -325,19 +518,20 @@ void CALLBACK_Init(Section* sec) {
|
|||
|
||||
call_priv_io=CALLBACK_Allocate();
|
||||
|
||||
phys_writeb(CB_BASE+(call_priv_io<<4)+0x00,(Bit8u)0xec); // in al, dx
|
||||
phys_writeb(CB_BASE+(call_priv_io<<4)+0x01,(Bit8u)0xcb); // retf
|
||||
phys_writeb(CB_BASE+(call_priv_io<<4)+0x02,(Bit8u)0xed); // in ax, dx
|
||||
phys_writeb(CB_BASE+(call_priv_io<<4)+0x03,(Bit8u)0xcb); // retf
|
||||
phys_writeb(CB_BASE+(call_priv_io<<4)+0x04,(Bit8u)0x66); // in eax, dx
|
||||
phys_writeb(CB_BASE+(call_priv_io<<4)+0x05,(Bit8u)0xed);
|
||||
phys_writeb(CB_BASE+(call_priv_io<<4)+0x06,(Bit8u)0xcb); // retf
|
||||
// virtualizable in-out opcodes
|
||||
phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x00,(Bit8u)0xec); // in al, dx
|
||||
phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x01,(Bit8u)0xcb); // retf
|
||||
phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x02,(Bit8u)0xed); // in ax, dx
|
||||
phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x03,(Bit8u)0xcb); // retf
|
||||
phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x04,(Bit8u)0x66); // in eax, dx
|
||||
phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x05,(Bit8u)0xed);
|
||||
phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x06,(Bit8u)0xcb); // retf
|
||||
|
||||
phys_writeb(CB_BASE+(call_priv_io<<4)+0x08,(Bit8u)0xee); // out dx, al
|
||||
phys_writeb(CB_BASE+(call_priv_io<<4)+0x09,(Bit8u)0xcb); // retf
|
||||
phys_writeb(CB_BASE+(call_priv_io<<4)+0x0a,(Bit8u)0xef); // out dx, ax
|
||||
phys_writeb(CB_BASE+(call_priv_io<<4)+0x0b,(Bit8u)0xcb); // retf
|
||||
phys_writeb(CB_BASE+(call_priv_io<<4)+0x0c,(Bit8u)0x66); // out dx, eax
|
||||
phys_writeb(CB_BASE+(call_priv_io<<4)+0x0d,(Bit8u)0xef);
|
||||
phys_writeb(CB_BASE+(call_priv_io<<4)+0x0e,(Bit8u)0xcb); // retf
|
||||
phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x08,(Bit8u)0xee); // out dx, al
|
||||
phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x09,(Bit8u)0xcb); // retf
|
||||
phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x0a,(Bit8u)0xef); // out dx, ax
|
||||
phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x0b,(Bit8u)0xcb); // retf
|
||||
phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x0c,(Bit8u)0x66); // out dx, eax
|
||||
phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x0d,(Bit8u)0xef);
|
||||
phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x0e,(Bit8u)0xcb); // retf
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue