diff --git a/src/cpu/core_normal.cpp b/src/cpu/core_normal.cpp
index b4fb3317..fded8ef7 100644
--- a/src/cpu/core_normal.cpp
+++ b/src/cpu/core_normal.cpp
@@ -115,6 +115,9 @@ static struct {
 	PhysPt seg_prefix_base;
 	bool rep_zero;
 	GetEATable * ea_table;
+	struct {
+		bool skip;
+	} trap;
 } core;
 
 #include "instructions.h"
@@ -197,9 +200,10 @@ static Bits CPU_Core_Normal_Decode_Trap(void) {
 
 	Bits oldCycles = CPU_Cycles;
 	CPU_Cycles = 1;
+	core.trap.skip=false;
+
 	Bits ret=CPU_Core_Normal_Decode();
-	
-	Interrupt(1);
+	if (!core.trap.skip) Interrupt(1);
 	
 	CPU_Cycles = oldCycles-1;
 	cpudecoder = &CPU_Core_Normal_Decode;
diff --git a/src/cpu/core_normal/prefix_none.h b/src/cpu/core_normal/prefix_none.h
index fa097f1b..3eba569c 100644
--- a/src/cpu/core_normal/prefix_none.h
+++ b/src/cpu/core_normal/prefix_none.h
@@ -496,6 +496,7 @@
 				break;
 			case 0x02:					/* MOV SS,Ew */
 				CPU_SetSegGeneral(ss,val);
+				CPU_Cycles++; //Always do another instruction
 				break;
 			case 0x03:					/* MOV DS,Ew */
 				CPU_SetSegGeneral(ds,val);break;
@@ -759,7 +760,8 @@
 		if (DEBUG_Breakpoint()) {
 			return debugCallback;
 		}
-#endif			
+#endif		
+		core.trap.skip=true;
 		if (!Interrupt(3)) return CBRET_NONE;
 		goto decode_start;
 	CASE_B(0xcd)												/* INT Ib */	
@@ -771,6 +773,7 @@
 				return debugCallback;
 			}
 #endif
+			core.trap.skip=true;
 			if (!Interrupt(num)) return CBRET_NONE;
 			goto decode_start;			//Restore IP with a LOADIP
 		}
@@ -778,6 +781,7 @@
 	CASE_B(0xce)												/* INTO */
 		if (get_OF()) {
 			LEAVECORE;
+			core.trap.skip=true;
 			if (!Interrupt(4)) return CBRET_NONE;
 			goto decode_start;			//Restore IP with a LOADIP
 		}