diff --git a/src/ints/int10.h b/src/ints/int10.h index 2ba402e0..f9b945f2 100644 --- a/src/ints/int10.h +++ b/src/ints/int10.h @@ -16,7 +16,12 @@ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ +#ifndef DOSBOX_INT10_H +#define DOSBOX_INT10_H +#include "dosbox.h" + +#include "mem.h" #include "vga.h" #define S3_LFB_BASE 0xC0000000 @@ -237,3 +242,5 @@ bool INT10_VideoState_Restore(Bitu state,RealPt buffer); /* Video Parameter Tables */ Bit16u INT10_SetupVideoParameterTable(PhysPt basepos); void INT10_SetupBasicVideoParameterTable(void); + +#endif diff --git a/src/ints/int10_modes.cpp b/src/ints/int10_modes.cpp index f956ab18..f11eaf5b 100644 --- a/src/ints/int10_modes.cpp +++ b/src/ints/int10_modes.cpp @@ -16,14 +16,12 @@ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ - -#include - -#include "dosbox.h" -#include "mem.h" -#include "inout.h" #include "int10.h" -#include "vga.h" + +#include +#include + +#include "inout.h" #define _EGA_HALF_CLOCK 0x0001 #define _EGA_LINE_DOUBLE 0x0002 @@ -512,7 +510,8 @@ static void FinishSetMode(bool clearmem) { } } -bool INT10_SetVideoMode_OTHER(Bit16u mode,bool clearmem) { +static bool INT10_SetVideoMode_OTHER(Bit16u mode, bool clearmem) +{ switch (machine) { case MCH_CGA: if (mode>6) return false; @@ -534,6 +533,12 @@ bool INT10_SetVideoMode_OTHER(Bit16u mode,bool clearmem) { CurMode=&Hercules_Mode; mode=7; // in case the video parameter table is modified break; + case MCH_EGA: + case MCH_VGA: + // This code should be unreachable, as MCH_EGA and MCH_VGA are + // handled in function INT10_SetVideoMode. + assert(false); + break; } LOG(LOG_INT10,LOG_NORMAL)("Set Video Mode %X",mode); @@ -680,6 +685,12 @@ bool INT10_SetVideoMode_OTHER(Bit16u mode,bool clearmem) { INT10_SetColorSelect(1); INT10_SetBackgroundBorder(0); break; + case MCH_EGA: + case MCH_VGA: + // This code should be unreachable, as MCH_EGA and MCH_VGA are + // handled in function INT10_SetVideoMode. + assert(false); + break; } RealPt vparams = RealGetVec(0x1d); @@ -702,9 +713,10 @@ bool INT10_SetVideoMode_OTHER(Bit16u mode,bool clearmem) { return true; } - -bool INT10_SetVideoMode(Bit16u mode) { - bool clearmem=true;Bitu i; +bool INT10_SetVideoMode(Bit16u mode) +{ + bool clearmem = true; + Bitu i; if (mode>=0x100) { if ((mode & 0x4000) && int10.vesa_nolfb) return false; if (mode & 0x8000) clearmem=false; @@ -716,7 +728,9 @@ bool INT10_SetVideoMode(Bit16u mode) { } int10.vesa_setmode=0xffff; LOG(LOG_INT10,LOG_NORMAL)("Set Video Mode %X",mode); - if (!IS_EGAVGA_ARCH) return INT10_SetVideoMode_OTHER(mode,clearmem); + + if (!IS_EGAVGA_ARCH) + return INT10_SetVideoMode_OTHER(mode, clearmem); /* First read mode setup settings from bios area */ // Bit8u video_ctl=real_readb(BIOSMEM_SEG,BIOSMEM_VIDEO_CTL); @@ -829,6 +843,18 @@ bool INT10_SetVideoMode(Bit16u mode) { seq_data[2]|=0xf; //Enable all planes for writing seq_data[4]|=0xc; //Graphics - odd/even - Chained break; + case M_CGA16: // only in MCH_CGA + case M_TANDY2: // only in MCH_CGA, MCH_TANDY, MCH_PCJR + case M_TANDY4: // only in MCH_CGA, MCH_TANDY, MCH_PCJR + case M_TANDY16: // only in MCH_TANDY, MCH_PCJR + case M_TANDY_TEXT: // only in MCH_CGA, MCH_TANDY + case M_HERC_TEXT: // only in MCH_HERC + case M_HERC_GFX: // only in MCH_HERC + case M_ERROR: + // This code should be unreachable, as this function deals only + // with MCH_EGA and MCH_VGA. + assert(false); + break; } for (Bit8u ct=0;ctspecial & _VGA_PIXEL_DOUBLE) mode_control |= 0x08; break; + case M_CGA16: // only in MCH_CGA + case M_TANDY2: // only in MCH_CGA, MCH_TANDY, MCH_PCJR + case M_TANDY4: // only in MCH_CGA, MCH_TANDY, MCH_PCJR + case M_TANDY16: // only in MCH_TANDY, MCH_PCJR + case M_TANDY_TEXT: // only in MCH_CGA, MCH_TANDY + case M_HERC_TEXT: // only in MCH_HERC + case M_HERC_GFX: // only in MCH_HERC + case M_ERROR: + // This code should be unreachable, as this function deals only + // with MCH_EGA and MCH_VGA. + assert(false); + break; } IO_Write(crtc_base,0x17);IO_Write(crtc_base+1,mode_control); @@ -1134,6 +1172,18 @@ bool INT10_SetVideoMode(Bit16u mode) { gfx_data[0x6]|=0x0f; //graphics mode at at 0xb800=0xbfff } break; + case M_CGA16: // only in MCH_CGA + case M_TANDY2: // only in MCH_CGA, MCH_TANDY, MCH_PCJR + case M_TANDY4: // only in MCH_CGA, MCH_TANDY, MCH_PCJR + case M_TANDY16: // only in MCH_TANDY, MCH_PCJR + case M_TANDY_TEXT: // only in MCH_CGA, MCH_TANDY + case M_HERC_TEXT: // only in MCH_HERC + case M_HERC_GFX: // only in MCH_HERC + case M_ERROR: + // This code should be unreachable, as this function deals only + // with MCH_EGA and MCH_VGA. + assert(false); + break; } for (Bit8u ct=0;ct