add finer-grained dma wrapping capabilities
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@3450
This commit is contained in:
Sebastian Strohhäcker
parent
76794c051e
commit
669ec92a59
2 changed files with 62 additions and 42 deletions
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@ -16,7 +16,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: dma.h,v 1.19 2009-05-27 09:15:41 qbix79 Exp $ */
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/* $Id: dma.h,v 1.20 2009-07-24 09:56:14 c2woody Exp $ */
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#ifndef DOSBOX_DMA_H
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#define DOSBOX_DMA_H
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@ -35,7 +35,7 @@ class DmaChannel {
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public:
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Bit32u pagebase;
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Bit16u baseaddr;
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Bit16u curraddr;
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Bit32u curraddr;
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Bit16u basecnt;
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Bit16u currcnt;
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Bit8u channum;
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@ -114,4 +114,6 @@ DmaChannel * GetDMAChannel(Bit8u chan);
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void CloseSecondDMAController(void);
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bool SecondDMAControllerAvailable(void);
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static Bit32u dma_wrapping = 0xffff;
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#endif
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@ -16,7 +16,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: dma.cpp,v 1.40 2009-05-27 09:15:41 qbix79 Exp $ */
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/* $Id: dma.cpp,v 1.41 2009-07-24 09:56:14 c2woody Exp $ */
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#include <string.h>
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#include "dosbox.h"
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@ -41,28 +41,40 @@ static void UpdateEMSMapping(void) {
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}
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/* read a block from physical memory */
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static void DMA_BlockRead(PhysPt pt,void * data,Bitu size) {
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static void DMA_BlockRead(PhysPt spage,PhysPt offset,void * data,Bitu size,Bit8u dma16) {
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Bit8u * write=(Bit8u *) data;
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for ( ; size ; size--, pt++) {
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Bitu page = pt >> 12;
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Bitu highpart_addr_page = spage>>12;
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size <<= dma16;
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offset <<= dma16;
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Bit32u dma_wrap = ((0xffff<<dma16)+dma16) | dma_wrapping;
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for ( ; size ; size--, offset++) {
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if (offset>(dma_wrapping<<dma16)) E_Exit("DMA segbound wrapping (read)");
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offset &= dma_wrap;
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Bitu page = highpart_addr_page+(offset >> 12);
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/* care for EMS pageframe etc. */
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if (page < EMM_PAGEFRAME4K) page = paging.firstmb[page];
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else if (page < EMM_PAGEFRAME4K+0x10) page = ems_board_mapping[page];
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else if (page < LINK_START) page = paging.firstmb[page];
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*write++=phys_readb(page*4096 + (pt & 4095));
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*write++=phys_readb(page*4096 + (offset & 4095));
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}
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}
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/* write a block into physical memory */
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static void DMA_BlockWrite(PhysPt pt,void * data,Bitu size) {
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static void DMA_BlockWrite(PhysPt spage,PhysPt offset,void * data,Bitu size,Bit8u dma16) {
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Bit8u * read=(Bit8u *) data;
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for ( ; size ; size--, pt++) {
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Bitu page = pt >> 12;
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Bitu highpart_addr_page = spage>>12;
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size <<= dma16;
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offset <<= dma16;
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Bit32u dma_wrap = ((0xffff<<dma16)+dma16) | dma_wrapping;
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for ( ; size ; size--, offset++) {
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if (offset>(dma_wrapping<<dma16)) E_Exit("DMA segbound wrapping (write)");
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offset &= dma_wrap;
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Bitu page = highpart_addr_page+(offset >> 12);
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/* care for EMS pageframe etc. */
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if (page < EMM_PAGEFRAME4K) page = paging.firstmb[page];
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else if (page < EMM_PAGEFRAME4K+0x10) page = ems_board_mapping[page];
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else if (page < LINK_START) page = paging.firstmb[page];
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phys_writeb(page*4096 + (pt & 4095), *read++);
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phys_writeb(page*4096 + (offset & 4095), *read++);
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}
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}
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@ -91,7 +103,7 @@ bool SecondDMAControllerAvailable(void) {
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else return false;
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}
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static void DMA_Write_Port(Bitu port,Bitu val,Bitu iolen) {
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static void DMA_Write_Port(Bitu port,Bitu val,Bitu /*iolen*/) {
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if (port<0x10) {
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/* write to the first DMA controller (channels 0-3) */
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DmaControllers[0]->WriteControllerReg(port,val,1);
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@ -102,12 +114,12 @@ static void DMA_Write_Port(Bitu port,Bitu val,Bitu iolen) {
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UpdateEMSMapping();
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switch (port) {
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/* write DMA page register */
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case 0x81:GetDMAChannel(2)->SetPage(val);break;
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case 0x82:GetDMAChannel(3)->SetPage(val);break;
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case 0x83:GetDMAChannel(1)->SetPage(val);break;
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case 0x89:GetDMAChannel(6)->SetPage(val);break;
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case 0x8a:GetDMAChannel(7)->SetPage(val);break;
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case 0x8b:GetDMAChannel(5)->SetPage(val);break;
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case 0x81:GetDMAChannel(2)->SetPage((Bit8u)val);break;
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case 0x82:GetDMAChannel(3)->SetPage((Bit8u)val);break;
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case 0x83:GetDMAChannel(1)->SetPage((Bit8u)val);break;
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case 0x89:GetDMAChannel(6)->SetPage((Bit8u)val);break;
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case 0x8a:GetDMAChannel(7)->SetPage((Bit8u)val);break;
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case 0x8b:GetDMAChannel(5)->SetPage((Bit8u)val);break;
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}
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}
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}
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@ -131,13 +143,13 @@ static Bitu DMA_Read_Port(Bitu port,Bitu iolen) {
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return 0;
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}
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void DmaController::WriteControllerReg(Bitu reg,Bitu val,Bitu len) {
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DmaChannel * chan;Bitu i;
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void DmaController::WriteControllerReg(Bitu reg,Bitu val,Bitu /*len*/) {
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DmaChannel * chan;
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switch (reg) {
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/* set base address of DMA transfer (1st byte low part, 2nd byte high part) */
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case 0x0:case 0x2:case 0x4:case 0x6:
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UpdateEMSMapping();
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chan=GetChannel(reg >> 1);
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chan=GetChannel((Bit8u)(reg >> 1));
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flipflop=!flipflop;
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if (flipflop) {
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chan->baseaddr=(chan->baseaddr&0xff00)|val;
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@ -150,7 +162,7 @@ void DmaController::WriteControllerReg(Bitu reg,Bitu val,Bitu len) {
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/* set DMA transfer count (1st byte low part, 2nd byte high part) */
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case 0x1:case 0x3:case 0x5:case 0x7:
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UpdateEMSMapping();
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chan=GetChannel(reg >> 1);
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chan=GetChannel((Bit8u)(reg >> 1));
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flipflop=!flipflop;
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if (flipflop) {
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chan->basecnt=(chan->basecnt&0xff00)|val;
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@ -181,8 +193,8 @@ void DmaController::WriteControllerReg(Bitu reg,Bitu val,Bitu len) {
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flipflop=false;
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break;
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case 0xd: /* Master Clear/Reset */
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for (i=0;i<4;i++) {
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chan=GetChannel(i);
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for (Bit8u ct=0;ct<4;ct++) {
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chan=GetChannel(ct);
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chan->SetMask(true);
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chan->tcount=false;
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}
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@ -190,15 +202,15 @@ void DmaController::WriteControllerReg(Bitu reg,Bitu val,Bitu len) {
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break;
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case 0xe: /* Clear Mask register */
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UpdateEMSMapping();
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for (i=0;i<4;i++) {
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chan=GetChannel(i);
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for (Bit8u ct=0;ct<4;ct++) {
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chan=GetChannel(ct);
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chan->SetMask(false);
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}
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break;
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case 0xf: /* Multiple Mask register */
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UpdateEMSMapping();
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for (i=0;i<4;i++) {
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chan=GetChannel(i);
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for (Bit8u ct=0;ct<4;ct++) {
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chan=GetChannel(ct);
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chan->SetMask(val & 1);
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val>>=1;
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}
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@ -206,12 +218,12 @@ void DmaController::WriteControllerReg(Bitu reg,Bitu val,Bitu len) {
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}
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}
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Bitu DmaController::ReadControllerReg(Bitu reg,Bitu len) {
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DmaChannel * chan;Bitu i,ret;
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Bitu DmaController::ReadControllerReg(Bitu reg,Bitu /*len*/) {
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DmaChannel * chan;Bitu ret;
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switch (reg) {
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/* read base address of DMA transfer (1st byte low part, 2nd byte high part) */
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case 0x0:case 0x2:case 0x4:case 0x6:
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chan=GetChannel(reg >> 1);
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chan=GetChannel((Bit8u)(reg >> 1));
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flipflop=!flipflop;
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if (flipflop) {
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return chan->curraddr & 0xff;
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@ -220,7 +232,7 @@ Bitu DmaController::ReadControllerReg(Bitu reg,Bitu len) {
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}
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/* read DMA transfer count (1st byte low part, 2nd byte high part) */
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case 0x1:case 0x3:case 0x5:case 0x7:
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chan=GetChannel(reg >> 1);
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chan=GetChannel((Bit8u)(reg >> 1));
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flipflop=!flipflop;
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if (flipflop) {
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return chan->currcnt & 0xff;
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@ -229,12 +241,11 @@ Bitu DmaController::ReadControllerReg(Bitu reg,Bitu len) {
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}
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case 0x8: /* Status Register */
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ret=0;
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for (i=0;i<4;i++) {
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chan=GetChannel(i);
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if (chan->tcount) ret|=1 << i;
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for (Bit8u ct=0;ct<4;ct++) {
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chan=GetChannel(ct);
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if (chan->tcount) ret|=1 << ct;
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chan->tcount=false;
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// if (chan->callback) ret|=1 << (i+4);
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if (chan->request) ret|=1 << (4+i);
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if (chan->request) ret|=1 << (4+ct);
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}
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return ret;
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default:
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@ -264,15 +275,16 @@ DmaChannel::DmaChannel(Bit8u num, bool dma16) {
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Bitu DmaChannel::Read(Bitu want, Bit8u * buffer) {
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Bitu done=0;
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curraddr &= dma_wrapping;
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again:
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Bitu left=(currcnt+1);
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if (want<left) {
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DMA_BlockRead(pagebase+(curraddr << DMA16),buffer,want << DMA16);
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DMA_BlockRead(pagebase,curraddr,buffer,want,DMA16);
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done+=want;
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curraddr+=want;
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currcnt-=want;
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} else {
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DMA_BlockRead(pagebase+(curraddr << DMA16),buffer,left << DMA16);
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DMA_BlockRead(pagebase,curraddr,buffer,want,DMA16);
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buffer+=left << DMA16;
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want-=left;
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done+=left;
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@ -295,15 +307,16 @@ again:
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Bitu DmaChannel::Write(Bitu want, Bit8u * buffer) {
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Bitu done=0;
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curraddr &= dma_wrapping;
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again:
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Bitu left=(currcnt+1);
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if (want<left) {
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DMA_BlockWrite(pagebase+(curraddr << DMA16),buffer,want << DMA16);
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DMA_BlockWrite(pagebase,curraddr,buffer,want,DMA16);
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done+=want;
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curraddr+=want;
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currcnt-=want;
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} else {
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DMA_BlockWrite(pagebase+(curraddr << DMA16),buffer,left << DMA16);
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DMA_BlockWrite(pagebase,curraddr,buffer,left,DMA16);
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buffer+=left << DMA16;
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want-=left;
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done+=left;
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@ -366,12 +379,17 @@ public:
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}
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};
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void DMA_SetWrapping(Bitu wrap) {
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dma_wrapping = wrap;
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}
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static DMA* test;
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void DMA_Destroy(Section* sec){
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void DMA_Destroy(Section* /*sec*/){
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delete test;
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}
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void DMA_Init(Section* sec) {
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DMA_SetWrapping(0xffff);
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test = new DMA(sec);
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sec->AddDestroyFunction(&DMA_Destroy);
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Bitu i;
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