diff --git a/src/cpu/core_full/load.h b/src/cpu/core_full/load.h
index 64740693..00818973 100644
--- a/src/cpu/core_full/load.h
+++ b/src/cpu/core_full/load.h
@@ -75,6 +75,12 @@ l_M_Ewx:
 			goto l_M_EwGw;
 		case M_EwGwIb:
 			inst.imm.d=Fetchb();
+			goto l_M_EwGw;
+		case M_EwGwt:
+			inst.op2.d=reg_16(inst.rm_index);
+			inst.rm_eaa=((Bit32s)inst.op1.d >> 4) * 2;
+			inst.op2.d&=15;
+			goto l_M_Ew;
 l_M_EwGw:			
 		case M_EwGw:
 			inst.op2.d=reg_16(inst.rm_index);
@@ -111,8 +117,14 @@ l_M_Ew:
 		case M_EdGdCL:
 			inst.imm.d=reg_cl;
 			goto l_M_EdGd;
+		case M_EdGdt:
+			inst.op2.d=reg_32(inst.rm_index);
+			inst.rm_eaa=((Bit32s)inst.op1.d >> 5) * 4;
+			inst.op2.d&=31;
+			goto l_M_Ed;
 		case M_EdGdIb:
 			inst.imm.d=Fetchb();
+			goto l_M_EdGd;
 l_M_EdGd:
 		case M_EdGd:
 			inst.op2.d=reg_32(inst.rm_index);
diff --git a/src/cpu/core_full/op.h b/src/cpu/core_full/op.h
index c54567a5..1ccb4227 100644
--- a/src/cpu/core_full/op.h
+++ b/src/cpu/core_full/op.h
@@ -563,12 +563,12 @@ switch (inst.code.op) {
 	case O_BTCw:
 		FillFlags();
 		SETFLAGBIT(CF,(inst.op1.d & (1 << (inst.op2.d & 15))));
-		inst.op1.d&=~(1 << (inst.op2.d & 15));
+		inst.op1.d^=(1 << (inst.op2.d & 15));
 		break;
 	case O_BTRw:
 		FillFlags();
 		SETFLAGBIT(CF,(inst.op1.d & (1 << (inst.op2.d & 15))));
-		inst.op1.d^=(1 << (inst.op2.d & 15));
+		inst.op1.d&=~(1 << (inst.op2.d & 15));
 		break;
 	case O_BTd:
 		FillFlags();
@@ -582,12 +582,12 @@ switch (inst.code.op) {
 	case O_BTCd:
 		FillFlags();
 		SETFLAGBIT(CF,(inst.op1.d & (1 << (inst.op2.d & 31))));
-		inst.op1.d&=~(1 << (inst.op2.d & 31));
+		inst.op1.d^=(1 << (inst.op2.d & 31));
 		break;
 	case O_BTRd:
 		FillFlags();
 		SETFLAGBIT(CF,(inst.op1.d & (1 << (inst.op2.d & 31))));
-		inst.op1.d^=(1 << (inst.op2.d & 31));
+		inst.op1.d&=~(1 << (inst.op2.d & 31));
 	case O_BSWAP:
 		BSWAP(inst.op1.d);
 		break;
diff --git a/src/cpu/core_full/optable.h b/src/cpu/core_full/optable.h
index 3b82fca2..bc9d0a0b 100644
--- a/src/cpu/core_full/optable.h
+++ b/src/cpu/core_full/optable.h
@@ -294,23 +294,23 @@ static OpCode OpCodeTable[1024]={
 
 /* 0x1a0 - 0x1a7 */
 {L_SEG		,0		,S_PUSHw	,fs		},{L_POPw	,0			,S_SEGI	,fs		},
-{D_CPUID	,0			,0		,0		},{L_MODRM	,O_BTw		,S_Ew	,M_EwGw	},
+{D_CPUID	,0			,0		,0		},{L_MODRM	,O_BTw		,S_Ew	,M_EwGwt	},
 {L_MODRM	,O_DSHLw	,S_Ew,M_EwGwIb	},{L_MODRM	,O_DSHLw	,S_Ew	,M_EwGwCL	},
 {0			,0			,0		,0		},{0		,0			,0		,0		},
 /* 0x1a8 - 0x1af */
 {L_SEG		,0		,S_PUSHw	,gs		},{L_POPw	,0			,S_SEGI	,gs		},
-{0			,0			,0		,0		},{L_MODRM	,O_BTSw		,S_Ew	,M_EwGw	},
+{0			,0			,0		,0		},{L_MODRM	,O_BTSw		,S_Ew	,M_EwGwt	},
 {L_MODRM	,O_DSHRw	,S_Ew,M_EwGwIb	},{L_MODRM	,O_DSHRw	,S_Ew	,M_EwGwCL	},
 {0			,0			,0		,0		},{L_MODRM	,O_IMULRw	,S_Gw	,M_EwxGwx	},
 
 /* 0x1b0 - 0x1b7 */
 {0			,0			,0		,0		},{0		,0			,0		,0		},
-{L_MODRM	,O_SEGSS	,S_SEGGw,M_Efw	},{L_MODRM	,O_BTRw		,S_Ew	,M_EwGw	},
+{L_MODRM	,O_SEGSS	,S_SEGGw,M_Efw	},{L_MODRM	,O_BTRw		,S_Ew	,M_EwGwt	},
 {L_MODRM	,O_SEGFS	,S_SEGGw,M_Efw	},{L_MODRM	,O_SEGGS	,S_SEGGw,M_Efw	},
 {L_MODRM	,0			,S_Gw	,M_Eb	},{L_MODRM	,0			,S_Gw	,M_Ew	},
 /* 0x1b8 - 0x1bf */
 {0			,0			,0		,0		},{0		,0			,0		,0		},
-{L_MODRM	,0xe		,0		,M_GRP	},{L_MODRM	,O_BTCw		,S_Ew	,M_EwGw	},
+{L_MODRM	,0xe		,0		,M_GRP	},{L_MODRM	,O_BTCw		,S_Ew	,M_EwGwt	},
 {L_MODRM	,O_BSFw		,S_Gw	,M_Ew	},{L_MODRM	,O_BSRw		,S_Gw	,M_Ew	},
 {L_MODRM	,0			,S_Gw	,M_Ebx	},{L_MODRM	,0			,S_Gw	,M_Ewx	},
 
@@ -650,23 +650,23 @@ static OpCode OpCodeTable[1024]={
 
 /* 0x3a0 - 0x3a7 */
 {L_SEG		,0		,S_PUSHd	,fs		},{L_POPd	,0			,S_SEGI	,fs		},
-{D_CPUID	,0			,0		,0		},{L_MODRM	,O_BTd		,S_Ed	,M_EdGd	},
+{D_CPUID	,0			,0		,0		},{L_MODRM	,O_BTd		,S_Ed	,M_EdGdt	},
 {L_MODRM	,O_DSHLd	,S_Ed,M_EdGdIb	},{L_MODRM	,O_DSHLd	,S_Ed	,M_EdGdCL	},
 {0			,0			,0		,0		},{0		,0			,0		,0		},
 /* 0x3a8 - 0x3af */
 {L_SEG		,0		,S_PUSHd	,gs		},{L_POPd	,0			,S_SEGI	,gs		},
-{0			,0			,0		,0		},{L_MODRM	,O_BTSd		,S_Ed	,M_EdGd	},
+{0			,0			,0		,0		},{L_MODRM	,O_BTSd		,S_Ed	,M_EdGdt	},
 {L_MODRM	,O_DSHRd	,S_Ed,M_EdGdIb	},{L_MODRM	,O_DSHRd	,S_Ed	,M_EdGdCL	},
 {0			,0			,0		,0		},{L_MODRM	,O_IMULRd	,S_Gd	,M_EdxGdx	},
 
 /* 0x3b0 - 0x3b7 */
 {0			,0			,0		,0		},{0		,0			,0		,0		},
-{L_MODRM	,O_SEGSS	,S_SEGGd,M_Efd	},{L_MODRM	,O_BTRd		,S_Ed	,M_EdGd	},
+{L_MODRM	,O_SEGSS	,S_SEGGd,M_Efd	},{L_MODRM	,O_BTRd		,S_Ed	,M_EdGdt	},
 {L_MODRM	,O_SEGFS	,S_SEGGd,M_Efd	},{L_MODRM	,O_SEGGS	,S_SEGGd,M_Efd	},
 {L_MODRM	,0			,S_Gd	,M_Eb	},{L_MODRM	,0			,S_Gd	,M_Ew	},
 /* 0x3b8 - 0x3bf */
 {0			,0			,0		,0		},{0		,0			,0		,0		},
-{L_MODRM	,0xf		,0		,M_GRP	},{L_MODRM	,O_BTCd		,S_Ed	,M_EdGd	},
+{L_MODRM	,0xf		,0		,M_GRP	},{L_MODRM	,O_BTCd		,S_Ed	,M_EdGdt	},
 {L_MODRM	,O_BSFd		,S_Gd	,M_Ed	},{L_MODRM	,O_BSRd		,S_Gd	,M_Ed	},
 {L_MODRM	,0			,S_Gd	,M_Ebx	},{L_MODRM	,0			,S_Gd	,M_Ewx	},
 
@@ -801,8 +801,8 @@ static OpCode Groups[16][8]={
 },{	/* 0x0f Group 8 Ed */
 {0		,0			,0		,0			},{0	,0			,0		,0			},
 {0		,0			,0		,0			},{0	,0			,0		,0			},
-{0		,O_BTd		,S_Ed	,M_Ib		},{0	,O_BTSd		,S_Ed	,M_EdIb		},
-{0		,O_BTRd		,S_Ed	,M_Ib		},{0	,O_BTCd		,S_Ed	,M_EdIb		},
+{0		,O_BTd		,S_Ed	,M_EdIb		},{0	,O_BTSd		,S_Ed	,M_EdIb		},
+{0		,O_BTRd		,S_Ed	,M_EdIb		},{0	,O_BTCd		,S_Ed	,M_EdIb		},
 
 
 
diff --git a/src/cpu/core_full/support.h b/src/cpu/core_full/support.h
index ade673e8..27b9419d 100644
--- a/src/cpu/core_full/support.h
+++ b/src/cpu/core_full/support.h
@@ -130,8 +130,8 @@ enum {
 enum {
 	M_None=0,
 	M_Ebx,M_Eb,M_Gb,M_EbGb,M_GbEb,
-	M_Ewx,M_Ew,M_Gw,M_EwGw,M_GwEw,M_EwxGwx,
-	M_Edx,M_Ed,M_Gd,M_EdGd,M_GdEd,M_EdxGdx,
+	M_Ewx,M_Ew,M_Gw,M_EwGw,M_GwEw,M_EwxGwx,M_EwGwt,
+	M_Edx,M_Ed,M_Gd,M_EdGd,M_GdEd,M_EdxGdx,M_EdGdt,
 	
 	M_EbIb,M_EwIb,M_EdIb,
 	M_EwIw,M_EwIbx,M_EwxIbx,M_EwxIwx,M_EwGwIb,M_EwGwCL,