fix some s3 crtc register return values, use trio64 as ID (re-enables lfb detection for univbe)
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@3189
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1 changed files with 17 additions and 16 deletions
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@ -16,7 +16,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: vga_s3.cpp,v 1.13 2008-03-14 22:00:59 c2woody Exp $ */
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/* $Id: vga_s3.cpp,v 1.14 2008-08-03 13:37:49 c2woody Exp $ */
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#include "dosbox.h"
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#include "inout.h"
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@ -330,18 +330,18 @@ void SVGA_S3_WriteCRTC(Bitu reg,Bitu val,Bitu iolen) {
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Bitu SVGA_S3_ReadCRTC( Bitu reg, Bitu iolen) {
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switch (reg) {
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case 0x2d: /* Extended Chip ID. */
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case 0x24: /* attribute controller index (read only) */
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case 0x26:
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return (vga.attr.enabled?0x20:0x00) | (vga.attr.index&0x1f);
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case 0x2d: /* Extended Chip ID (high byte of PCI device ID) */
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return 0x88;
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// Always 88h ?
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case 0x2e: /* New Chip ID */
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return 0x11;
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//Trio 64 id
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case 0x2e: /* New Chip ID (low byte of PCI device ID) */
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return 0x11; // Trio64
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case 0x2f: /* Revision */
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return 0x44;
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return 0x00; // Trio64 (exact value?)
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// return 0x44; // Trio64 V+
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case 0x30: /* CR30 Chip ID/REV register */
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return 0xe1; //Trio+ dual byte
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//return 0xc0; // 864
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return 0xe1; // Trio+ dual byte
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case 0x31: /* CR31 Memory Configuration */
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//TODO mix in bits from baseaddress;
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return vga.s3.reg_31;
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@ -350,7 +350,8 @@ Bitu SVGA_S3_ReadCRTC( Bitu reg, Bitu iolen) {
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case 0x36: /* CR36 Reset State Read 1 */
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return vga.s3.reg_36;
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case 0x37: /* Reset state read 2 */
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return 0x2b;
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return 0x2f;
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// return 0x2b;
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case 0x38: /* CR38 Register Lock 1 */
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return vga.s3.reg_lock1;
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case 0x39: /* CR39 Register Lock 2 */
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@ -510,19 +511,19 @@ void SVGA_Setup_S3Trio(void) {
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// Set CRTC 36 to specify amount of VRAM and PCI
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if (vga.vmemsize < 1024*1024) {
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vga.vmemsize = 512*1024;
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vga.s3.reg_36 = 0xf2;
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vga.s3.reg_36 = 0xf9; // less than 1mb, video BIOS access enabled, VLB
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} else if (vga.vmemsize < 2048*1024) {
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vga.vmemsize = 1024*1024;
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vga.s3.reg_36 = 0xd2;
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vga.s3.reg_36 = 0xd9; // 1mb, video BIOS access enabled, VLB
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} else if (vga.vmemsize < 3072*1024) {
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vga.vmemsize = 2048*1024;
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vga.s3.reg_36 = 0x92;
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vga.s3.reg_36 = 0x99; // 2mb, video BIOS access enabled, VLB
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} else if (vga.vmemsize < 4096*1024) {
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vga.vmemsize = 3072*1024;
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vga.s3.reg_36 = 0x52;
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vga.s3.reg_36 = 0x59; // 3mb, video BIOS access enabled, VLB
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} else { // Trio64 supported only up to 4M
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vga.vmemsize = 4096*1024;
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vga.s3.reg_36 = 0x12;
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vga.s3.reg_36 = 0x19; // 4mb, video BIOS access enabled, VLB
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}
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// S3 ROM signature
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