diff --git a/src/cpu/core_full/load.h b/src/cpu/core_full/load.h
index 3a63a3de..cfe87413 100644
--- a/src/cpu/core_full/load.h
+++ b/src/cpu/core_full/load.h
@@ -427,6 +427,9 @@ l_M_Ed:
 		goto nextopcode;
 	case D_WAIT:
 	case D_NOP:
+	case D_LOCK: /* FIXME: according to intel, LOCK should raise an exception if it's not followed by one of a small set of instructions;
+			probably doesn't matter for our purposes as it is a pentium prefix anyhow */
+		LOG(LOG_CPU,LOG_NORMAL)("CPU:LOCK");
 		goto nextopcode;
 	case D_ENTERw:
 		{
diff --git a/src/cpu/core_full/optable.h b/src/cpu/core_full/optable.h
index 4e60876a..683ec41e 100644
--- a/src/cpu/core_full/optable.h
+++ b/src/cpu/core_full/optable.h
@@ -171,7 +171,7 @@ static OpCode OpCodeTable[1024]={
 {L_REGw		,O_OUTb		,0		,REGI_DX},{L_REGw	,O_OUTw		,0		,REGI_DX},
 
 /* 0xf0 - 0xf7 */
-{0			,0			,0		,0		},{0		,0			,0		,0		},
+{D_LOCK		,0			,0		,0		},{0		,0			,0		,0		},
 {L_PREREPNE	,0			,0		,0		},{L_PREREP	,0			,0		,0		},
 {D_HLT		,0			,0		,0		},{D_CMC	,0			,0		,0		},
 {L_MODRM	,8			,0		,M_GRP	},{L_MODRM	,9			,0		,M_GRP	},
@@ -316,7 +316,7 @@ static OpCode OpCodeTable[1024]={
 {L_MODRM	,0			,S_Gw	,M_Ebx	},{L_MODRM	,0			,S_Gw	,M_Ewx	},
 
 /* 0x1c0 - 0x1cc */
-{0			,0			,0		,0		},{0		,0			,0		,0		},
+{L_MODRM		,t_ADDb			,S_EbGb		,M_GbEb		},{L_MODRM		,t_ADDw		,S_EwGw		,M_GwEw	},
 {0			,0			,0		,0		},{0		,0			,0		,0		},
 {0			,0			,0		,0		},{0		,0			,0		,0		},
 {0			,0			,0		,0		},{0		,0			,0		,0		},
@@ -526,7 +526,7 @@ static OpCode OpCodeTable[1024]={
 {L_REGw		,O_OUTb		,0		,REGI_DX},{L_REGw	,O_OUTd		,0		,REGI_DX},
 
 /* 0x2f0 - 0x2f7 */
-{0			,0			,0		,0		},{0		,0			,0		,0		},
+{D_LOCK			,0			,0		,0		},{0		,0			,0		,0		},
 {L_PREREPNE	,0			,0		,0		},{L_PREREP	,0			,0		,0		},
 {0			,0			,0		,0		},{D_CMC	,0			,0		,0		},
 {L_MODRM	,8			,0		,M_GRP	},{L_MODRM	,0xa		,0		,M_GRP	},
@@ -672,7 +672,7 @@ static OpCode OpCodeTable[1024]={
 {L_MODRM	,0			,S_Gd	,M_Ebx	},{L_MODRM	,0			,S_Gd	,M_Ewx	},
 
 /* 0x3c0 - 0x3cc */
-{0			,0			,0		,0		},{0		,0			,0		,0		},
+{L_MODRM		,t_ADDb			,S_EbGb		,M_GbEb		},{L_MODRM		,t_ADDd		,S_EdGd		,M_GdEd	},
 {0			,0			,0		,0		},{0		,0			,0		,0		},
 {0			,0			,0		,0		},{0		,0			,0		,0		},
 {0			,0			,0		,0		},{0		,0			,0		,0		},
diff --git a/src/cpu/core_full/support.h b/src/cpu/core_full/support.h
index 120a854d..5521daae 100644
--- a/src/cpu/core_full/support.h
+++ b/src/cpu/core_full/support.h
@@ -45,6 +45,7 @@ enum {
 	D_SAHF,D_LAHF,
 	D_CPUID,
 	D_HLT,D_CLTS,
+	D_LOCK,
 	L_ERROR,
 };
 
diff --git a/src/cpu/core_normal/prefix_0f.h b/src/cpu/core_normal/prefix_0f.h
index b6218b90..ca5c7d58 100644
--- a/src/cpu/core_normal/prefix_0f.h
+++ b/src/cpu/core_normal/prefix_0f.h
@@ -444,6 +444,20 @@
 			else {GetEAa;*rmrw=LoadMbs(eaa);}
 			break;
 		}
+	CASE_0F_B(0xc0)												/* XADD Gb,Eb */
+		{
+			GetRMrb;Bit8u oldrmrb=*rmrb;
+			if (rm >= 0xc0 ) {GetEArb;*rmrb=*earb;*earb+=oldrmrb;}
+			else {GetEAa;*rmrb=LoadMb(eaa);SaveMb(eaa,LoadMb(eaa)+oldrmrb);}
+			break;
+		}
+	CASE_0F_W(0xc1)												/* XADD Gw,Ew */
+		{
+			GetRMrw;Bit16u oldrmrw=*rmrw;
+			if (rm >= 0xc0 ) {GetEArw;*rmrw=*earw;*earw+=oldrmrw;}
+			else {GetEAa;*rmrw=LoadMw(eaa);SaveMw(eaa,LoadMw(eaa)+oldrmrw);}
+			break;
+		}
 	CASE_0F_B(0xc8)												/* BSWAP EAX */
 		BSWAP(reg_eax);break;
 	CASE_0F_B(0xc9)												/* BSWAP ECX */
diff --git a/src/cpu/core_normal/prefix_66_0f.h b/src/cpu/core_normal/prefix_66_0f.h
index 3e4e360e..d7ad2386 100644
--- a/src/cpu/core_normal/prefix_66_0f.h
+++ b/src/cpu/core_normal/prefix_66_0f.h
@@ -376,3 +376,10 @@
 			else {GetEAa;*rmrd=LoadMws(eaa);}
 			break;
 		}
+	CASE_0F_D(0xc1)												/* XADD Gd,Ed */
+		{
+			GetRMrd;Bit32u oldrmrd=*rmrd;
+			if (rm >= 0xc0 ) {GetEArd;*rmrd=*eard;*eard+=oldrmrd;}
+			else {GetEAa;*rmrd=LoadMd(eaa);SaveMd(eaa,LoadMd(eaa)+oldrmrd);}
+			break;
+		}
diff --git a/src/cpu/core_normal/prefix_none.h b/src/cpu/core_normal/prefix_none.h
index f6f3a7b2..3cde3a1d 100644
--- a/src/cpu/core_normal/prefix_none.h
+++ b/src/cpu/core_normal/prefix_none.h
@@ -926,7 +926,7 @@
 		IO_WriteW(reg_dx,reg_ax);
 		break;
 	CASE_B(0xf0)												/* LOCK */
-		LOG(LOG_CPU,LOG_NORMAL)("CPU:LOCK");
+		LOG(LOG_CPU,LOG_NORMAL)("CPU:LOCK"); /* FIXME: see case D_LOCK in core_full/load.h */
 		break;
 	CASE_B(0xf2)												/* REPNZ */
 		DO_PREFIX_REP(false);