crX-exceptions for full core
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@2233
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d9552a7bae
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2 changed files with 13 additions and 7 deletions
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@ -442,17 +442,17 @@ switch (inst.code.op) {
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}
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case 6: /* LMSW */
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FillFlags();
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CPU_LMSW(inst.op1.w);
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if (CPU_LMSW(inst.op1.w)) RunException();
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goto nextopcode;
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default:
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LOG(LOG_CPU,LOG_ERROR)("Group 7 Illegal subfunction %X",inst.rm_index);
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}
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break;
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case O_M_CRx_Rd:
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CPU_SET_CRX(inst.rm_index,inst.op1.d);
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if (CPU_WRITE_CRX(inst.rm_index,inst.op1.d)) RunException();
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break;
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case O_M_Rd_CRx:
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inst.op1.d=CPU_GET_CRX(inst.rm_index);
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if (CPU_READ_CRX(inst.rm_index,inst.op1.d)) RunException();
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break;
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case O_M_DRx_Rd:
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// LOG(LOG_CPU,LOG_NORMAL)("MOV DR%d,%X",inst.rm_index,inst.op1.d);
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@ -16,7 +16,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: cpu.cpp,v 1.71 2005-07-04 20:20:18 c2woody Exp $ */
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/* $Id: cpu.cpp,v 1.72 2005-07-09 13:07:48 c2woody Exp $ */
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#include <assert.h>
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#include "dosbox.h"
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@ -52,6 +52,7 @@ void CPU_Core_Simple_Init(void);
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void CPU_Core_Dyn_X86_Init(void);
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#define EXCEPTION_UD 6
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#define EXCEPTION_TS 10
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#define EXCEPTION_NP 11
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#define EXCEPTION_SS 12
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@ -1430,8 +1431,10 @@ void CPU_SET_CRX(Bitu cr,Bitu value) {
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}
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bool CPU_WRITE_CRX(Bitu cr,Bitu value) {
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if (cpu.pmode && GETFLAG(VM)) return CPU_PrepareException(EXCEPTION_GP,0);
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else CPU_SET_CRX(cr,value);
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/* Check if privileged to access control registers */
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if (cpu.pmode && (cpu.cpl>0)) return CPU_PrepareException(EXCEPTION_GP,0);
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if ((cr==1) || (cr>4)) return CPU_PrepareException(EXCEPTION_UD,0);
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CPU_SET_CRX(cr,value);
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return false;
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}
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@ -1451,7 +1454,9 @@ Bitu CPU_GET_CRX(Bitu cr) {
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}
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bool CPU_READ_CRX(Bitu cr,Bit32u & retvalue) {
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if (cpu.pmode && GETFLAG(VM)) return CPU_PrepareException(EXCEPTION_GP,0);
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/* Check if privileged to access control registers */
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if (cpu.pmode && (cpu.cpl>0)) return CPU_PrepareException(EXCEPTION_GP,0);
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if ((cr==1) || (cr>4)) return CPU_PrepareException(EXCEPTION_UD,0);
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retvalue=CPU_GET_CRX(cr);
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return false;
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}
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@ -1462,6 +1467,7 @@ void CPU_SMSW(Bitu & word) {
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}
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Bitu CPU_LMSW(Bitu word) {
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if (cpu.pmode && (cpu.cpl>0)) return CPU_PrepareException(EXCEPTION_GP,0);
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word&=0xf;
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if (cpu.cr0 & 1) word|=1;
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word|=(cpu.cr0&0xfffffff0);
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