From 7b3747769cf1173fff73e9a53260c2807d9c8caf Mon Sep 17 00:00:00 2001 From: Sjoerd van der Berg Date: Tue, 6 Jan 2004 20:48:21 +0000 Subject: [PATCH] fix double shift gen functions Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@1539 --- src/cpu/core_dyn_x86/risc_x86.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/cpu/core_dyn_x86/risc_x86.h b/src/cpu/core_dyn_x86/risc_x86.h index 9aee4335..b6d7d8e8 100644 --- a/src/cpu/core_dyn_x86/risc_x86.h +++ b/src/cpu/core_dyn_x86/risc_x86.h @@ -498,19 +498,19 @@ static void gen_dshift_imm(bool dword,bool left,DynReg * dr1,DynReg * dr2,Bitu i if (!dword) cache_addb(0x66); if (left) cache_addw(0xa40f); //SHLD IMM else cache_addw(0xac0f); //SHRD IMM - cache_addb(0xc0+gr1->index+(gr2->index<<8)); + cache_addb(0xc0+gr1->index+(gr2->index<<3)); cache_addb(imm); dr1->flags|=DYNFLG_CHANGED; } static void gen_dshift_cl(bool dword,bool left,DynReg * dr1,DynReg * dr2,DynReg * drecx) { + ForceDynReg(x86gen.regs[X86_REG_ECX],drecx); GenReg * gr1=FindDynReg(dr1); GenReg * gr2=FindDynReg(dr2); - ForceDynReg(x86gen.regs[X86_REG_ECX],drecx); if (!dword) cache_addb(0x66); if (left) cache_addw(0xa50f); //SHLD CL else cache_addw(0xad0f); //SHRD CL - cache_addb(0xc0+gr1->index+(gr2->index<<8)); + cache_addb(0xc0+gr1->index+(gr2->index<<3)); dr1->flags|=DYNFLG_CHANGED; }