diff --git a/src/fpu/fpu.cpp b/src/fpu/fpu.cpp
index 1012d2f5..cb7b87e9 100644
--- a/src/fpu/fpu.cpp
+++ b/src/fpu/fpu.cpp
@@ -16,6 +16,8 @@
  *  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  */
 
+/* $Id: fpu.cpp,v 1.14 2003-10-19 19:21:12 qbix79 Exp $ */
+
 #include "dosbox.h"
 #if C_FPU
 
@@ -375,7 +377,7 @@ void FPU_ESC1_Normal(Bitu rm) {
 void FPU_ESC2_EA(Bitu rm,PhysPt addr) {
 	/* 32 bits integer operants */
 	Bit32s blah = mem_readd(addr);
-	fpu.regs[8].d = static_cast<double>(blah);
+	fpu.regs[8].d = static_cast<Real64>(blah);
 	EATREE(rm);
 }
 
@@ -453,8 +455,7 @@ void FPU_ESC3_Normal(Bitu rm) {
 
 
 void FPU_ESC4_EA(Bitu rm,PhysPt addr) {
-	/* REGULAR TREE WITH 64 BITS REALS ? double ? */
-//	E_Exit("how to load a double in esc 4 ea");
+	/* REGULAR TREE WITH 64 BITS REALS: double  */
 	fpu.regs[8].l.lower=mem_readd(addr);
 	fpu.regs[8].l.upper=mem_readd(addr+4);
 	EATREE(rm);
@@ -478,16 +479,16 @@ void FPU_ESC4_Normal(Bitu rm) {
 		FPU_FCOM(TOP,ST(sub));
 		FPU_FPOP();
 		break;
-	case 0x04:  /* FSUBRP STi,ST*/
+	case 0x04:  /* FSUBR STi,ST*/
 		FPU_FSUBR(ST(sub),TOP);
 		break;
-	case 0x05:  /* FSUBP  STi,ST*/
+	case 0x05:  /* FSUB  STi,ST*/
 		FPU_FSUB(ST(sub),TOP);
 		break;
-	case 0x06:	/* FDIVRP STi,ST*/
+	case 0x06:  /* FDIVR STi,ST*/
 		FPU_FDIVR(ST(sub),TOP);
 		break;
-	case 0x07:  /* FDIVP STi,ST*/
+	case 0x07:  /* FDIV STi,ST*/
 		FPU_FDIV(ST(sub),TOP);
 		break;
 	default:
diff --git a/src/fpu/fpu_instructions.h b/src/fpu/fpu_instructions.h
index bdd9bcf9..23671e13 100644
--- a/src/fpu/fpu_instructions.h
+++ b/src/fpu/fpu_instructions.h
@@ -16,7 +16,7 @@
  *  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  */
 
-/* $Id: fpu_instructions.h,v 1.13 2003-10-07 10:42:01 qbix79 Exp $ */
+/* $Id: fpu_instructions.h,v 1.14 2003-10-19 19:21:12 qbix79 Exp $ */
 
 
 static void FPU_FINIT(void) {
@@ -199,10 +199,11 @@ static double FROUND(double in){
 static void FPU_FPREM(void){
 	Real64 valtop = fpu.regs[TOP].d;
 	Real64 valdiv = fpu.regs[ST(1)].d;
-	Real64 res = floor(valtop/valdiv);
-	Bit64s ressaved = static_cast<Bit64s>(res);
-	res=valtop - res*valdiv;
-	fpu.regs[TOP].d = res;
+	Bit64s ressaved = static_cast<Bit64s>( (valtop/valdiv) );
+// Some backups
+//	Real64 res=valtop - ressaved*valdiv; 
+//      res= fmod(valtop,valdiv);
+	fpu.regs[TOP].d = valtop - ressaved*valdiv;
 	FPU_SET_C0(static_cast<Bitu>(ressaved&4));
 	FPU_SET_C3(static_cast<Bitu>(ressaved&2));
 	FPU_SET_C1(static_cast<Bitu>(ressaved&1));
@@ -309,13 +310,13 @@ static void FPU_F2XM1(void){
 	return;
 }
 
-static void	FPU_FYL2X(void){
+static void FPU_FYL2X(void){
 	fpu.regs[ST(1)].d*=log(fpu.regs[TOP].d)/log(static_cast<Real64>(2.0));
 	FPU_FPOP();
 	return;
 }
 static void FPU_FSCALE(void){
-	fpu.regs[TOP].d *=pow(2.0,static_cast<Real64>(static_cast<Bit64s>(FROUND(fpu.regs[ST(1)].d))));
+	fpu.regs[TOP].d *= pow(2.0,static_cast<Real64>(static_cast<Bit64s>(fpu.regs[ST(1)].d)));
 	return; //2^x where x is chopped.
 }