Fix bugs in setting channel modes and added callback for detection of masking/unmasking of dma channel.
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@681
This commit is contained in:
Sjoerd van der Berg
parent
a92071747e
commit
7f0dfa4da3
1 changed files with 79 additions and 35 deletions
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@ -21,10 +21,8 @@
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*/
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/*
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Still need to implement reads from dma ports :)
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Perhaps sometime also implement dma writes.
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DMA transfer that get setup with a size 0 are also done wrong should be 0x10000 probably.
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TODO
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Implement 16-bit dma
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*/
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#include <string.h>
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@ -32,6 +30,7 @@
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#include "mem.h"
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#include "inout.h"
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#include "dma.h"
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#include "pic.h"
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#if DEBUG_DMA
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#define DMA_DEBUG LOG_DEBUG
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@ -47,8 +46,8 @@
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struct DMA_CHANNEL {
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struct {
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Bit8u mode_type;
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Bit8u address_decrement;
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Bit8u autoinit_enable;
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bool address_decrement;
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bool autoinit_enable;
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Bit8u transfer_type;
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} mode;
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Bit16u base_address;
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@ -59,6 +58,7 @@ struct DMA_CHANNEL {
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bool masked;
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PhysPt address;
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bool addr_changed;
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DMA_EnableCallBack enable_callback;
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};
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@ -107,9 +107,10 @@ static Bit8u read_dma(Bit32u port) {
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static void write_dma(Bit32u port,Bit8u val) {
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/* only use first dma for now */
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DMA_CONTROLLER * cont=&dma[0];
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DMA_CHANNEL * chan=&cont->chan[port>>1];
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DMA_CHANNEL * chan;
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switch (port) {
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case 0x00:case 0x02:case 0x04:case 0x06:
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chan=&cont->chan[port>>1];
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if (cont->flipflop) {
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chan->base_address=(chan->base_address & 0xff00) | val;
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} else {
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@ -119,6 +120,7 @@ static void write_dma(Bit32u port,Bit8u val) {
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chan->addr_changed=true;
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break;
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case 0x01:case 0x03:case 0x05:case 0x07:
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chan=&cont->chan[port>>1];
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if (cont->flipflop) {
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chan->base_count=(chan->base_count & 0xff00) | val;
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} else {
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@ -142,12 +144,15 @@ static void write_dma(Bit32u port,Bit8u val) {
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}
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break;
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case 0x0a: /* single mask bit register */
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chan=&cont->chan[val & 0x3];
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chan->masked=(val & 4)>0;
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if (chan->enable_callback) chan->enable_callback(!chan->masked);
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break;
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case 0x0b: /* mode register */
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chan=&cont->chan[val & 0x3];
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chan->mode.mode_type = (val >> 6) & 0x03;
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chan->mode.address_decrement = (val >> 5) & 0x01;
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chan->mode.autoinit_enable = (val >> 4) & 0x01;
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chan->mode.address_decrement = (val & 0x20) > 0;
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chan->mode.autoinit_enable = (val & 0x10) > 0;
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chan->mode.transfer_type = (val >> 2) & 0x03;
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if (chan->mode.address_decrement) {
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LOG_WARN("DMA:Address Decrease not supported yet");
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@ -177,21 +182,20 @@ void write_dma_page(Bit32u port,Bit8u val) {
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dma[0].chan[channel].addr_changed=true;
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}
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Bit16u DMA_8_Read(Bit32u dmachan,Bit8u * buffer,Bit16u count) {
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INLINE void ResetDMA8(DMA_CHANNEL * chan) {
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chan->addr_changed=false;
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chan->address=(chan->page << 16)+chan->base_address;
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chan->current_count=chan->base_count+1;
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chan->current_address=chan->base_address;
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}
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Bitu DMA_8_Read(Bitu dmachan,Bit8u * buffer,Bitu count) {
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DMA_CHANNEL * chan=&dma[0].chan[dmachan];
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if (chan->masked) return 0;
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if (!count) return 0;
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/* DMA always does autoinit should work under normal situations */
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if (chan->addr_changed) {
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/* Calculate the new starting position for dma read*/
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chan->addr_changed=false;
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chan->address=(chan->page << 16)+chan->base_address;
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chan->current_count=chan->base_count+1;
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chan->current_address=chan->base_address;
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DMA_DEBUG("DMA:Transfer from %d size %d",(chan->page << 16)+chan->base_address,chan->current_count);
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}
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if (chan->masked || !count) return 0;
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if (chan->addr_changed) ResetDMA8(chan);
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if (chan->current_count>count) {
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MEM_BlockRead(chan->address,buffer,count);
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chan->address+=count;
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@ -204,17 +208,15 @@ Bit16u DMA_8_Read(Bit32u dmachan,Bit8u * buffer,Bit16u count) {
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if (!chan->mode.autoinit_enable) {
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/* Set the end of counter bit */
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dma[0].status_reg|=(1 << dmachan);
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count=(Bit16u)chan->current_count;
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count=chan->current_count;
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chan->current_address+=count;;
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chan->current_count=0;
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return count;
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} else {
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buffer+=chan->current_count;
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Bit16u left=count-(Bit16u)chan->current_count;
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Bitu left=count-(Bit16u)chan->current_count;
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/* Autoinit reset the dma channel */
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chan->address=(chan->page << 16)+chan->base_address;
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chan->current_count=chan->base_count+1;
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chan->current_address=chan->base_address;
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ResetDMA8(chan);
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/* Copy the rest of the buffer */
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MEM_BlockRead(chan->address,buffer,left);
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chan->address+=left;
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@ -223,22 +225,52 @@ Bit16u DMA_8_Read(Bit32u dmachan,Bit8u * buffer,Bit16u count) {
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return count;
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}
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}
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};
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}
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Bit16u DMA_8_Write(Bit32u dmachan,Bit8u * buffer,Bit16u count) {
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return 0;
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};
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Bitu DMA_8_Write(Bitu dmachan,Bit8u * buffer,Bitu count) {
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DMA_CHANNEL * chan=&dma[0].chan[dmachan];
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if (chan->masked || !count) return 0;
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if (chan->addr_changed) ResetDMA8(chan);
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if (chan->current_count>count) {
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MEM_BlockWrite(chan->address,buffer,count);
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chan->address+=count;
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chan->current_address+=count;
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chan->current_count-=count;
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return count;
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} else {
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/* Copy remaining piece of first buffer */
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MEM_BlockWrite(chan->address,buffer,chan->current_count);
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if (!chan->mode.autoinit_enable) {
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/* Set the end of counter bit */
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dma[0].status_reg|=(1 << dmachan);
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count=chan->current_count;
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chan->current_address+=count;;
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chan->current_count=0;
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return count;
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} else {
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buffer+=chan->current_count;
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Bitu left=count-(Bit16u)chan->current_count;
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/* Autoinit reset the dma channel */
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ResetDMA8(chan);
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/* Copy the rest of the buffer */
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MEM_BlockWrite(chan->address,buffer,left);
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chan->address+=left;
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chan->current_address+=left;
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chan->current_count-=left;
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return count;
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}
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}
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}
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Bit16u DMA_16_Read(Bit32u dmachan,Bit8u * buffer,Bit16u count) {
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Bitu DMA_16_Read(Bitu dmachan,Bit8u * buffer,Bitu count) {
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return 0;
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}
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Bit16u DMA_16_Write(Bit32u dmachan,Bit8u * buffer,Bit16u count) {
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Bitu DMA_16_Write(Bitu dmachan,Bit8u * buffer,Bitu count) {
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return 0;
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@ -247,6 +279,18 @@ Bit16u DMA_16_Write(Bit32u dmachan,Bit8u * buffer,Bit16u count) {
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void DMA_SetEnableCallBack(Bitu channel,DMA_EnableCallBack callback) {
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if (channel<4) {
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dma[0].chan[channel].enable_callback=callback;
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if (callback) callback(!dma[0].chan[channel].masked);
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return;
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}
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if (channel<8) {
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dma[1].chan[channel-4].enable_callback=callback;
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if (callback) callback(!dma[1].chan[channel-4].masked);
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}
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}
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void DMA_Init(Section* sec) {
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for (Bit32u i=0;i<0x10;i++) {
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IO_RegisterWriteHandler(i,write_dma,"DMA1");
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