apply patch: "[ 1256405 ] EGA/VGA data should be rotated only in write mode 0" from vasyl. Fixes overkill
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@2274
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1 changed files with 1 additions and 1 deletions
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@ -61,6 +61,7 @@ INLINE static Bit32u ModeOperation(Bit8u val) {
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switch (vga.config.write_mode) {
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case 0x00:
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// Write Mode 0: In this mode, the host data is first rotated as per the Rotate Count field, then the Enable Set/Reset mechanism selects data from this or the Set/Reset field. Then the selected Logical Operation is performed on the resulting data and the data in the latch register. Then the Bit Mask field is used to select which bits come from the resulting data and which come from the latch register. Finally, only the bit planes enabled by the Memory Plane Write Enable field are written to memory.
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val=((val >> vga.config.data_rotate) | (val << (8-vga.config.data_rotate)));
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full=ExpandTable[val];
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full=(full & vga.config.full_not_enable_set_reset) | vga.config.full_enable_and_set_reset;
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full=RasterOp(full,vga.config.full_bit_mask);
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@ -84,7 +85,6 @@ INLINE static Bit32u ModeOperation(Bit8u val) {
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}
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static void VGA_GFX_16_WriteHandler(PhysPt start,Bit8u val) {
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val=((val >> vga.config.data_rotate) | (val << (8-vga.config.data_rotate)));
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Bit32u data=ModeOperation(val);
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/* Update video memory and the pixel buffer */
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VGA_Latch pixels;
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