Some updates to DMA to allow better handling of masked bit and reaching terminal count.
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@1208
This commit is contained in:
Sjoerd van der Berg
parent
9c53a50c70
commit
942bef0e09
1 changed files with 50 additions and 29 deletions
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@ -32,12 +32,6 @@
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#include "dma.h"
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#include "pic.h"
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#if DEBUG_DMA
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#define DMA_DEBUG LOG_DEBUG
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#else
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#define DMA_DEBUG
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#endif
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#define DMA_MODE_DEMAND 0
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#define DMA_MODE_SINGLE 1
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#define DMA_MODE_BLOCK 2
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@ -71,7 +65,9 @@ struct DMA_CONTROLLER {
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};
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static DMA_CONTROLLER dma[2];
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void DMA_TestChannel(DMA_CHANNEL * chan);
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void DMA_CheckEnabled(DMA_CHANNEL * chan);
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void DMA_SetEnabled(DMA_CHANNEL * chan,bool enabled);
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static Bit8u read_dma(Bit32u port) {
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/* only use first dma for now */
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@ -107,10 +103,10 @@ static Bit8u read_dma(Bit32u port) {
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default:
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LOG(LOG_DMA,LOG_ERROR)("DMA:Unhandled read from %X",port);
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}
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// LOG_MSG("DMA Read port %x result %x",port,ret);
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return ret;
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}
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static void write_dma(Bit32u port,Bit8u val) {
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/* only use first dma for now */
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DMA_CONTROLLER * cont=&dma[0];
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@ -123,7 +119,6 @@ static void write_dma(Bit32u port,Bit8u val) {
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} else {
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chan->base_address=(chan->base_address & 0x00ff) | (val<<8);
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}
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// LOG_MSG("DMA:Address %X",chan->base_address);
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cont->flipflop=!cont->flipflop;
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chan->addr_changed=true;
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break;
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@ -134,10 +129,9 @@ static void write_dma(Bit32u port,Bit8u val) {
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} else {
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chan->base_count=(chan->base_count & 0x00ff) | (val<<8);
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}
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// LOG_MSG("DMA:count %X",chan->base_count);
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cont->flipflop=!cont->flipflop;
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chan->addr_changed=true;
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DMA_TestChannel(chan);
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DMA_CheckEnabled(chan);
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break;
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case 0x08: /* Command Register */
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if (val != 4) LOG(LOG_DMA,LOG_ERROR)("DMA1:Illegal command %2X",val);
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@ -155,8 +149,13 @@ static void write_dma(Bit32u port,Bit8u val) {
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break;
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case 0x0a: /* single mask bit register */
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chan=&cont->chan[val & 0x3];
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chan->masked=(val & 4)>0;
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DMA_TestChannel(chan);
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if ((val & 4)>0) {
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DMA_SetEnabled(chan,false);
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chan->masked=(val & 4)>0; //Set it later
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} else {
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chan->masked=(val & 4)>0;
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DMA_CheckEnabled(chan);
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}
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break;
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case 0x0b: /* mode register */
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chan=&cont->chan[val & 0x3];
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@ -167,7 +166,7 @@ static void write_dma(Bit32u port,Bit8u val) {
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if (chan->mode.address_decrement) {
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LOG(LOG_DMA,LOG_ERROR)("DMA:Address Decrease not supported yet");
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}
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DMA_TestChannel(chan);
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DMA_CheckEnabled(chan);
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break;
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case 0x0c: /* Clear Flip/Flip */
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cont->flipflop=true;
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@ -177,7 +176,6 @@ static void write_dma(Bit32u port,Bit8u val) {
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};
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};
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void write_dma_page(Bit32u port,Bit8u val) {
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Bitu channel;
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switch (port) {
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@ -194,20 +192,33 @@ void write_dma_page(Bit32u port,Bit8u val) {
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dma[0].chan[channel].addr_changed=true;
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}
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Bit8u read_dma_page(Bit32u port) {
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Bitu channel;
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switch (port) {
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case 0x81: /* dma0 page register, channel 2 */
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channel=2;break;
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case 0x82: /* dma0 page register, channel 3 */
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channel=3;break;
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case 0x83: /* dma0 page register, channel 1 */
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channel=1;break;
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case 0x87: /* dma0 page register, channel 0 */
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channel=0;break;
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}
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return dma[0].chan[channel].page;
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}
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INLINE void ResetDMA8(DMA_CHANNEL * chan) {
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chan->addr_changed=false;
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chan->address=(chan->page << 16)+chan->base_address;
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chan->current_count=chan->base_count+1;
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chan->current_address=chan->base_address;
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// LOG_MSG("DMA8:Setup at address %X:%X count %X",chan->page<<12,chan->base_address,chan->current_count);
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LOG(LOG_DMA,LOG_NORMAL)("Setup at address %X:%X count %X",chan->page<<12,chan->base_address,chan->current_count);
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}
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Bitu DMA_8_Read(Bitu dmachan,Bit8u * buffer,Bitu count) {
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DMA_CHANNEL * chan=&dma[0].chan[dmachan];
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if (chan->masked || !count) return 0;
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if (chan->masked) return 0;
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if (!count) return 0;
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if (chan->addr_changed) ResetDMA8(chan);
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if (chan->current_count>count) {
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MEM_BlockRead(chan->address,buffer,count);
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@ -222,10 +233,10 @@ Bitu DMA_8_Read(Bitu dmachan,Bit8u * buffer,Bitu count) {
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/* Set the end of counter bit */
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dma[0].status_reg|=(1 << dmachan);
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count=chan->current_count;
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chan->current_address+=count;;
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chan->address+=count;
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chan->current_count=0;
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if (chan->enable_callback) chan->enable_callback(false);
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chan->enabled=false;
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LOG(LOG_DMA,LOG_NORMAL)("8-bit Channel %d reached terminal count");
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return count;
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} else {
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buffer+=chan->current_count;
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@ -244,7 +255,8 @@ Bitu DMA_8_Read(Bitu dmachan,Bit8u * buffer,Bitu count) {
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Bitu DMA_8_Write(Bitu dmachan,Bit8u * buffer,Bitu count) {
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DMA_CHANNEL * chan=&dma[0].chan[dmachan];
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if (chan->masked || !count) return 0;
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if (chan->masked) return 0;
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if (!count) return 0;
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if (chan->addr_changed) ResetDMA8(chan);
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if (chan->current_count>count) {
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MEM_BlockWrite(chan->address,buffer,count);
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@ -261,6 +273,7 @@ Bitu DMA_8_Write(Bitu dmachan,Bit8u * buffer,Bitu count) {
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count=chan->current_count;
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chan->current_address+=count;;
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chan->current_count=0;
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chan->enabled=false;
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return count;
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} else {
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buffer+=chan->current_count;
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@ -289,8 +302,13 @@ Bitu DMA_16_Write(Bitu dmachan,Bit8u * buffer,Bitu count) {
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return 0;
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}
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void DMA_TestChannel(DMA_CHANNEL * chan) {
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if (!chan->enable_callback) return;
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void DMA_SetEnabled(DMA_CHANNEL * chan,bool enabled) {
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if (chan->enabled == enabled) return;
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chan->enabled=enabled;
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if (chan->enable_callback) (*chan->enable_callback)(enabled);
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}
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void DMA_CheckEnabled(DMA_CHANNEL * chan) {
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bool enabled;
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if (chan->masked) enabled=false;
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else {
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@ -298,10 +316,7 @@ void DMA_TestChannel(DMA_CHANNEL * chan) {
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else if (chan->current_count || chan->addr_changed) enabled=true;
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else enabled=false;
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}
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if (enabled == chan->enabled) return;
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chan->enabled=enabled;
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chan->enable_callback(enabled);
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DMA_SetEnabled(chan,enabled);
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}
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@ -314,7 +329,7 @@ void DMA_SetEnableCallBack(Bitu channel,DMA_EnableCallBack callback) {
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} else return;
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chan->enabled=false;
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chan->enable_callback=callback;
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DMA_TestChannel(chan);
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DMA_CheckEnabled(chan);
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}
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void DMA_Init(Section* sec) {
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@ -327,4 +342,10 @@ void DMA_Init(Section* sec) {
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IO_RegisterWriteHandler(0x82,write_dma_page,"DMA Pages");
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IO_RegisterWriteHandler(0x83,write_dma_page,"DMA Pages");
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IO_RegisterWriteHandler(0x87,write_dma_page,"DMA Pages");
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IO_RegisterReadHandler(0x81,read_dma_page,"DMA Pages");
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IO_RegisterReadHandler(0x82,read_dma_page,"DMA Pages");
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IO_RegisterReadHandler(0x83,read_dma_page,"DMA Pages");
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IO_RegisterReadHandler(0x87,read_dma_page,"DMA Pages");
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}
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