From acce481653503ed2575b14dcc46ae6ed734a573c Mon Sep 17 00:00:00 2001
From: Peter Veenstra <qbix79@users.sourceforge.net>
Date: Thu, 14 Sep 2006 18:46:48 +0000
Subject: [PATCH] Fix bug 1542808 (BaK doesn't work on AMD 64). Apply patch
 1555327 (A few less warnings) by Guido de Jong.

Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@2699
---
 src/cpu/cpu.cpp        | 5 +++--
 src/cpu/instructions.h | 9 ++++-----
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/cpu/cpu.cpp b/src/cpu/cpu.cpp
index edae46ef..478c929b 100644
--- a/src/cpu/cpu.cpp
+++ b/src/cpu/cpu.cpp
@@ -16,7 +16,7 @@
  *  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  */
 
-/* $Id: cpu.cpp,v 1.83 2006-06-29 09:10:09 c2woody Exp $ */
+/* $Id: cpu.cpp,v 1.84 2006-09-14 18:46:48 qbix79 Exp $ */
 
 #include <assert.h>
 #include "dosbox.h"
@@ -33,7 +33,8 @@ extern void GFX_SetTitle(Bits cycles ,Bits frameskip,bool paused);
 
 #if 1
 #undef LOG
-#define LOG(X,Y)
+#define LOG(X,Y) CPU_LOG
+#define CPU_LOG(...)
 #endif
 
 CPU_Regs cpu_regs;
diff --git a/src/cpu/instructions.h b/src/cpu/instructions.h
index 93a79584..27b276be 100644
--- a/src/cpu/instructions.h
+++ b/src/cpu/instructions.h
@@ -599,7 +599,6 @@
 	{														\
 		Bit16u ax1 = reg_ah * op1;							\
 		Bit16u ax2 = ax1 + reg_al;							\
-		Bit8u old_al = reg_al;								\
 		reg_al = (Bit8u) ax2;								\
 		reg_ah = 0;											\
 		SETFLAGBIT(CF,0);									\
@@ -666,7 +665,7 @@
 {															\
 	Bitu val=load(op1);										\
 	if (val==0)	EXCEPTION(0);								\
-	Bitu num=(reg_dx<<16)|reg_ax;							\
+	Bitu num=((Bit32u)reg_dx<<16)|reg_ax;							\
 	Bitu quo=num/val;										\
 	Bit16u rem=(Bit16u)(num % val);							\
 	Bit16u quo16=(Bit16u)(quo&0xffff);						\
@@ -678,7 +677,7 @@
 #define DIVD(op1,load,save)									\
 {															\
 	Bitu val=load(op1);										\
-	if (!val) EXCEPTION(0);									\
+	if (val==0) EXCEPTION(0);									\
 	Bit64u num=(((Bit64u)reg_edx)<<32)|reg_eax;				\
 	Bit64u quo=num/val;										\
 	Bit32u rem=(Bit32u)(num % val);							\
@@ -705,7 +704,7 @@
 #define IDIVW(op1,load,save)								\
 {															\
 	Bits val=(Bit16s)(load(op1));							\
-	if (!val) EXCEPTION(0);									\
+	if (val==0) EXCEPTION(0);									\
 	Bits num=(Bit32s)((reg_dx<<16)|reg_ax);					\
 	Bits quo=num/val;										\
 	Bit16s rem=(Bit16s)(num % val);							\
@@ -718,7 +717,7 @@
 #define IDIVD(op1,load,save)								\
 {															\
 	Bits val=(Bit32s)(load(op1));							\
-	if (!val) EXCEPTION(0);									\
+	if (val==0) EXCEPTION(0);									\
 	Bit64s num=(((Bit64u)reg_edx)<<32)|reg_eax;				\
 	Bit64s quo=num/val;										\
 	Bit32s rem=(Bit32s)(num % val);							\