Slight change in vga to support the new rendering
Added some hardware acceleration functionality Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@1818
This commit is contained in:
Sjoerd van der Berg
parent
9213fd5bd6
commit
ae2dd7711e
7 changed files with 761 additions and 30 deletions
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@ -7,7 +7,7 @@ noinst_LIBRARIES = libhardware.a
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libhardware_a_SOURCES = adlib.cpp dma.cpp gameblaster.cpp hardware.cpp iohandler.cpp joystick.cpp keyboard.cpp \
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memory.cpp mixer.cpp pcspeaker.cpp pic.cpp sblaster.cpp tandy_sound.cpp timer.cpp \
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vga.cpp vga_attr.cpp vga_crtc.cpp vga_dac.cpp vga_draw.cpp vga_gfx.cpp vga_other.cpp \
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vga_memory.cpp vga_misc.cpp vga_seq.cpp cmos.cpp disney.cpp \
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vga_memory.cpp vga_misc.cpp vga_seq.cpp vga_xga.cpp cmos.cpp disney.cpp \
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gus.cpp mpu401.cpp serialport.cpp softmodem.cpp ipx.cpp ipxserver.cpp
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@ -144,6 +144,7 @@ void VGA_Init(Section* sec) {
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VGA_SetupSEQ();
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VGA_SetupAttr();
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VGA_SetupOther();
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VGA_SetupXGA();
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VGA_SetClock(0,CLK_25);
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VGA_SetClock(1,CLK_28);
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/* Generate tables */
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@ -24,6 +24,13 @@
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#define crtc(blah) vga.crtc.blah
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void VGA_MapMMIO(void);
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void VGA_UnmapMMIO(void);
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void write_p3d5_vga(Bitu port,Bitu val,Bitu iolen);
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Bitu DEBUG_EnableDebugger(void);
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void write_p3d4_vga(Bitu port,Bitu val,Bitu iolen) {
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crtc(index)=val;
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}
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@ -325,6 +332,9 @@ void write_p3d5_vga(Bitu port,Bitu val,Bitu iolen) {
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case 0x39: /* CR39 Register Lock 2 */
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vga.s3.reg_lock2=val;
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break;
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case 0x40: /* CR40 System Config */
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vga.s3.reg_40 = val;
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break;
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case 0x43: /* CR43 Extended Mode */
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vga.s3.reg_43=val & ~0x4;
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if (((val & 0x4) ^ (vga.config.scan_len >> 6)) & 0x4) {
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@ -338,6 +348,43 @@ void write_p3d5_vga(Bitu port,Bitu val,Bitu iolen) {
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(3d4h index 13h). (801/5,928) Only active if 3d4h index 51h bits 4-5
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are 0
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*/
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case 0x45: /* Hardware cursor mode */
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vga.s3.hgc.curmode = val;
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break;
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case 0x46:
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vga.s3.hgc.originx = (vga.s3.hgc.originx & 0x00ff) | (val << 8);
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break;
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case 0x47: /* HGC orgX */
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vga.s3.hgc.originx = (vga.s3.hgc.originx & 0xff00) | val;
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break;
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case 0x48:
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vga.s3.hgc.originy = (vga.s3.hgc.originy & 0x00ff) | (val << 8);
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break;
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case 0x49: /* HGC orgY */
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vga.s3.hgc.originy = (vga.s3.hgc.originy & 0xff00) | val;
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break;
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case 0x4A: /* HGC foreground stack */
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if (vga.s3.hgc.fstackpos > 2) vga.s3.hgc.fstackpos = 0;
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vga.s3.hgc.forestack[vga.s3.hgc.fstackpos] = val;
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vga.s3.hgc.fstackpos++;
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break;
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case 0x4B: /* HGC background stack */
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if (vga.s3.hgc.bstackpos > 2) vga.s3.hgc.bstackpos = 0;
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vga.s3.hgc.backstack[vga.s3.hgc.bstackpos] = val;
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vga.s3.hgc.bstackpos++;
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break;
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case 0x4c: /* HGC start address high byte*/
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vga.s3.hgc.startaddr = vga.s3.hgc.startaddr | ((val & 0xff) << 8);
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break;
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case 0x4d: /* HGC start address low byte*/
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vga.s3.hgc.startaddr = vga.s3.hgc.startaddr | (val & 0xff);
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break;
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case 0x4e: /* HGC pattern start X */
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vga.s3.hgc.posx = val;
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break;
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case 0x4f: /* HGC pattern start X */
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vga.s3.hgc.posy = val;
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break;
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case 0x51: /* Extended System Control 2 */
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vga.s3.reg_51=val & 0xc0; //Only store bits 6,7
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//TODO Display start
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@ -374,6 +421,18 @@ void write_p3d5_vga(Bitu port,Bitu val,Bitu iolen) {
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7 (not 864/964) Enable EPROM Write. If set enables flash memory write
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control to the BIOS ROM address
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*/
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case 0x53:
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if((val & 0x10) != (vga.s3.ext_mem_ctrl & 0x10)) {
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/* Map or unmap MMIO */
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if ((val & 0x10) != 0) {
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LOG_MSG("VGA: Mapping Memory Mapped I/O to 0xA0000");
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VGA_MapMMIO();
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} else {
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VGA_UnmapMMIO();
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}
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}
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vga.s3.ext_mem_ctrl = val;
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break;
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case 0x55: /* Extended Video DAC Control */
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vga.s3.reg_55=val;
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break;
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@ -572,7 +631,7 @@ Bitu read_p3d5_vga(Bitu port,Bitu iolen) {
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return 0x11;
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//Trio 64 id
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case 0x2f: /* Revision */
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return 0x80;
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return 0x00;
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case 0x30: /* CR30 Chip ID/REV register */
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return 0xe0; //Trio+ dual byte
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// Trio32/64 has 0xe0. extended
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@ -582,7 +641,8 @@ Bitu read_p3d5_vga(Bitu port,Bitu iolen) {
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case 0x35: /* CR35 CRT Register Lock */
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return vga.s3.reg_35|(vga.s3.bank & 0xf);
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case 0x36: /* CR36 Reset State Read 1 */
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return 0x8f;
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//return 0x8f;
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return 0x8e; /* PCI version */
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//2 Mb PCI and some bios settings
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case 0x37: /* Reset state read 2 */
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return 0x2b;
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@ -590,17 +650,29 @@ Bitu read_p3d5_vga(Bitu port,Bitu iolen) {
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return vga.s3.reg_lock1;
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case 0x39: /* CR39 Register Lock 2 */
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return vga.s3.reg_lock2;
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case 0x40: /* CR40 system config */
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return vga.s3.reg_40;
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case 0x43: /* CR43 Extended Mode */
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return vga.s3.reg_43|((vga.config.scan_len>>6)&0x4);
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case 0x45: /* Hardware cursor mode */
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vga.s3.hgc.bstackpos = 0;
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vga.s3.hgc.fstackpos = 0;
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return vga.s3.hgc.curmode;
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case 0x51: /* Extended System Control 2 */
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return ((vga.config.display_start >> 16) & 3 ) |
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((vga.s3.bank & 0x30) >> 2) |
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((vga.config.scan_len & 0x300) >> 4) |
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vga.s3.reg_51;
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case 0x53:
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return vga.s3.ext_mem_ctrl;
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case 0x55: /* Extended Video DAC Control */
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return vga.s3.reg_55;
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case 0x58: /* Linear Address Window Control */
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return vga.s3.reg_58;
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case 0x59: /* Linear Address Window Position High */
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return (vga.s3.la_window >> 8);
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case 0x5a: /* Linear Address Window Position Low */
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return (vga.s3.la_window & 0xff);
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case 0x5D: /* Extended Horizontal Overflow */
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return vga.s3.ex_hor_overflow;
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case 0x5e: /* Extended Vertical Overflow */
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@ -29,25 +29,26 @@
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typedef Bit8u * (* VGA_Line_Handler)(Bitu vidstart,Bitu panning,Bitu line);
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static VGA_Line_Handler VGA_DrawLine;
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static Bit8u TempLine[1280];
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static Bit8u * VGA_Draw_1BPP_Line(Bitu vidstart,Bitu panning,Bitu line) {
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line*=8*1024;Bit32u * draw=(Bit32u *)RENDER_TempLine;
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line*=8*1024;Bit32u * draw=(Bit32u *)TempLine;
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for (Bitu x=vga.draw.blocks;x>0;x--) {
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Bitu val=vga.mem.linear[vidstart+line];vidstart=(vidstart+1)&0x1fff;
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*draw++=CGA_2_Table[val >> 4];
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*draw++=CGA_2_Table[val & 0xf];
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}
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return RENDER_TempLine;
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return TempLine;
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}
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static Bit8u * VGA_Draw_2BPP_Line(Bitu vidstart,Bitu panning,Bitu line) {
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line*=8*1024;Bit32u * draw=(Bit32u *)RENDER_TempLine;
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line*=8*1024;Bit32u * draw=(Bit32u *)TempLine;
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for (Bitu x=0;x<vga.draw.blocks;x++) {
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Bitu val=vga.mem.linear[vidstart+line];vidstart=(vidstart+1)&0x1fff;
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*draw++=CGA_4_Table[val];
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}
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return RENDER_TempLine;
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return TempLine;
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}
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static Bit8u convert16[16]={
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@ -57,7 +58,7 @@ static Bit8u convert16[16]={
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static Bit8u * VGA_Draw_4BPP_Line(Bitu vidstart,Bitu panning,Bitu line) {
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Bit8u * reader=&vga.mem.linear[(vga.tandy.disp_bank << 14) + vidstart + (line * 8 * 1024)];
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Bit32u * draw=(Bit32u *)RENDER_TempLine;
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Bit32u * draw=(Bit32u *)TempLine;
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for (Bitu x=0;x<vga.draw.blocks;x++) {
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Bitu val1=*reader++;Bitu val2=*reader++;
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*draw++=(val1 & 0x0f) << 8 |
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@ -65,12 +66,12 @@ static Bit8u * VGA_Draw_4BPP_Line(Bitu vidstart,Bitu panning,Bitu line) {
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(val2 & 0x0f) << 24 |
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(val2 & 0xf0) << 12;
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}
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return RENDER_TempLine;
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return TempLine;
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}
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static Bit8u * VGA_Draw_4BPP_Line_Double(Bitu vidstart,Bitu panning,Bitu line) {
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Bit8u * reader=&vga.mem.linear[(vga.tandy.disp_bank << 14) + vidstart + (line * 8 * 1024)];
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Bit32u * draw=(Bit32u *)RENDER_TempLine;
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Bit32u * draw=(Bit32u *)TempLine;
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for (Bitu x=0;x<vga.draw.blocks;x++) {
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Bitu val1=*reader++;Bitu val2=*reader++;
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*draw++=(val1 & 0x0f) << 8 |
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@ -78,7 +79,7 @@ static Bit8u * VGA_Draw_4BPP_Line_Double(Bitu vidstart,Bitu panning,Bitu line) {
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(val2 & 0x0f) << 24 |
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(val2 & 0xf0) << 12;
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}
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return RENDER_TempLine;
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return TempLine;
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}
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@ -89,10 +90,52 @@ static Bit8u * VGA_Draw_VGA_Line(Bitu vidstart,Bitu panning,Bitu line) {
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return &vga.mem.linear[vidstart*4+panning];
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}
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static Bit8u * VGA_Draw_VGA_Line_HWMouse(Bitu vidstart, Bitu panning, Bitu line) {
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if(vga.s3.hgc.curmode & 0x1) {
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Bitu lineat = vidstart / 160;
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if((lineat < vga.s3.hgc.originy) || (lineat > (vga.s3.hgc.originy + 63))) {
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return VGA_Draw_VGA_Line(vidstart, panning, line);
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} else {
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memcpy(TempLine, VGA_Draw_VGA_Line(vidstart, panning, line), 640);
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/* Draw mouse cursor */
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Bits moff = ((Bits)lineat - (Bits)vga.s3.hgc.originy) + (Bits)vga.s3.hgc.posy;
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if(moff>63) moff=moff-64;
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if(moff<0) moff+=64;
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Bitu xat = vga.s3.hgc.originx;
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Bitu m, mat;
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mat = vga.s3.hgc.posx;
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for(m=0;m<64;m++) {
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switch(vga.s3.hgc.mc[moff][mat]) {
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case 0:
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TempLine[xat] = vga.s3.hgc.backstack[0];
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break;
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case 1:
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TempLine[xat] = vga.s3.hgc.forestack[0];
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break;
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case 2:
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//Transparent
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break;
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case 3:
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break;
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}
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xat++;
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mat++;
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if(mat>63) mat=0;
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}
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return TempLine;
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}
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} else {
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/* HW Mouse not enabled, use the tried and true call */
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return VGA_Draw_VGA_Line(vidstart, panning, line);
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}
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}
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static Bit32u FontMask[2]={0xffffffff,0x0};
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static Bit8u * VGA_TEXT_Draw_Line(Bitu vidstart,Bitu panning,Bitu line) {
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Bit32u * draw=(Bit32u *)RENDER_TempLine;
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Bit32u * draw=(Bit32u *)TempLine;
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Bit8u * vidmem=&vga.mem.linear[vidstart];
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for (Bitu cx=0;cx<vga.draw.blocks;cx++) {
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Bitu chr=vidmem[cx*2];
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@ -111,12 +154,12 @@ static Bit8u * VGA_TEXT_Draw_Line(Bitu vidstart,Bitu panning,Bitu line) {
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if (font_addr>=0 && font_addr<vga.draw.blocks) {
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if (line<vga.draw.cursor.sline) goto skip_cursor;
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if (line>vga.draw.cursor.eline) goto skip_cursor;
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draw=(Bit32u *)&RENDER_TempLine[font_addr*8];
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draw=(Bit32u *)&TempLine[font_addr*8];
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Bit32u att=TXT_FG_Table[vga.mem.linear[vga.config.cursor_start*2+1]&0xf];
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*draw++=att;*draw++=att;
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}
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skip_cursor:
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return RENDER_TempLine;
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return TempLine;
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}
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static void VGA_VerticalDisplayEnd(Bitu val) {
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@ -128,11 +171,11 @@ static void VGA_HorizontalTimer(void) {
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}
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static void VGA_DrawPart(void) {
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static void VGA_DrawPart(Bitu lines) {
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Bitu subline=0;Bitu vidofs=vga.config.real_start;
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Bit8u * draw=0;
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while (vga.draw.lines_left) {
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vga.draw.lines_left--;
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while (lines--) {
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vga.draw.lines_done++;
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Bit8u * data=VGA_DrawLine(vga.draw.address,vga.draw.panning,vga.draw.address_line);
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RENDER_DrawLine(data);
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vga.draw.address_line++;
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@ -140,14 +183,15 @@ static void VGA_DrawPart(void) {
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vga.draw.address_line=0;
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vga.draw.address+=vga.draw.address_add;
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}
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if (vga.draw.split_line==vga.draw.lines_left) {
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if (vga.draw.split_line==vga.draw.lines_done) {
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vga.draw.address=0;vga.draw.panning=0;
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vga.draw.address_line=0;
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}
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}
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RENDER_EndUpdate();
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// vga.draw.parts_left--;
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// if (vga.draw.parts_left) PIC_AddEvent(VGA_DrawPart,vga.draw.micro.parts);
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vga.draw.parts_left--;
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if (vga.draw.parts_left) {
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PIC_AddEvent(VGA_DrawPart,vga.draw.micro.parts,vga.draw.parts_lines);
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} else RENDER_EndUpdate();
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}
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void VGA_SetBlinking(Bitu enabled) {
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@ -169,11 +213,11 @@ static void VGA_VerticalTimer(Bitu val) {
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vga.config.retrace=false;
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PIC_AddEvent(VGA_VerticalTimer,vga.draw.micro.vtotal);
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PIC_AddEvent(VGA_VerticalDisplayEnd,vga.draw.micro.vend);
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vga.draw.parts_left=4;
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vga.draw.lines_left=vga.draw.lines_total;
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vga.draw.parts_left=vga.draw.parts_total;
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vga.draw.lines_done=0;
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vga.draw.address=vga.config.real_start;
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vga.draw.address_line=vga.config.hlines_skip;
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vga.draw.split_line=vga.draw.lines_total-(vga.config.line_compare/vga.draw.lines_scaled);
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vga.draw.split_line=(vga.config.line_compare/vga.draw.lines_scaled);
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vga.draw.panning=vga.config.pel_panning;
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switch (vga.mode) {
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case M_TEXT:
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@ -189,7 +233,7 @@ static void VGA_VerticalTimer(Bitu val) {
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break;
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}
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if (RENDER_StartUpdate()) {
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VGA_DrawPart();
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PIC_AddEvent(VGA_DrawPart,vga.draw.micro.parts,vga.draw.parts_lines);
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}
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}
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@ -310,7 +354,6 @@ void VGA_SetupDrawing(Bitu val) {
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Bitu width,height;
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Bitu scalew=1;
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Bitu scaleh=1;
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width=hdispend;
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height=vdispend;
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vga.draw.double_scan=false;
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@ -329,7 +372,12 @@ void VGA_SetupDrawing(Bitu val) {
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vga.draw.lines_scaled=scaleh;
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vga.draw.address_line_total=1;
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height/=scaleh;width<<=3;
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VGA_DrawLine=VGA_Draw_VGA_Line;
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/* Use HW mouse cursor drawer if enabled */
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if(vga.s3.hgc.curmode & 0x1) {
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VGA_DrawLine=VGA_Draw_VGA_Line_HWMouse;
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} else {
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VGA_DrawLine=VGA_Draw_VGA_Line;
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}
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break;
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case M_EGA16:
|
||||
scaleh*=vga.draw.font_height;
|
||||
|
|
@ -419,6 +467,7 @@ void VGA_SetupDrawing(Bitu val) {
|
|||
};
|
||||
VGA_CheckScanLength();
|
||||
vga.draw.lines_total=height;
|
||||
vga.draw.parts_lines=vga.draw.lines_total/vga.draw.parts_total;
|
||||
if (( width != vga.draw.width) || (height != vga.draw.height)) {
|
||||
PIC_RemoveEvents(VGA_VerticalTimer);
|
||||
PIC_RemoveEvents(VGA_VerticalDisplayEnd);
|
||||
|
|
@ -428,7 +477,7 @@ void VGA_SetupDrawing(Bitu val) {
|
|||
|
||||
LOG(LOG_VGA,LOG_NORMAL)("Width %d, Height %d, fps %f",width,height,fps);
|
||||
LOG(LOG_VGA,LOG_NORMAL)("Scalew %d, Scaleh %d aspect %f",scalew,scaleh,aspect_ratio);
|
||||
RENDER_SetSize(width,height,8,aspect_ratio,scalew,scaleh);
|
||||
RENDER_SetSize(width,height,8,aspect_ratio,scalew>1,scaleh>1);
|
||||
PIC_AddEvent(VGA_VerticalTimer,vga.draw.micro.vtotal);
|
||||
}
|
||||
};
|
||||
|
|
|
|||
|
|
@ -93,7 +93,7 @@ static void write_p3cf(Bitu port,Bitu val,Bitu iolen) {
|
|||
break;
|
||||
case 5: /* Mode Register */
|
||||
if ((gfx(mode) ^ val) & 0xf0) {
|
||||
gfx(mode)=val;
|
||||
gfx(mode)=val;
|
||||
VGA_DetermineMode();
|
||||
} else gfx(mode)=val;
|
||||
vga.config.write_mode=val & 3;
|
||||
|
|
|
|||
|
|
@ -26,6 +26,9 @@
|
|||
#include "vga.h"
|
||||
#include "paging.h"
|
||||
#include "pic.h"
|
||||
#include "inout.h"
|
||||
|
||||
void VGA_MapMMIO(void);
|
||||
|
||||
static Bitu VGA_NormalReadHandler(PhysPt start) {
|
||||
vga.latch.d=vga.mem.latched[start].d;
|
||||
|
|
@ -233,6 +236,7 @@ public:
|
|||
}
|
||||
};
|
||||
|
||||
|
||||
class VGA_MAP_PageHandler : public PageHandler {
|
||||
public:
|
||||
VGA_MAP_PageHandler() {
|
||||
|
|
@ -244,6 +248,66 @@ public:
|
|||
}
|
||||
};
|
||||
|
||||
class VGA_MMIO_PageHandler : public PageHandler {
|
||||
public:
|
||||
Bit16u regmem[16384];
|
||||
|
||||
VGA_MMIO_PageHandler() {
|
||||
flags=PFLAG_NOCODE;
|
||||
//memset(®mem[0], 0, sizeof(regmem));
|
||||
}
|
||||
void writeb(PhysPt addr,Bitu val) {
|
||||
Bitu port = addr & 0xffff;
|
||||
if(port >= 0x82E8) IO_WriteB(port, val);
|
||||
LOG_MSG("MMIO: Write byte to %x with %x", addr, val);
|
||||
}
|
||||
void writew(PhysPt addr,Bitu val) {
|
||||
Bitu port = addr & 0xffff;
|
||||
if(port >= 0x82E8) IO_WriteW(port, val);
|
||||
if(port == 0x8118) IO_WriteW(0x9ae8, val);
|
||||
if(port <= 0x0020) {
|
||||
IO_WriteW(0xe2e8, val);
|
||||
}
|
||||
|
||||
LOG_MSG("MMIO: Write word to %x with %x", addr, val);
|
||||
}
|
||||
void writed(PhysPt addr,Bitu val) {
|
||||
Bitu port = addr & 0xffff;
|
||||
if(port >= 0x82E8) IO_WriteD(port, val);
|
||||
if(port == 0x8100) {
|
||||
IO_WriteW(0x86e8, (val >> 16));
|
||||
IO_WriteW(0x82e8, (val & 0xffff));
|
||||
}
|
||||
if(port == 0x8148) {
|
||||
IO_WriteW(0x96e8, (val >> 16));
|
||||
IO_WriteW(0xbee8, (val & 0xffff));
|
||||
}
|
||||
if(port <= 0x0020) {
|
||||
IO_WriteW(0xe2e8, (val & 0xffff));
|
||||
IO_WriteW(0xe2e8, (val >> 16));
|
||||
}
|
||||
|
||||
LOG_MSG("MMIO: Write dword to %x with %x", addr, val);
|
||||
}
|
||||
|
||||
Bitu readb(PhysPt addr) {
|
||||
LOG_MSG("MMIO: Read byte from %x", addr);
|
||||
|
||||
return 0x00;
|
||||
}
|
||||
Bitu readw(PhysPt addr) {
|
||||
Bitu port = addr & 0xffff;
|
||||
if(port >= 0x82E8) return IO_ReadW(port);
|
||||
LOG_MSG("MMIO: Read word from %x", addr);
|
||||
return 0x00;
|
||||
}
|
||||
Bitu readd(PhysPt addr) {
|
||||
LOG_MSG("MMIO: Read dword from %x", addr);
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
};
|
||||
|
||||
class VGA_TANDY_PageHandler : public PageHandler {
|
||||
public:
|
||||
VGA_TANDY_PageHandler() {
|
||||
|
|
@ -262,13 +326,14 @@ public:
|
|||
};
|
||||
|
||||
|
||||
static struct {
|
||||
static struct vg {
|
||||
VGA_RAM_PageHandler hram;
|
||||
VGA_MAP_PageHandler hmap;
|
||||
VGA_TEXT_PageHandler htext;
|
||||
VGA_TANDY_PageHandler htandy;
|
||||
VGA_256_PageHandler h256;
|
||||
VGA_16_PageHandler h16;
|
||||
VGA_MMIO_PageHandler mmio;
|
||||
} vgaph;
|
||||
|
||||
|
||||
|
|
@ -338,6 +403,9 @@ range_b800:
|
|||
MEM_SetPageHandler(VGA_PAGE_B0,8,&vgaph.hram);
|
||||
break;
|
||||
}
|
||||
|
||||
if(((vga.s3.ext_mem_ctrl & 0x10) != 0x00) && (vga.mode == M_LIN8)) MEM_SetPageHandler(VGA_PAGE_A0, 16, &vgaph.mmio);
|
||||
|
||||
PAGING_ClearTLB();
|
||||
}
|
||||
|
||||
|
|
@ -346,6 +414,7 @@ bool lfb_update;
|
|||
static void VGA_DoUpdateLFB(Bitu val) {
|
||||
lfb_update=false;
|
||||
MEM_SetLFB(vga.s3.la_window << 4 ,sizeof(vga.mem.linear)/4096,&vga.mem.linear[0]);
|
||||
LOG_MSG("LIN: Reconfiguing linear page address");
|
||||
}
|
||||
|
||||
void VGA_StartUpdateLFB(void) {
|
||||
|
|
@ -355,6 +424,16 @@ void VGA_StartUpdateLFB(void) {
|
|||
}
|
||||
}
|
||||
|
||||
void VGA_MapMMIO(void) {
|
||||
MEM_SetPageHandler(VGA_PAGE_A0, 16, &vgaph.mmio);
|
||||
|
||||
}
|
||||
|
||||
void VGA_UnmapMMIO(void) {
|
||||
//MEM_SetPageHandler(VGA_PAGE_A0, &ram_page_handler);
|
||||
}
|
||||
|
||||
|
||||
void VGA_SetupMemory() {
|
||||
memset((void *)&vga.mem,0,512*1024*4);
|
||||
}
|
||||
|
|
|
|||
530
src/hardware/vga_xga.cpp
Normal file
530
src/hardware/vga_xga.cpp
Normal file
|
|
@ -0,0 +1,530 @@
|
|||
/*
|
||||
* Copyright (C) 2002-2004 The DOSBox Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU Library General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
#include <string.h>
|
||||
#include "dosbox.h"
|
||||
#include "inout.h"
|
||||
#include "vga.h"
|
||||
#include <stdio.h>
|
||||
|
||||
struct XGAStatus {
|
||||
struct scissorreg {
|
||||
Bit16u x1, y1, x2, y2;
|
||||
} scissors;
|
||||
|
||||
Bit32u readmask;
|
||||
Bit32u writemask;
|
||||
|
||||
Bit32u forecolor;
|
||||
Bit32u backcolor;
|
||||
|
||||
Bit16u foremix;
|
||||
|
||||
Bit16u curx, cury;
|
||||
Bit16u destx, desty;
|
||||
|
||||
Bit16u MIPcount;
|
||||
Bit16u MAPcount;
|
||||
|
||||
Bit16u pix_cntl;
|
||||
Bit16u read_sel;
|
||||
|
||||
struct XGA_WaitCmd {
|
||||
bool wait;
|
||||
Bit16u cmd;
|
||||
Bit16u curx, cury;
|
||||
Bit16u x1, y1, x2, y2;
|
||||
} waitcmd;
|
||||
|
||||
} xga;
|
||||
|
||||
Bit8u tmpvram[2048 * 1024];
|
||||
|
||||
void XGA_Write_Multifunc(Bitu val, Bitu len) {
|
||||
Bitu regselect = val >> 12;
|
||||
Bitu dataval = val & 0xfff;
|
||||
switch(regselect) {
|
||||
case 0:
|
||||
xga.MIPcount = dataval;
|
||||
break;
|
||||
case 1:
|
||||
xga.scissors.y1 = dataval;
|
||||
break;
|
||||
case 2:
|
||||
xga.scissors.x1 = dataval;
|
||||
break;
|
||||
case 3:
|
||||
xga.scissors.y2 = dataval;
|
||||
break;
|
||||
case 4:
|
||||
xga.scissors.x2 = dataval;
|
||||
break;
|
||||
case 0xa:
|
||||
xga.pix_cntl = dataval;
|
||||
break;
|
||||
case 0xf:
|
||||
xga.read_sel = dataval;
|
||||
break;
|
||||
default:
|
||||
LOG_MSG("XGA: Unhandled multifunction command %x", regselect);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void XGA_DrawPoint8(Bitu x, Bitu y, Bit8u c) {
|
||||
Bit32u memaddr = (y * 640) + x;
|
||||
vga.mem.linear[memaddr] = c;
|
||||
|
||||
}
|
||||
|
||||
Bit8u XGA_GetPoint8(Bitu x, Bitu y) {
|
||||
Bit32u memaddr = (y * 640) + x;
|
||||
return vga.mem.linear[memaddr];
|
||||
|
||||
|
||||
}
|
||||
|
||||
void XGA_DrawPoint16(Bitu x, Bitu y, Bit16u c) {
|
||||
Bit16u *memptr;
|
||||
Bit32u memaddr = (y * 640) + x;
|
||||
memptr = (Bit16u *)&vga.mem.linear[memaddr];
|
||||
*memptr = c;
|
||||
}
|
||||
|
||||
void XGA_DrawRectangle(Bitu x1, Bitu y1, Bitu x2, Bitu y2) {
|
||||
Bit32u xat, yat;
|
||||
Bit32u xmass, xmod, xdist;
|
||||
Bit32u *memptr;
|
||||
Bit8u *smallptr;
|
||||
Bit32u c;
|
||||
Bit8u smallc;
|
||||
|
||||
xdist = (x2 -x1);
|
||||
xmass = (xdist) & 0xfffffffb;
|
||||
xmod = (xdist) & 0x3;
|
||||
|
||||
smallc = (xga.forecolor & 0xff);
|
||||
c = (smallc) | ((smallc) << 8) | ((smallc) << 16) | ((smallc) << 24);
|
||||
|
||||
for(yat=y1;yat<=y2;yat++) {
|
||||
Bit32u memaddr = (yat * (Bit32u)640) + x1;
|
||||
smallptr = &vga.mem.linear[memaddr];
|
||||
for(xat=0;xat<xdist;xat++) *smallptr++ = smallc;
|
||||
}
|
||||
/*
|
||||
for(yat=y1;yat<=y2;yat++) {
|
||||
Bit32u memaddr = (yat * (Bit32u)640) + x1;
|
||||
memptr = (Bit32u *)&vga.mem.linear[memaddr];
|
||||
for(xat=0;xat<xmass;xat+=4) *memptr++ = c;
|
||||
if(xmod!=0) {
|
||||
smallptr = (Bit8u *)memptr;
|
||||
for(xat=0;xat<xmod;xat++) *smallptr++ = smallc;
|
||||
}
|
||||
}
|
||||
*/
|
||||
LOG_MSG("XGA: Draw rect (%d, %d)-(%d, %d), %d", x1, y1, x2, y2, xga.forecolor);
|
||||
}
|
||||
|
||||
bool XGA_CheckX(void) {
|
||||
bool newline = false;
|
||||
if(xga.waitcmd.curx > xga.waitcmd.x2) {
|
||||
xga.waitcmd.curx = xga.waitcmd.x1;
|
||||
xga.waitcmd.cury++;
|
||||
newline = true;
|
||||
if(xga.waitcmd.cury > xga.waitcmd.y2) xga.waitcmd.wait = false;
|
||||
}
|
||||
return newline;
|
||||
}
|
||||
|
||||
void XGA_DrawWait(Bitu val, Bitu len) {
|
||||
if(!xga.waitcmd.wait) return;
|
||||
Bitu mixmode = (xga.pix_cntl >> 6) & 0x3;
|
||||
|
||||
switch(xga.waitcmd.cmd) {
|
||||
case 2: /* Rectangle */
|
||||
if(mixmode == 0) { /* FOREMIX always used */
|
||||
switch(len) {
|
||||
case 1:
|
||||
XGA_DrawPoint8(xga.waitcmd.curx++, xga.waitcmd.cury, val);
|
||||
break;
|
||||
case 2:
|
||||
XGA_DrawPoint8(xga.waitcmd.curx++, xga.waitcmd.cury, (val & 0xff));
|
||||
XGA_CheckX();
|
||||
XGA_DrawPoint8(xga.waitcmd.curx++, xga.waitcmd.cury, (val >> 8));
|
||||
break;
|
||||
case 4:
|
||||
XGA_DrawPoint8(xga.waitcmd.curx++, xga.waitcmd.cury, (val & 0xff));
|
||||
XGA_CheckX();
|
||||
XGA_DrawPoint8(xga.waitcmd.curx++, xga.waitcmd.cury, ((val >> 8) & 0xff));
|
||||
XGA_CheckX();
|
||||
XGA_DrawPoint8(xga.waitcmd.curx++, xga.waitcmd.cury, ((val >> 16) & 0xff));
|
||||
XGA_CheckX();
|
||||
XGA_DrawPoint8(xga.waitcmd.curx++, xga.waitcmd.cury, ((val >> 24) & 0xff));
|
||||
break;
|
||||
}
|
||||
XGA_CheckX();
|
||||
}
|
||||
if(mixmode == 2) { /* Data from PIX_TRANS selects the mix */
|
||||
Bitu bitcount;
|
||||
int i;
|
||||
switch(len) {
|
||||
case 1:
|
||||
bitcount = 8;
|
||||
break;
|
||||
case 2:
|
||||
bitcount = 16;
|
||||
val = ((val & 0xff) << 8) | ((val >> 8) & 0xff);
|
||||
break;
|
||||
case 4:
|
||||
bitcount = 32;
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
Bits bitneed = ((Bits)xga.waitcmd.x2 - (Bits)xga.waitcmd.x1) + 1;
|
||||
xga.waitcmd.curx = xga.waitcmd.x1;
|
||||
i = 15;
|
||||
for(;bitneed>=0;--bitneed) {
|
||||
Bitu bitval = (val >> i) & 0x1;
|
||||
//XGA_DrawPoint8(xga.waitcmd.curx, xga.waitcmd.cury, i);
|
||||
if(bitval != 0) XGA_DrawPoint8(xga.waitcmd.curx, xga.waitcmd.cury, xga.forecolor);
|
||||
--i;
|
||||
xga.waitcmd.curx++;
|
||||
}
|
||||
xga.waitcmd.cury++;
|
||||
|
||||
|
||||
if(xga.waitcmd.cury > xga.waitcmd.y2) xga.waitcmd.wait = false;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
LOG_MSG("XGA: Unhandled draw command %x", xga.waitcmd.cmd);
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void XGA_BlitRect(Bitu val) {
|
||||
Bit32u xat, yat;
|
||||
Bit32u xmass, xmod, xdist, memrec;
|
||||
Bit8u *srcptr;
|
||||
Bit8u *destptr;
|
||||
Bit8u *destline;
|
||||
Bit8u *srcline;
|
||||
|
||||
Bit32u c;
|
||||
Bit8u smallc;
|
||||
Bit8u tmpclr;
|
||||
bool incx = false;
|
||||
bool incy = false;
|
||||
|
||||
if((val >> 5) != 0) incx = true;
|
||||
if((val >> 7) != 0) incy = true;
|
||||
|
||||
xdist = xga.MAPcount;
|
||||
|
||||
smallc = (xga.forecolor & 0xff);
|
||||
memrec = 0;
|
||||
Bit32u srcaddr = (xga.cury * (Bit32u)640) + xga.curx;
|
||||
Bit32u destaddr = (xga.desty * (Bit32u)640) + xga.destx;
|
||||
|
||||
srcptr = &vga.mem.linear[srcaddr];
|
||||
destptr = &vga.mem.linear[destaddr];
|
||||
|
||||
/* Copy source to video ram */
|
||||
for(yat=0;yat<=xga.MIPcount ;yat++) {
|
||||
srcline = srcptr;
|
||||
destline = destptr;
|
||||
for(xat=0;xat<xga.MAPcount;xat++) {
|
||||
*destline = *srcline;
|
||||
//LOG_MSG("Copy (%d, %d) to (%d, %d)", sx, sy, tx, ty);
|
||||
if(incx) {
|
||||
destline++;
|
||||
srcline++;
|
||||
} else {
|
||||
--destline;
|
||||
--srcline;
|
||||
}
|
||||
}
|
||||
if(incy) {
|
||||
srcptr+=640;
|
||||
destptr+=640;
|
||||
} else {
|
||||
srcptr-=640;
|
||||
destptr-=640;
|
||||
}
|
||||
}
|
||||
|
||||
LOG_MSG("XGA: Blit (%d, %d)-(%d, %d) to (%d, %d)-(%d, %d), incx %d, incy %d", xga.curx, xga.cury, xga.curx + xdist, xga.cury + xga.MIPcount, xga.destx, xga.desty, xga.destx + xdist, xga.desty + xga.MIPcount, incx, incy);
|
||||
|
||||
}
|
||||
|
||||
void XGA_DrawPattern(void) {
|
||||
Bit32u xat, yat, y1, y2, sx, sy, addx, addy;
|
||||
Bit32u xmass, xmod, xdist;
|
||||
Bit32u *memptr;
|
||||
Bit8u *smallptr;
|
||||
Bit8u smallc;
|
||||
|
||||
y1 = xga.desty;
|
||||
y2 = xga.desty + xga.MIPcount;
|
||||
xdist = xga.MAPcount;
|
||||
sx = xga.curx;
|
||||
sy = xga.cury;
|
||||
addx = 0;
|
||||
addy = 0;
|
||||
|
||||
for(yat=y1;yat<=y2;yat++) {
|
||||
Bit32u memaddr = (yat * (Bit32u)640) + xga.destx;
|
||||
smallptr = &vga.mem.linear[memaddr];
|
||||
for(xat=0;xat<xdist;xat++) {
|
||||
*smallptr++ = XGA_GetPoint8(sx + addx, sy + addy);
|
||||
addx++;
|
||||
if(addx>7) addx=0;
|
||||
}
|
||||
addy++;
|
||||
if(addy>7) addy=0;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void XGA_DrawCmd(Bitu val, Bitu len) {
|
||||
Bit16u cmd;
|
||||
cmd = val >> 13;
|
||||
LOG_MSG("XGA: Draw command %x", cmd);
|
||||
switch(cmd) {
|
||||
case 2: /* Rectangle fill */
|
||||
if((val & 0x100) == 0) {
|
||||
xga.waitcmd.wait = false;
|
||||
XGA_DrawRectangle(xga.curx, xga.cury, xga.curx + xga.MAPcount, xga.cury + xga.MIPcount);
|
||||
} else {
|
||||
xga.waitcmd.wait = true;
|
||||
xga.waitcmd.curx = xga.curx;
|
||||
xga.waitcmd.cury = xga.cury;
|
||||
xga.waitcmd.x1 = xga.curx;
|
||||
xga.waitcmd.y1 = xga.cury;
|
||||
xga.waitcmd.x2 = xga.curx + xga.MAPcount;
|
||||
xga.waitcmd.y2 = xga.cury + xga.MIPcount;
|
||||
xga.waitcmd.cmd = 2;
|
||||
LOG_MSG("XGA: Draw wait rect (%d, %d)-(%d, %d)", xga.waitcmd.x1, xga.waitcmd.y1, xga.waitcmd.x2, xga.waitcmd.y2);
|
||||
}
|
||||
break;
|
||||
case 6: /* BitBLT */
|
||||
XGA_BlitRect(val);
|
||||
break;
|
||||
case 7: /* Pattern fill */
|
||||
XGA_DrawPattern();
|
||||
LOG_MSG("XGA: Pattern fill (%d, %d)-(%d, %d) to (%d, %d)-(%d, %d)", xga.curx, xga.cury, xga.curx + 8, xga.cury + 8, xga.destx, xga.desty, xga.destx + xga.MAPcount, xga.desty + xga.MIPcount);
|
||||
break;
|
||||
default:
|
||||
LOG_MSG("XGA: Unhandled draw command %x", cmd);
|
||||
break;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
void XGA_Write(Bitu port, Bitu val, Bitu len) {
|
||||
switch(port) {
|
||||
case 0x96e8:
|
||||
xga.MAPcount = val;
|
||||
break;
|
||||
case 0x9ae8:
|
||||
XGA_DrawCmd(val, len);
|
||||
break;
|
||||
case 0xa2e8:
|
||||
xga.backcolor = val;
|
||||
break;
|
||||
case 0xa6e8:
|
||||
xga.forecolor = val;
|
||||
break;
|
||||
case 0xaae8:
|
||||
xga.writemask = val;
|
||||
break;
|
||||
case 0xaee8:
|
||||
xga.readmask = val;
|
||||
break;
|
||||
case 0x82e8:
|
||||
xga.cury = val;
|
||||
break;
|
||||
case 0x86e8:
|
||||
xga.curx = val;
|
||||
break;
|
||||
case 0x8ae8:
|
||||
xga.desty = val;
|
||||
break;
|
||||
case 0x8ee8:
|
||||
xga.destx = val;
|
||||
break;
|
||||
case 0xbae8:
|
||||
xga.foremix = val;
|
||||
break;
|
||||
case 0xbee8:
|
||||
XGA_Write_Multifunc(val, len);
|
||||
break;
|
||||
case 0xe2e8:
|
||||
XGA_DrawWait(val, len);
|
||||
break;
|
||||
default:
|
||||
LOG_MSG("XGA: Wrote to port %x with %x, len %x", port, val, len);
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
Bitu XGA_Read(Bitu port, Bitu len) {
|
||||
LOG_MSG("XGA: Read from port %x, len %x", port, len);
|
||||
switch(port) {
|
||||
case 0x9ae8:
|
||||
return 0x0;
|
||||
case 0x9ae9:
|
||||
if(xga.waitcmd.wait) {
|
||||
return 0x4;
|
||||
} else {
|
||||
return 0x0;
|
||||
}
|
||||
case 0xa2e8:
|
||||
return xga.backcolor;
|
||||
default:
|
||||
LOG_MSG("XGA: Read from port %x, len %x", port, len);
|
||||
return 0x0;
|
||||
}
|
||||
}
|
||||
|
||||
void XGA_UpdateHWC(void) {
|
||||
Bitu mouseaddr = (Bit32u)vga.s3.hgc.startaddr * (Bit32u)1024;
|
||||
Bits x, y, t, m, xat, r, z;
|
||||
x = vga.s3.hgc.originx;
|
||||
y = vga.s3.hgc.originy;
|
||||
Bit16u bitsA, bitsB;
|
||||
Bit16u ab, bb;
|
||||
|
||||
/* Read mouse cursor */
|
||||
for(t=0;t<64;t++) {
|
||||
xat = 0;
|
||||
for(m=0;m<4;m++) {
|
||||
bitsA = *(Bit16u *)&vga.mem.linear[mouseaddr];
|
||||
mouseaddr+=2;
|
||||
bitsB = *(Bit16u *)&vga.mem.linear[mouseaddr];
|
||||
mouseaddr+=2;
|
||||
z = 7;
|
||||
for(r=15;r>=0;--r) {
|
||||
vga.s3.hgc.mc[t][xat] = (((bitsA >> z) & 0x1) << 1) | ((bitsB >> z) & 0x1);
|
||||
xat++;
|
||||
--z;
|
||||
if(z<0) z=15;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void VGA_SetupXGA(void) {
|
||||
if (machine!=MCH_VGA) return;
|
||||
|
||||
memset(&xga, 0, sizeof(XGAStatus));
|
||||
|
||||
IO_RegisterWriteHandler(0x42e8,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0x42e8,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
|
||||
IO_RegisterWriteHandler(0x46e8,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterWriteHandler(0x4ae8,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
|
||||
IO_RegisterWriteHandler(0x82e8,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0x82e8,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterWriteHandler(0x82e9,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0x82e9,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
|
||||
IO_RegisterWriteHandler(0x86e8,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0x86e8,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterWriteHandler(0x86e9,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0x86e9,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
|
||||
IO_RegisterWriteHandler(0x8ae8,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0x8ae8,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
|
||||
IO_RegisterWriteHandler(0x8ee8,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0x8ee8,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterWriteHandler(0x8ee9,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0x8ee9,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
|
||||
IO_RegisterWriteHandler(0x92e8,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0x92e8,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterWriteHandler(0x92e9,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0x92e9,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
|
||||
IO_RegisterWriteHandler(0x96e8,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0x96e8,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterWriteHandler(0x96e9,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0x96e9,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
|
||||
IO_RegisterWriteHandler(0x9ae8,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0x9ae8,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterWriteHandler(0x9ae9,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0x9ae9,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
|
||||
IO_RegisterWriteHandler(0x9ee8,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0x9ee8,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterWriteHandler(0x9ee9,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0x9ee9,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
|
||||
IO_RegisterWriteHandler(0xa2e8,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0xa2e8,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
|
||||
IO_RegisterWriteHandler(0xa6e8,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0xa6e8,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterWriteHandler(0xa6e9,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0xa6e9,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
|
||||
IO_RegisterWriteHandler(0xaae8,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0xaae8,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterWriteHandler(0xaae9,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0xaae9,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
|
||||
IO_RegisterWriteHandler(0xaee8,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0xaee8,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterWriteHandler(0xaee9,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0xaee9,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
|
||||
IO_RegisterWriteHandler(0xb2e8,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0xb2e8,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterWriteHandler(0xb2e9,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0xb2e9,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
|
||||
IO_RegisterWriteHandler(0xb6e8,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0xb6e8,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
|
||||
IO_RegisterWriteHandler(0xbee8,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0xbee8,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterWriteHandler(0xbee9,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0xbee9,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
|
||||
IO_RegisterWriteHandler(0xbae8,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0xbae8,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterWriteHandler(0xbae9,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0xbae9,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
|
||||
IO_RegisterWriteHandler(0xe2e8,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0xe2e8,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
|
||||
IO_RegisterWriteHandler(0xe2ea,&XGA_Write,IO_MB | IO_MW | IO_MD);
|
||||
IO_RegisterReadHandler(0xe2ea,&XGA_Read,IO_MB | IO_MW | IO_MD);
|
||||
|
||||
|
||||
|
||||
}
|
||||
|
||||
Loading…
Add table
Reference in a new issue