Support for 15/16/32 bpp and highres 4bpp
Added some lowres resolutions to the vesa modes Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@2450
This commit is contained in:
Sjoerd van der Berg
parent
f416052584
commit
b032209b75
5 changed files with 267 additions and 73 deletions
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@ -16,7 +16,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: int10_char.cpp,v 1.42 2005-12-02 13:10:18 c2woody Exp $ */
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/* $Id: int10_char.cpp,v 1.43 2006-01-30 10:07:19 harekiet Exp $ */
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/* Character displaying moving functions */
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@ -235,7 +235,7 @@ void INT10_ScrollWindow(Bit8u rul,Bit8u cul,Bit8u rlr,Bit8u clr,Bit8s nlines,Bit
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CGA4_CopyRow(cul,clr,start,start+nlines,base);break;
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case M_TANDY16:
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TANDY16_CopyRow(cul,clr,start,start+nlines,base);break;
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case M_EGA16:
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case M_EGA:
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EGA16_CopyRow(cul,clr,start,start+nlines,base);break;
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case M_VGA:
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VGA_CopyRow(cul,clr,start,start+nlines,base);break;
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@ -261,7 +261,7 @@ filling:
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CGA4_FillRow(cul,clr,start,base,attr);break;
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case M_TANDY16:
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TANDY16_FillRow(cul,clr,start,base,attr);break;
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case M_EGA16:
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case M_EGA:
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EGA16_FillRow(cul,clr,start,base,attr);break;
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case M_VGA:
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VGA_FillRow(cul,clr,start,base,attr);break;
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@ -483,7 +483,7 @@ void WriteChar(Bit16u col,Bit16u row,Bit8u page,Bit8u chr,Bit8u attr,bool useatt
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attr = 0x1;
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break;
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case M_TANDY16:
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case M_EGA16:
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case M_EGA:
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default:
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attr = 0xf;
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break;
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@ -493,7 +493,7 @@ void WriteChar(Bit16u col,Bit16u row,Bit8u page,Bit8u chr,Bit8u attr,bool useatt
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x=8*col;
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y=cheight*row;Bit8u xor_mask=(CurMode->type == M_VGA) ? 0x0 : 0x80;
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//TODO Check for out of bounds
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if (CurMode->type==M_EGA16) {
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if (CurMode->type==M_EGA) {
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/* enable all planes for EGA modes (Ultima 1 colour bug) */
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/* might be put into INT10_PutPixel but different vga bios
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implementations have different opinions about this */
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@ -98,8 +98,12 @@ void INT10_GetFuncStateInformation(PhysPt save) {
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col_count=2;break;
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case M_CGA4:
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col_count=4;break;
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case M_EGA16:
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if (CurMode->mode==0x11 || CurMode->mode==0x0f) col_count=2; else col_count=16;break;
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case M_EGA:
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if (CurMode->mode==0x11 || CurMode->mode==0x0f)
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col_count=2;
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else
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col_count=16;
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break;
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case M_VGA:
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col_count=256;break;
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default:
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@ -27,6 +27,7 @@
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#define _EGA_HALF_CLOCK 0x0001
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#define _EGA_LINE_DOUBLE 0x0002
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#define _VGA_PIXEL_DOUBLE 0x0004
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#define SEQ_REGS 0x05
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#define GFX_REGS 0x09
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@ -43,24 +44,60 @@ VideoModeBlock ModeList_VGA[]={
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{ 0x006 ,M_CGA2 ,640 ,200 ,80 ,25 ,8 ,8 ,1 ,0xB8000 ,0x4000 ,100 ,449 ,80 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE},
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{ 0x007 ,M_TEXT ,720 ,400 ,80 ,25 ,9 ,16 ,8 ,0xB0000 ,0x1000 ,100 ,449 ,80 ,400 ,0 },
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{ 0x00D ,M_EGA16 ,320 ,200 ,40 ,25 ,8 ,8 ,8 ,0xA0000 ,0x2000 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE },
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{ 0x00E ,M_EGA16 ,640 ,200 ,80 ,25 ,8 ,8 ,4 ,0xA0000 ,0x4000 ,100 ,449 ,80 ,400 ,_EGA_LINE_DOUBLE },
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{ 0x00F ,M_EGA16 ,640 ,350 ,80 ,25 ,8 ,14 ,2 ,0xA0000 ,0x8000 ,100 ,449 ,80 ,350 ,0 },/*was EGA_2*/
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{ 0x010 ,M_EGA16 ,640 ,350 ,80 ,25 ,8 ,14 ,2 ,0xA0000 ,0x8000 ,100 ,449 ,80 ,350 ,0 },
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{ 0x011 ,M_EGA16 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0xA000 ,100 ,525 ,80 ,480 ,0 },/*was EGA_2 */
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{ 0x012 ,M_EGA16 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0xA000 ,100 ,525 ,80 ,480 ,0 },
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{ 0x00D ,M_EGA ,320 ,200 ,40 ,25 ,8 ,8 ,8 ,0xA0000 ,0x2000 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE },
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{ 0x00E ,M_EGA ,640 ,200 ,80 ,25 ,8 ,8 ,4 ,0xA0000 ,0x4000 ,100 ,449 ,80 ,400 ,_EGA_LINE_DOUBLE },
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{ 0x00F ,M_EGA ,640 ,350 ,80 ,25 ,8 ,14 ,2 ,0xA0000 ,0x8000 ,100 ,449 ,80 ,350 ,0 },/*was EGA_2*/
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{ 0x010 ,M_EGA ,640 ,350 ,80 ,25 ,8 ,14 ,2 ,0xA0000 ,0x8000 ,100 ,449 ,80 ,350 ,0 },
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{ 0x011 ,M_EGA ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0xA000 ,100 ,525 ,80 ,480 ,0 },/*was EGA_2 */
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{ 0x012 ,M_EGA ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0xA000 ,100 ,525 ,80 ,480 ,0 },
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{ 0x013 ,M_VGA ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x2000 ,100 ,449 ,80 ,400 ,0 },
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{ 0x054 ,M_TEXT ,1056,688, 132,43, 8, 8, 1 ,0xB8000 ,0x4000, 192, 800, 132,688, 0 },
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{ 0x055 ,M_TEXT ,1056,400, 132,25, 8, 16, 1 ,0xB8000 ,0x2000, 192, 449, 132,400, 0 },
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/* Follow vesa 1.2 for first 0x20 */
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{ 0x100 ,M_LIN8 ,640 ,400 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 ,0 },
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{ 0x101 ,M_LIN8 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 ,0 },
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{ 0x102 ,M_LIN4 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,128 ,663 ,100,600 ,0 },
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{ 0x103 ,M_LIN8 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,128 ,663 ,100,600 ,0 },
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{ 0x104 ,M_LIN4 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,150 ,800 ,128,768 ,0 },
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{ 0x105 ,M_LIN8 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,150 ,800 ,128,768 ,0 },
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{ 0x10D ,M_LIN15 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
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{ 0x10E ,M_LIN16 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
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{ 0x10F ,M_LIN32 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
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{ 0x110 ,M_LIN15 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 ,0 },
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{ 0x111 ,M_LIN16 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 ,0 },
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{ 0x112 ,M_LIN32 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 ,0 },
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{ 0x113 ,M_LIN15 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,128 ,663 ,100,600 ,0 },
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{ 0x114 ,M_LIN16 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,128 ,663 ,100,600 ,0 },
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{ 0x115 ,M_LIN32 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,128 ,663 ,100,600 ,0 },
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{ 0x116 ,M_LIN15 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,150 ,800 ,128,768 ,0 },
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{ 0x117 ,M_LIN16 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,150 ,800 ,128,768 ,0 },
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{ 0x118 ,M_LIN32 ,1024,768 ,128,48 ,8 ,16 ,1 ,0xA0000 ,0x10000,150 ,800 ,128,768 ,0 },
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{ 0x150 ,M_LIN8 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
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{ 0x151 ,M_LIN8 ,320 ,240 ,40 ,30 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
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{ 0x152 ,M_LIN8 ,320 ,400 ,40 ,50 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE },
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{ 0x153 ,M_LIN8 ,320 ,480 ,40 ,60 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE },
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{ 0x160 ,M_LIN15 ,320 ,240 ,40 ,30 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
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{ 0x161 ,M_LIN15 ,320 ,400 ,40 ,50 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE },
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{ 0x162 ,M_LIN15 ,320 ,480 ,40 ,60 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE },
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{ 0x165 ,M_LIN15 ,640 ,400 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 ,0 },
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{ 0x170 ,M_LIN16 ,320 ,240 ,40 ,30 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
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{ 0x171 ,M_LIN16 ,320 ,400 ,40 ,50 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE },
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{ 0x172 ,M_LIN16 ,320 ,480 ,40 ,60 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE },
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{ 0x175 ,M_LIN16 ,640 ,400 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 ,0 },
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{ 0x190 ,M_LIN32 ,320 ,240 ,40 ,30 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE | _EGA_LINE_DOUBLE },
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{ 0x191 ,M_LIN32 ,320 ,400 ,40 ,50 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _VGA_PIXEL_DOUBLE },
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{ 0x192 ,M_LIN32 ,320 ,480 ,40 ,60 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _VGA_PIXEL_DOUBLE },
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{ 0x195 ,M_LIN32 ,640 ,400 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 ,0 },
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{ 0x150 ,M_LIN8 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , _EGA_LINE_DOUBLE },
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{ 0x151 ,M_LIN8 ,320 ,240 ,40 ,30 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , _EGA_LINE_DOUBLE },
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{ 0x152 ,M_LIN8 ,320 ,400 ,40 ,50 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , 0 },
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{ 0x153 ,M_LIN8 ,320 ,480 ,40 ,60 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , 0 },
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{0xFFFF ,M_ERROR ,0 ,0 ,0 ,0 ,0 ,0 ,0 ,0x00000 ,0x0000 ,0 ,0 ,0 ,0 ,0 },
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};
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@ -175,7 +212,6 @@ static Bit8u vga_palette[256][3]=
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{0x0b,0x10,0x0b},{0x0b,0x10,0x0c},{0x0b,0x10,0x0d},{0x0b,0x10,0x0f},{0x0b,0x10,0x10},{0x0b,0x0f,0x10},{0x0b,0x0d,0x10},{0x0b,0x0c,0x10},
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{0x00,0x00,0x00},{0x00,0x00,0x00},{0x00,0x00,0x00},{0x00,0x00,0x00},{0x00,0x00,0x00},{0x00,0x00,0x00},{0x00,0x00,0x00},{0x00,0x00,0x00}
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};
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VideoModeBlock * CurMode;
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static bool SetCurMode(VideoModeBlock modeblock[],Bitu mode) {
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@ -210,9 +246,13 @@ static void FinishSetMode(bool clearmem) {
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real_writew(0xb800,i*2,0x0720);
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}
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break;
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case M_EGA16:
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case M_EGA:
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case M_VGA:
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case M_LIN8:
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case M_LIN4:
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case M_LIN15:
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case M_LIN16:
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case M_LIN32:
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/* Hack we just acess the memory directly */
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memset(&vga.mem,0,sizeof(vga.mem));
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}
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@ -318,7 +358,7 @@ bool INT10_SetVideoMode_OTHER(Bitu mode,bool clearmem) {
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//Setup the special registers for each machine type
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Bit8u mode_control_list[0xa+1]={
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0x2c,0x28,0x2d,0x29, //0-3
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0x2a,0x2e,0x1e,0x29, //4-7
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0x2a,0x2e,0x16,0x29, //4-7
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0x2a,0x2b,0x3b //8-a
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};
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Bit8u mode_control_list_pcjr[0xa+1]={
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@ -436,15 +476,19 @@ bool INT10_SetVideoMode(Bitu mode) {
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Bit8u misc_output=0x2 | (mono_mode ? 0x0 : 0x1);
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switch (CurMode->vdispend) {
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case 400: misc_output|=0x60;
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if (CurMode->type==M_TEXT) // && (CurMode->pstart==0xB8000))
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misc_output|=0x4;
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break;
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case 480: misc_output|=0xe0;
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break;
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case 350: misc_output|=0xa0;
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break;
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default: misc_output|=0x60;
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case 400:
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misc_output|=0x60;
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if (CurMode->type==M_TEXT) // && (CurMode->pstart==0xB8000))
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misc_output|=0x4;
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break;
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case 480:
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misc_output|=0xe0;
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break;
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case 350:
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misc_output|=0xa0;
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break;
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default:
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misc_output|=0x60;
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}
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IO_Write(0x3c2,misc_output); //Setup for 3b4 or 3d4
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@ -459,10 +503,17 @@ bool INT10_SetVideoMode(Bitu mode) {
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seq_data[2]|=0x3; //Enable plane 0 and 1
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seq_data[4]|=0x05; //Alpanumeric and odd/even enabled
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break;
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case M_EGA16:
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case M_CGA2:
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seq_data[2]|=0xf; //Enable plane 0
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break;
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case M_LIN4:
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case M_EGA:
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seq_data[2]|=0xf; //Enable all planes for writing
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break;
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case M_LIN8: //Seems to have the same reg layout from testing
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case M_LIN15:
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case M_LIN16:
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case M_LIN32:
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case M_VGA:
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seq_data[2]|=0xf; //Enable all planes for writing
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seq_data[4]|=0xc; //Graphics - odd/even - Chained
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@ -587,6 +638,9 @@ bool INT10_SetVideoMode(Bitu mode) {
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max_scanline|=1; //Vga doesn't use double line but this
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break;
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case M_LIN8:
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case M_LIN15:
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case M_LIN16:
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case M_LIN32:
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underline=0x60; //Seems to enable the every 4th clock on my s3
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break;
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case M_CGA2:
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@ -606,14 +660,30 @@ bool INT10_SetVideoMode(Bitu mode) {
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/* Extended Vertical Overflow */
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IO_Write(crtc_base,0x5e);IO_Write(crtc_base+1,ver_overflow);
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/* Offset Register */
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IO_Write(crtc_base,0x13);
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Bitu offset;
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switch (CurMode->type) {
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case M_LIN8:
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IO_Write(crtc_base+1,CurMode->swidth/8);
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offset = CurMode->swidth/8;
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break;
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case M_LIN15:
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case M_LIN16:
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offset = 2 * CurMode->swidth/8;
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break;
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case M_LIN32:
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offset = 4 * CurMode->swidth/8;
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break;
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default:
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IO_Write(crtc_base+1,CurMode->hdispend/2);
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offset = CurMode->hdispend/2;
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}
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IO_Write(crtc_base,0x13);
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IO_Write(crtc_base + 1,offset & 0xff);
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/* Extended System Control 2 Register */
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/* This register actually has more bits but only use the extended offset ones */
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IO_Write(crtc_base,0x61);
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IO_Write(crtc_base + 1,(offset & 0x300) >> 4);
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/* Extended Vertical Overflow */
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IO_Write(crtc_base,0x5e);IO_Write(crtc_base+1,ver_overflow);
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/* Mode Control */
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Bit8u mode_control=0;
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@ -624,7 +694,8 @@ bool INT10_SetVideoMode(Bitu mode) {
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case M_CGA4:
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mode_control=0xa2;
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break;
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case M_EGA16:
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case M_LIN4:
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case M_EGA:
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if (CurMode->mode==0x11) // 0x11 also sets address wrap. thought maybe all 2 color modes did but 0x0f doesn't.
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mode_control=0xc3; // so.. 0x11 or 0x0f a one off?
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else
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@ -632,10 +703,13 @@ bool INT10_SetVideoMode(Bitu mode) {
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break;
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case M_TEXT:
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case M_VGA:
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mode_control=0xa3;
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break;
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case M_LIN8:
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mode_control=0xab;
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case M_LIN15:
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case M_LIN16:
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case M_LIN32:
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mode_control=0xa3;
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if (CurMode->special & _VGA_PIXEL_DOUBLE)
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mode_control |= 0x08;
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break;
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}
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@ -653,8 +727,18 @@ bool INT10_SetVideoMode(Bitu mode) {
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/* Setup Pixel format */
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switch (CurMode->type) {
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case M_LIN8:
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if (CurMode->swidth < 640) misc_control_2=0x0; //Use single pixel mode,M_VGA then
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else misc_control_2=0x10;
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/* This should be 0x0 according to the specs but makes it easier to detect
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||||
compared to normal vga modes now */
|
||||
misc_control_2=0x10;
|
||||
break;
|
||||
case M_LIN15:
|
||||
misc_control_2=0x30;
|
||||
break;
|
||||
case M_LIN16:
|
||||
misc_control_2=0x50;
|
||||
break;
|
||||
case M_LIN32:
|
||||
misc_control_2=0xd0;
|
||||
break;
|
||||
default:
|
||||
misc_control_2=0x0;
|
||||
|
|
@ -674,15 +758,18 @@ bool INT10_SetVideoMode(Bitu mode) {
|
|||
gfx_data[0x6]|=mono_mode ? 0x0a : 0x0e; //Either b800 or b000
|
||||
break;
|
||||
case M_LIN8:
|
||||
case M_LIN15:
|
||||
case M_LIN16:
|
||||
case M_LIN32:
|
||||
case M_VGA:
|
||||
gfx_data[0x5]|=0x40; //256 color mode
|
||||
gfx_data[0x6]|=0x05; //graphics mode at 0xa000-affff
|
||||
break;
|
||||
case M_EGA16:
|
||||
case M_LIN4:
|
||||
case M_EGA:
|
||||
gfx_data[0x6]|=0x05; //graphics mode at 0xa000-affff
|
||||
break;
|
||||
case M_CGA4:
|
||||
case M_TANDY16:
|
||||
gfx_data[0x5]|=0x20; //CGA mode
|
||||
case M_CGA2:
|
||||
gfx_data[0x6]|=0x0f; //graphics mode at at 0xb800=0xbfff
|
||||
|
|
@ -697,7 +784,8 @@ bool INT10_SetVideoMode(Bitu mode) {
|
|||
att_data[0x12]=0xf; //Always have all color planes enabled
|
||||
/* Program Attribute Controller */
|
||||
switch (CurMode->type) {
|
||||
case M_EGA16:
|
||||
case M_LIN4:
|
||||
case M_EGA:
|
||||
att_data[0x10]=0x01; //Color Graphics
|
||||
switch (CurMode->mode) {
|
||||
case 0x0f:
|
||||
|
|
@ -749,15 +837,17 @@ att_text16:
|
|||
att_data[1]=0x13;
|
||||
att_data[2]=0x15;
|
||||
att_data[3]=0x17;
|
||||
att_data[4]=0x2;
|
||||
att_data[5]=0x4;
|
||||
att_data[6]=0x6;
|
||||
att_data[7]=0x7;
|
||||
for (i=8;i<16;i++) att_data[i]=i+8;
|
||||
att_data[4]=0x02;
|
||||
att_data[5]=0x04;
|
||||
att_data[6]=0x06;
|
||||
att_data[7]=0x07;
|
||||
for (i=0x8;i<0x10;i++)
|
||||
att_data[i] = i + 0x8;
|
||||
real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_PAL,0x30);
|
||||
break;
|
||||
case M_VGA:
|
||||
case M_LIN8:
|
||||
case M_LIN16:
|
||||
for (i=0;i<16;i++) att_data[i]=i;
|
||||
att_data[0x10]=0x41; //Color Graphics 8-bit
|
||||
break;
|
||||
|
|
@ -767,10 +857,11 @@ att_text16:
|
|||
IO_Write(0x3c0,i);
|
||||
IO_Write(0x3c0,att_data[i]);
|
||||
}
|
||||
IO_Write(0x3c0,0x20); //Disable palette access
|
||||
/* Setup the DAC */
|
||||
IO_Write(0x3c8,0);
|
||||
switch (CurMode->type) {
|
||||
case M_EGA16:
|
||||
case M_EGA:
|
||||
if (CurMode->mode>0xf) goto dac_text16;
|
||||
else if (CurMode->mode==0xf) goto dac_mtext16;
|
||||
for (i=0;i<64;i++) {
|
||||
|
|
@ -807,6 +898,7 @@ dac_text16:
|
|||
break;
|
||||
case M_VGA:
|
||||
case M_LIN8:
|
||||
case M_LIN16:
|
||||
for (i=0;i<256;i++) {
|
||||
IO_Write(0x3c9,vga_palette[i][0]);
|
||||
IO_Write(0x3c9,vga_palette[i][1]);
|
||||
|
|
@ -845,11 +937,11 @@ dac_text16:
|
|||
case 3:real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,0x29);break;
|
||||
}
|
||||
break;
|
||||
case M_EGA16:
|
||||
case M_LIN4:
|
||||
case M_EGA:
|
||||
case M_VGA:
|
||||
feature=(feature&~0x30);
|
||||
break;
|
||||
|
||||
}
|
||||
// disabled, has to be set in bios.cpp exclusively
|
||||
// real_writeb(BIOSMEM_SEG,BIOSMEM_INITIAL_MODE,feature);
|
||||
|
|
@ -861,11 +953,24 @@ dac_text16:
|
|||
IO_Write(crtc_base+1,(Bit8u)(S3_LFB_BASE >> 24));
|
||||
IO_Write(crtc_base,0x5a);
|
||||
IO_Write(crtc_base+1,(Bit8u)(S3_LFB_BASE >> 16));
|
||||
|
||||
/* Setup some remaining S3 registers */
|
||||
// IO_Write(crtc_base,0x31);IO_Write(crtc_base+1,0x9); //Enable banked memory and 256k+ access
|
||||
IO_Write(crtc_base,0x31);IO_Write(crtc_base+1,CurMode->mode<=0x13?0x1:0x9); //Enable banked memory and 256k+ access for SVGA modes only
|
||||
Bitu reg_31;
|
||||
switch (CurMode->type) {
|
||||
case M_LIN4:
|
||||
case M_LIN8:
|
||||
case M_LIN15:
|
||||
case M_LIN16:
|
||||
case M_LIN32:
|
||||
reg_31 = 9;
|
||||
break;
|
||||
default:
|
||||
reg_31 = 0;
|
||||
break;
|
||||
}
|
||||
IO_Write(crtc_base,0x31);IO_Write(crtc_base+1,reg_31); //Enable banked memory and 256k+ access
|
||||
IO_Write(crtc_base,0x58);IO_Write(crtc_base+1,0x3); //Enable 8 mb of linear addressing
|
||||
IO_Write(crtc_base,0x58);IO_Write(crtc_base+1,0x3); //Enable 8 mb of linear addressing
|
||||
|
||||
IO_Write(crtc_base,0x38);IO_Write(crtc_base+1,0x48); //Register lock 1
|
||||
IO_Write(crtc_base,0x39);IO_Write(crtc_base+1,0xa5); //Register lock 2
|
||||
|
||||
|
|
|
|||
|
|
@ -90,7 +90,7 @@ void INT10_PutPixel(Bit16u x,Bit16u y,Bit8u page,Bit8u color) {
|
|||
real_writeb(0xb800,off,old);
|
||||
}
|
||||
break;
|
||||
case M_EGA16:
|
||||
case M_EGA:
|
||||
{
|
||||
/* Set the correct bitmask for the pixel position */
|
||||
IO_Write(0x3ce,0x8);Bit8u mask=128>>(x&7);IO_Write(0x3cf,mask);
|
||||
|
|
@ -117,6 +117,11 @@ void INT10_PutPixel(Bit16u x,Bit16u y,Bit8u page,Bit8u color) {
|
|||
case M_VGA:
|
||||
mem_writeb(PhysMake(0xa000,y*320+x),color);
|
||||
break;
|
||||
case M_LIN8: {
|
||||
PhysPt off=S3_LFB_BASE+y*CurMode->swidth+x;
|
||||
mem_writeb(off,color);
|
||||
break;
|
||||
}
|
||||
default:
|
||||
LOG(LOG_INT10,LOG_ERROR)("PutPixel unhandled mode type %d",CurMode->type);
|
||||
break;
|
||||
|
|
@ -141,7 +146,7 @@ void INT10_GetPixel(Bit16u x,Bit16u y,Bit8u page,Bit8u * color) {
|
|||
*color=(val>>(((7-x&7)))) & 1 ;
|
||||
}
|
||||
break;
|
||||
case M_EGA16:
|
||||
case M_EGA:
|
||||
{
|
||||
/* Calculate where the pixel is in video memory */
|
||||
PhysPt off=0xa0000+CurMode->plength*page+((y*CurMode->swidth+x)>>3);
|
||||
|
|
@ -161,6 +166,11 @@ void INT10_GetPixel(Bit16u x,Bit16u y,Bit8u page,Bit8u * color) {
|
|||
case M_VGA:
|
||||
*color=mem_readb(PhysMake(0xa000,320*y+x));
|
||||
break;
|
||||
case M_LIN8: {
|
||||
PhysPt off=S3_LFB_BASE+y*CurMode->swidth+x;
|
||||
*color = mem_readb(off);
|
||||
break;
|
||||
}
|
||||
default:
|
||||
LOG(LOG_INT10,LOG_ERROR)("GetPixel unhandled mode type %d",CurMode->type);
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: int10_vesa.cpp,v 1.18 2005-10-29 09:32:52 qbix79 Exp $ */
|
||||
/* $Id: int10_vesa.cpp,v 1.19 2006-01-30 10:07:19 harekiet Exp $ */
|
||||
|
||||
#include <string.h>
|
||||
#include <stddef.h>
|
||||
|
|
@ -87,7 +87,8 @@ Bit8u VESA_GetSVGAInformation(Bit16u seg,Bit16u off) {
|
|||
PhysPt buffer=PhysMake(seg,off);
|
||||
Bitu i;
|
||||
bool vbe2=false;Bit16u vbe2_pos=256+off;
|
||||
if (mem_readd(buffer)==0x32454256) vbe2=true;
|
||||
Bitu id=mem_readd(buffer);
|
||||
if ((id==0x56424532)||(id==0x32454256)) vbe2=true;
|
||||
if (vbe2) {
|
||||
for (i=0;i<0x200;i++) mem_writeb(buffer+i,0);
|
||||
} else {
|
||||
|
|
@ -119,8 +120,9 @@ Bit8u VESA_GetSVGAModeInformation(Bit16u mode,Bit16u seg,Bit16u off) {
|
|||
MODE_INFO minfo;
|
||||
memset(&minfo,0,sizeof(minfo));
|
||||
PhysPt buf=PhysMake(seg,off);
|
||||
|
||||
Bitu pageSize;
|
||||
Bitu i=0;
|
||||
|
||||
if (mode<0x100) return 0x01;
|
||||
while (ModeList_VGA[i].mode!=0xffff) {
|
||||
if (mode==ModeList_VGA[i].mode) goto foundit; else i++;
|
||||
|
|
@ -129,23 +131,77 @@ Bit8u VESA_GetSVGAModeInformation(Bit16u mode,Bit16u seg,Bit16u off) {
|
|||
foundit:
|
||||
VideoModeBlock * mblock=&ModeList_VGA[i];
|
||||
switch (mblock->type) {
|
||||
case M_LIN8: //Linear 8-bit
|
||||
var_write(&minfo.ModeAttributes,0x9b);
|
||||
var_write(&minfo.WinAAttributes,0x7); //Exists/readable/writable
|
||||
var_write(&minfo.WinGranularity,64);
|
||||
var_write(&minfo.WinSize,64);
|
||||
var_write(&minfo.WinASegment,0xa000);
|
||||
// var_write(&minfo.WinBSegment,0xa000);
|
||||
var_write(&minfo.WinFuncPtr,CALLBACK_RealPointer(callback.setwindow));
|
||||
var_write(&minfo.BytesPerScanLine,mblock->swidth);
|
||||
var_write(&minfo.NumberOfPlanes,0x1);
|
||||
var_write(&minfo.BitsPerPixel,0x08);
|
||||
var_write(&minfo.NumberOfBanks,0x1);
|
||||
var_write(&minfo.MemoryModel,0x04); //packed pixel
|
||||
var_write(&minfo.NumberOfImagePages,0x05);
|
||||
var_write(&minfo.Reserved_page,0x1);
|
||||
case M_LIN4:
|
||||
pageSize = mblock->sheight * mblock->swidth/2;
|
||||
pageSize = (pageSize | 15) & ~ 15;
|
||||
var_write(&minfo.NumberOfImagePages,(512*1024 / pageSize)-1);
|
||||
var_write(&minfo.BytesPerScanLine,mblock->swidth/8);
|
||||
var_write(&minfo.BitsPerPixel,4);
|
||||
var_write(&minfo.MemoryModel,3); //ega planar mode
|
||||
break;
|
||||
case M_LIN8:
|
||||
pageSize = mblock->sheight * mblock->swidth;
|
||||
pageSize = (pageSize | 15) & ~ 15;
|
||||
var_write(&minfo.NumberOfImagePages,(2*1024*1024 / pageSize)-1);
|
||||
var_write(&minfo.BytesPerScanLine,mblock->swidth);
|
||||
var_write(&minfo.BitsPerPixel,8);
|
||||
var_write(&minfo.MemoryModel,4); //packed pixel
|
||||
break;
|
||||
case M_LIN15:
|
||||
pageSize = mblock->sheight * mblock->swidth*2;
|
||||
pageSize = (pageSize | 15) & ~ 15;
|
||||
var_write(&minfo.NumberOfImagePages,(2*1024*1024 / pageSize)-1);
|
||||
var_write(&minfo.BytesPerScanLine,mblock->swidth*2);
|
||||
var_write(&minfo.BitsPerPixel,15);
|
||||
var_write(&minfo.MemoryModel,6); //HiColour
|
||||
var_write(&minfo.RedMaskSize,5);
|
||||
var_write(&minfo.RedMaskPos,10);
|
||||
var_write(&minfo.GreenMaskSize,5);
|
||||
var_write(&minfo.GreenMaskPos,5);
|
||||
var_write(&minfo.BlueMaskSize,5);
|
||||
var_write(&minfo.BlueMaskPos,0);
|
||||
break;
|
||||
case M_LIN16:
|
||||
pageSize = mblock->sheight * mblock->swidth*2;
|
||||
pageSize = (pageSize | 15) & ~ 15;
|
||||
var_write(&minfo.NumberOfImagePages,(2*1024*1024 / pageSize)-1);
|
||||
var_write(&minfo.BytesPerScanLine,mblock->swidth*2);
|
||||
var_write(&minfo.BitsPerPixel,16);
|
||||
var_write(&minfo.MemoryModel,6); //HiColour
|
||||
var_write(&minfo.RedMaskSize,5);
|
||||
var_write(&minfo.RedMaskPos,11);
|
||||
var_write(&minfo.GreenMaskSize,6);
|
||||
var_write(&minfo.GreenMaskPos,5);
|
||||
var_write(&minfo.BlueMaskSize,5);
|
||||
var_write(&minfo.BlueMaskPos,0);
|
||||
break;
|
||||
case M_LIN32:
|
||||
pageSize = mblock->sheight * mblock->swidth*4;
|
||||
pageSize = (pageSize | 15) & ~ 15;
|
||||
var_write(&minfo.NumberOfImagePages,(2*1024*1024 / pageSize)-1);
|
||||
var_write(&minfo.BytesPerScanLine,mblock->swidth*2);
|
||||
var_write(&minfo.BitsPerPixel,32);
|
||||
var_write(&minfo.MemoryModel,6); //HiColour
|
||||
var_write(&minfo.RedMaskSize,5);
|
||||
var_write(&minfo.RedMaskPos,11);
|
||||
var_write(&minfo.GreenMaskSize,6);
|
||||
var_write(&minfo.GreenMaskPos,5);
|
||||
var_write(&minfo.BlueMaskSize,5);
|
||||
var_write(&minfo.BlueMaskPos,0);
|
||||
break;
|
||||
default:
|
||||
return 0x1;
|
||||
}
|
||||
|
||||
var_write(&minfo.ModeAttributes,0x9b);
|
||||
var_write(&minfo.WinAAttributes,0x7); //Exists/readable/writable
|
||||
var_write(&minfo.WinGranularity,64);
|
||||
var_write(&minfo.WinSize,64);
|
||||
var_write(&minfo.WinASegment,0xa000);
|
||||
var_write(&minfo.WinFuncPtr,CALLBACK_RealPointer(callback.setwindow));
|
||||
var_write(&minfo.NumberOfPlanes,0x1);
|
||||
var_write(&minfo.NumberOfBanks,0x1);
|
||||
var_write(&minfo.Reserved_page,0x1);
|
||||
var_write(&minfo.XResolution,mblock->swidth);
|
||||
var_write(&minfo.YResolution,mblock->sheight);
|
||||
var_write(&minfo.XCharSize,mblock->cwidth);
|
||||
|
|
@ -275,6 +331,13 @@ Bit8u VESA_SetDisplayStart(Bit16u x,Bit16u y) {
|
|||
//TODO Maybe do things differently with lowres double line modes?
|
||||
Bitu start;
|
||||
switch (CurMode->type) {
|
||||
case M_LIN4:
|
||||
start=vga.config.scan_len*8*y+x;
|
||||
vga.config.display_start=start/8;
|
||||
IO_Read(0x3da);
|
||||
IO_Write(0x3c0,0x13+32);
|
||||
IO_Write(0x3c0,start % 8);
|
||||
break;
|
||||
case M_LIN8:
|
||||
start=vga.config.scan_len*8*y+x;
|
||||
vga.config.display_start=start/4;
|
||||
|
|
@ -282,6 +345,15 @@ Bit8u VESA_SetDisplayStart(Bit16u x,Bit16u y) {
|
|||
IO_Write(0x3c0,0x13+32);
|
||||
IO_Write(0x3c0,(start % 4)*2);
|
||||
break;
|
||||
case M_LIN16:
|
||||
case M_LIN15:
|
||||
start=vga.config.scan_len*4*y+x;
|
||||
vga.config.display_start=start/4;
|
||||
break;
|
||||
case M_LIN32:
|
||||
start=vga.config.scan_len*4*y+x;
|
||||
vga.config.display_start=start/4;
|
||||
break;
|
||||
default:
|
||||
return 0x1;
|
||||
}
|
||||
|
|
@ -333,6 +405,9 @@ void INT10_SetupVESA(void) {
|
|||
/* Copy the pmode interface block */
|
||||
int10.rom.pmode_interface=RealMake(0xc000,int10.rom.used);
|
||||
int10.rom.pmode_interface_size=sizeof(PmodeInterface);
|
||||
switch (svgaCard) {
|
||||
|
||||
}
|
||||
for (i=0;i<sizeof(PmodeInterface);i++) {
|
||||
phys_writeb(0xc0000+int10.rom.used++,PmodeInterface[i]);
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue