From b374d8c93f795c676f1e8879f8d291dbac516f66 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Sebastian=20Strohh=C3=A4cker?=
 <c2woody@users.sourceforge.net>
Date: Fri, 8 Aug 2008 21:57:00 +0000
Subject: [PATCH] some s3/xga fixes (hal)

Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@3193
---
 include/vga.h            | 16 +++++++++-
 src/hardware/vga_s3.cpp  | 24 ++++++++++++++-
 src/hardware/vga_xga.cpp | 64 ++++++++++++++++++----------------------
 src/ints/int10_modes.cpp | 20 +++++++------
 4 files changed, 77 insertions(+), 47 deletions(-)

diff --git a/include/vga.h b/include/vga.h
index c66faeed..7815586b 100644
--- a/include/vga.h
+++ b/include/vga.h
@@ -16,7 +16,7 @@
  *  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  */
 
-/* $Id: vga.h,v 1.42 2008-05-28 20:43:13 qbix79 Exp $ */
+/* $Id: vga.h,v 1.43 2008-08-08 21:56:36 c2woody Exp $ */
 
 #ifndef DOSBOX_VGA_H
 #define DOSBOX_VGA_H
@@ -55,6 +55,18 @@ enum VGAModes {
 #define S3_CLOCK(_M,_N,_R)	((S3_CLOCK_REF * ((_M) + 2)) / (((_N) + 2) * (1 << (_R))))
 #define S3_MAX_CLOCK	150000	/* KHz */
 
+#define S3_XGA_1024		0x00
+#define S3_XGA_1152		0x01
+#define S3_XGA_640		0x40
+#define S3_XGA_800		0x80
+#define S3_XGA_1280		0xc0
+#define S3_XGA_WMASK	(S3_XGA_640|S3_XGA_800|S3_XGA_1024|S3_XGA_1152|S3_XGA_1280)
+
+#define S3_XGA_8BPP  0x00
+#define S3_XGA_16BPP 0x10
+#define S3_XGA_32BPP 0x30
+#define S3_XGA_CMASK (S3_XGA_8BPP|S3_XGA_16BPP|S3_XGA_32BPP)
+
 typedef struct {
 	bool attrindex;
 } VGA_Internal;
@@ -179,6 +191,8 @@ typedef struct {
 	Bit16u la_window;
 	Bit8u misc_control_2;
 	Bit8u ext_mem_ctrl;
+	Bitu xga_screen_width;
+	VGAModes xga_color_mode;
 	struct {
 		Bit8u r;
 		Bit8u n;
diff --git a/src/hardware/vga_s3.cpp b/src/hardware/vga_s3.cpp
index a549407c..d1b6e2c5 100644
--- a/src/hardware/vga_s3.cpp
+++ b/src/hardware/vga_s3.cpp
@@ -16,7 +16,7 @@
  *  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  */
 
-/* $Id: vga_s3.cpp,v 1.15 2008-08-04 17:48:36 c2woody Exp $ */
+/* $Id: vga_s3.cpp,v 1.16 2008-08-08 21:57:00 c2woody Exp $ */
 
 #include "dosbox.h"
 #include "inout.h"
@@ -140,6 +140,19 @@ void SVGA_S3_WriteCRTC(Bitu reg,Bitu val,Bitu iolen) {
 		break;
 	case 0x50:  // Extended System Control 1
 		vga.s3.reg_50 = val;
+		switch (val & S3_XGA_CMASK) {
+			case S3_XGA_32BPP: vga.s3.xga_color_mode = M_LIN32; break;
+			case S3_XGA_16BPP: vga.s3.xga_color_mode = M_LIN16; break;
+			case S3_XGA_8BPP: vga.s3.xga_color_mode = M_LIN8; break;
+		}
+		switch (val & S3_XGA_WMASK) {
+			case S3_XGA_1024: vga.s3.xga_screen_width = 1024; break;
+			case S3_XGA_1152: vga.s3.xga_screen_width = 1152; break;
+			case S3_XGA_640:  vga.s3.xga_screen_width = 640; break;
+			case S3_XGA_800:  vga.s3.xga_screen_width = 800; break;
+			case S3_XGA_1280: vga.s3.xga_screen_width = 1280; break;
+			default:  vga.s3.xga_screen_width = 1024; break;
+		}
 		break;
 	case 0x51:	/* Extended System Control 2 */
 		vga.s3.reg_51=val & 0xc0;		//Only store bits 6,7
@@ -297,6 +310,11 @@ void SVGA_S3_WriteCRTC(Bitu reg,Bitu val,Bitu iolen) {
 		/*
 			0	VCLK PHS. VCLK Phase With Respect to DCLK. If clear VLKC is inverted
 				DCLK, if set VCLK = DCLK.
+			2-3 (Trio64V+) streams mode
+					00 disable Streams Processor
+					01 overlay secondary stream on VGA-mode background
+					10 reserved
+					11 full Streams Processor operation
 			4-7	Pixel format.
 					0  Mode  0: 8bit (1 pixel/VCLK)
 					1  Mode  8: 8bit (2 pixels/VCLK)
@@ -377,6 +395,10 @@ Bitu SVGA_S3_ReadCRTC( Bitu reg, Bitu iolen) {
 		return vga.s3.hgc.originy>>8;
 	case 0x49:  /*  HGC orgY */
 		return vga.s3.hgc.originy&0xff;
+	case 0x4A:  /* HGC foreground stack */
+		return vga.s3.hgc.forestack[vga.s3.hgc.fstackpos];
+	case 0x4B:  /* HGC background stack */
+		return vga.s3.hgc.backstack[vga.s3.hgc.bstackpos];
 	case 0x50:	// CR50 Extended System Control 1
 		return vga.s3.reg_50;
 	case 0x51:	/* Extended System Control 2 */
diff --git a/src/hardware/vga_xga.cpp b/src/hardware/vga_xga.cpp
index 9c10497e..2e796c5c 100644
--- a/src/hardware/vga_xga.cpp
+++ b/src/hardware/vga_xga.cpp
@@ -16,7 +16,7 @@
  *  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  */
 
-/* $Id: vga_xga.cpp,v 1.13 2008-08-06 18:32:35 c2woody Exp $ */
+/* $Id: vga_xga.cpp,v 1.14 2008-08-08 21:57:00 c2woody Exp $ */
 
 #include <string.h>
 #include "dosbox.h"
@@ -27,7 +27,8 @@
 #include "callback.h"
 #include "cpu.h"		// for 0x3da delay
 
-#define XGA_SCREEN_WIDTH vga.draw.width
+#define XGA_SCREEN_WIDTH	vga.s3.xga_screen_width
+#define XGA_COLOR_MODE		vga.s3.xga_color_mode
 
 #define XGA_SHOW_COMMAND_TRACE 0
 
@@ -140,7 +141,7 @@ void XGA_DrawPoint(Bitu x, Bitu y, Bitu c) {
 	/* Need to zero out all unused bits in modes that have any (15-bit or "32"-bit -- the last
 	   one is actually 24-bit. Without this step there may be some graphics corruption (mainly,
 	   during windows dragging. */
-	switch(vga.mode) {
+	switch(XGA_COLOR_MODE) {
 		case M_LIN8: vga.mem.linear[memaddr] = c; break;
 		case M_LIN15: ((Bit16u*)(vga.mem.linear))[memaddr] = (Bit16u)(c&0x7fff); break;
 		case M_LIN16: ((Bit16u*)(vga.mem.linear))[memaddr] = (Bit16u)(c&0xffff); break;
@@ -156,7 +157,7 @@ Bitu XGA_GetPoint(Bitu x, Bitu y) {
 		//LOG_MSG("getpoint mem over: x%d y%d",x,y);
 		return 0;
 	}
-	switch(vga.mode) {
+	switch(XGA_COLOR_MODE) {
 	case M_LIN8: return vga.mem.linear[memaddr];
 	case M_LIN15:
 	case M_LIN16: return ((Bit16u*)(vga.mem.linear))[memaddr];
@@ -954,40 +955,35 @@ void XGA_DrawCmd(Bitu val, Bitu len) {
 }
 
 void XGA_SetDualReg(Bit32u& reg, Bitu val) {
-	switch(vga.mode) {
+	switch(XGA_COLOR_MODE) {
 	case M_LIN8:
 		reg = (Bit8u)(val&0xff); break;
 	case M_LIN15:
 	case M_LIN16:
 		reg = (Bit16u)(val&0xffff); break;
-	case M_LIN32: {
-			if(xga.control1 & 0x200)
-				reg = val;
-			else if(xga.control1 & 0x10)
-				reg = (reg&0x0000ffff)|(val<<16);
-			else
-				reg = (reg&0xffff0000)|(val&0x0000ffff);
-			xga.control1 ^= 0x10;
-		}
+	case M_LIN32:
+		if (xga.control1 & 0x200)
+			reg = val;
+		else if (xga.control1 & 0x10)
+			reg = (reg&0x0000ffff)|(val<<16);
+		else
+			reg = (reg&0xffff0000)|(val&0x0000ffff);
+		xga.control1 ^= 0x10;
 		break;
 	}
 }
 
 Bitu XGA_GetDualReg(Bit32u reg) {
-	switch(vga.mode) {
+	switch(XGA_COLOR_MODE) {
 	case M_LIN8:
 		return (Bit8u)(reg&0xff);
 	case M_LIN15: case M_LIN16:
 		return (Bit16u)(reg&0xffff);
-	case M_LIN32: {
-			if(xga.control1 & 0x200)
-				return reg;
-			xga.control1 ^= 0x10;
-			if(xga.control1 & 0x10)
-				return reg&0x0000ffff;
-			else
-				return reg>>16;
-		}
+	case M_LIN32:
+		if (xga.control1 & 0x200) return reg;
+		xga.control1 ^= 0x10;
+		if (xga.control1 & 0x10) return reg&0x0000ffff;
+		else return reg>>16;
 	}
 	return 0;
 }
@@ -1027,24 +1023,20 @@ void XGA_Write(Bitu port, Bitu val, Bitu len) {
 			break;
 
 		case 0x8120: // packed MMIO: DWORD background color (see PORT A2E8h)
-			//if(len==4) xga.backcolor = val;
-			//else 
-				XGA_SetDualReg(xga.backcolor, val);
+			if (len==4) xga.backcolor = val;
+			else XGA_SetDualReg(xga.backcolor, val);
 			break;
 		case 0x8124: // packed MMIO: DWORD foreground color (see PORT A6E8h)
-			//if(len==4) xga.forecolor = val; // TODO
-			//else 
-				XGA_SetDualReg(xga.forecolor, val);
+			if (len==4) xga.forecolor = val; // TODO
+			else XGA_SetDualReg(xga.forecolor, val);
 			break;
 		case 0x8128: // DWORD	write mask (see PORT AAE8h)
-			//if(len==4) xga.writemask = val;
-			//else
-				XGA_SetDualReg(xga.writemask, val);
+			if (len==4) xga.writemask = val;
+			else XGA_SetDualReg(xga.writemask, val);
 			break;
 		case 0x812C: // DWORD	read mask (see PORT AEE8h)
-			//if(len==4) xga.readmask = val;
-			//else
-				XGA_SetDualReg(xga.readmask, val);
+			if (len==4) xga.readmask = val;
+			else XGA_SetDualReg(xga.readmask, val);
 			break;
 		case 0x8134: // packed MMIO: DWORD	background mix (low word) and
 					 // foreground mix (high word)	(see PORT B6E8h,PORT BAE8h)
diff --git a/src/ints/int10_modes.cpp b/src/ints/int10_modes.cpp
index db139849..0f5d7830 100644
--- a/src/ints/int10_modes.cpp
+++ b/src/ints/int10_modes.cpp
@@ -16,7 +16,7 @@
  *  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  */
 
-/* $Id: int10_modes.cpp,v 1.79 2008-08-06 18:32:35 c2woody Exp $ */
+/* $Id: int10_modes.cpp,v 1.80 2008-08-08 21:57:00 c2woody Exp $ */
 
 #include <string.h>
 
@@ -1206,18 +1206,20 @@ dac_text16:
 		IO_Write(0x3c5,0x03);
 
 		// Accellerator setup 
-		Bitu reg_50=0;
+		Bitu reg_50=S3_XGA_8BPP;
 		switch (CurMode->type) {
 			case M_LIN15:
-			case M_LIN16: reg_50|=0x10; break;
-			case M_LIN32: reg_50|=0x30; break;
+			case M_LIN16: reg_50|=S3_XGA_16BPP; break;
+			case M_LIN32: reg_50|=S3_XGA_32BPP; break;
+			default: break;
 		}
 		switch(CurMode->swidth) {
-			case 640:  reg_50|=0x40; break;
-			case 800:  reg_50|=0x80; break;
-			case 1024: break;
-			case 1152: reg_50|=0x01; break;
-			case 1280: reg_50|=0xc1; break;
+			case 640:  reg_50|=S3_XGA_640; break;
+			case 800:  reg_50|=S3_XGA_800; break;
+			case 1024: reg_50|=S3_XGA_1024; break;
+			case 1152: reg_50|=S3_XGA_1152; break;
+			case 1280: reg_50|=S3_XGA_1280; break;
+			default: break;
 		}
 		IO_WriteB(crtc_base,0x50); IO_WriteB(crtc_base+1,reg_50);