New FPU opcode handling layout
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@1020
This commit is contained in:
Sjoerd van der Berg
parent
2667e412a2
commit
b81081ed2b
5 changed files with 77 additions and 580 deletions
203
src/fpu/fpu.cpp
203
src/fpu/fpu.cpp
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@ -30,101 +30,32 @@ typedef PhysPt EAPoint;
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#define LoadMw(off) mem_readw(off)
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#define LoadMd(off) mem_readd(off)
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#define LoadMbs(off) (Bit8s)(LoadMb(off))
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#define LoadMws(off) (Bit16s)(LoadMw(off))
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#define LoadMds(off) (Bit32s)(LoadMd(off))
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#define SaveMb(off,val) mem_writeb(off,val)
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#define SaveMw(off,val) mem_writew(off,val)
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#define SaveMd(off,val) mem_writed(off,val)
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typedef double Real;
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#include "fpu_types.h"
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struct {
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FPU_Reg regs[8];
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FPU_Tag tags[8];
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Bitu cw;
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FPU_Round round;
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Bitu ex_mask;
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Bitu sw;
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Bitu top;
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} fpu;
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INLINE void FPU_SetCW(Bitu word) {
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fpu.cw = word;
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fpu.round = (FPU_Round)((word >> 8) & 3);
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fpu.ex_mask = word & 0x3f;
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}
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#include "fpu_instructions.h"
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FPU_Flag_Info fpu_flags;
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FPU_Reg fpu_regs[8];
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#define FPU_GetZF fpu_flags.sw.zf = FPU_get_ZF();
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#define FPU_ParseCW(newcw) { \
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fpu_flags.cw.ic = ((bool)((newcw&0x1000)>>12)?true:false); \
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fpu_flags.cw.rc = (Bit8u)((newcw&0x0C00)>>10); \
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fpu_flags.cw.pc = (Bit8u)((newcw&0x0300)>>8); \
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fpu_flags.cw.ie = ((bool)((newcw&0x0080)>>7)?true:false); \
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fpu_flags.cw.sf = ((bool)((newcw&0x0040)>>6)?true:false); \
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fpu_flags.cw.pf = ((bool)((newcw&0x0020)>>5)?true:false); \
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fpu_flags.cw.uf = ((bool)((newcw&0x0010)>>4)?true:false); \
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fpu_flags.cw.of = ((bool)((newcw&0x0008)>>3)?true:false); \
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fpu_flags.cw.zf = ((bool)((newcw&0x0004)>>2)?true:false); \
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fpu_flags.cw.df = ((bool)((newcw&0x0002)>>1)?true:false); \
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fpu_flags.cw.in = ((bool)(newcw&0x0001)?true:false); \
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}
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#define FPU_makeCW(newcw) { \
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newcw = (Bit16u)fpu_flags.cw.in; \
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newcw |= (fpu_flags.cw.df<<1); \
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newcw |= (fpu_flags.cw.zf<<2); \
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newcw |= (fpu_flags.cw.of<<3); \
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newcw |= (fpu_flags.cw.uf<<4); \
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newcw |= (fpu_flags.cw.pf<<5); \
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newcw |= (fpu_flags.cw.sf<<6); \
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newcw |= (fpu_flags.cw.ie<<7); \
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newcw |= (fpu_flags.cw.pc<<8); \
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newcw |= (fpu_flags.cw.rc<<10); \
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newcw |= (fpu_flags.cw.ic<<12); \
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}
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#define FPU_ParseSW(newsw) { \
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fpu_flags.sw.bf = ((bool)((newsw&0x8000)>>15)?true:false); \
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fpu_flags.sw.c3 = ((bool)((newsw&0x4000)>>14)?true:false); \
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fpu_flags.sw.tos = (Bit8s)((newsw&0x3800)>>11); \
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fpu_flags.sw.c2 = ((bool)((newsw&0x0400)>>10)?true:false); \
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fpu_flags.sw.c1 = ((bool)((newsw&0x0200)>>9)?true:false); \
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fpu_flags.sw.c0 = ((bool)((newsw&0x0100)>>8)?true:false); \
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fpu_flags.sw.ir = ((bool)((newsw&0x0080)>>7)?true:false); \
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fpu_flags.sw.sf = ((bool)((newsw&0x0040)>>6)?true:false); \
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fpu_flags.sw.pf = ((bool)((newsw&0x0020)>>5)?true:false); \
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fpu_flags.sw.uf = ((bool)((newsw&0x0010)>>4)?true:false); \
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fpu_flags.sw.of = ((bool)((newsw&0x0008)>>3)?true:false); \
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fpu_flags.sw.zf = ((bool)((newsw&0x0004)>>2)?true:false); \
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fpu_flags.sw.df = ((bool)((newsw&0x0002)>>1)?true:false); \
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fpu_flags.sw.in = ((bool)(newsw&0x0001)?true:false); \
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}
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#define FPU_makeSW(newsw) { \
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newsw = (Bit16u)fpu_flags.sw.in; \
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newsw |= (fpu_flags.sw.df<<1); \
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newsw |= (fpu_flags.sw.zf<<2); \
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newsw |= (fpu_flags.sw.of<<3); \
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newsw |= (fpu_flags.sw.uf<<4); \
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newsw |= (fpu_flags.sw.pf<<5); \
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newsw |= (fpu_flags.sw.sf<<6); \
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newsw |= (fpu_flags.sw.ir<<7); \
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newsw |= (fpu_flags.sw.c0<<8); \
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newsw |= (fpu_flags.sw.c1<<9); \
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newsw |= (fpu_flags.sw.c2<<10); \
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newsw |= (fpu_flags.sw.tos<<11); \
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newsw |= (fpu_flags.sw.c3<<14); \
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newsw |= (fpu_flags.sw.bf<<15); \
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}
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#define FPU_LOADFLAGS { \
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fpu_flags.sw.bf = false; \
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fpu_flags.sw.c3 = FPU_get_C3(); \
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fpu_flags.sw.c2 = FPU_get_C2(); \
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fpu_flags.sw.c1 = FPU_get_C1(); \
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fpu_flags.sw.c0 = FPU_get_C0(); \
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fpu_flags.sw.ir = FPU_get_IR(); \
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fpu_flags.sw.sf = FPU_get_SF(); \
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fpu_flags.sw.pf = FPU_get_PF(); \
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fpu_flags.sw.uf = FPU_get_UF(); \
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fpu_flags.sw.of = FPU_get_OF(); \
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fpu_flags.sw.zf = FPU_get_ZF(); \
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fpu_flags.sw.df = FPU_get_DF(); \
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fpu_flags.sw.in = FPU_get_IN(); \
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}
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void FPU_ESC0_EA(Bitu rm,PhysPt addr) {
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}
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@ -134,50 +65,10 @@ void FPU_ESC0_Normal(Bitu rm) {
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void FPU_ESC1_EA(Bitu rm,PhysPt addr) {
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Bit16u cw;
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Bitu opcode = (rm&0x38)>>3;
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switch(opcode) {
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case 0:
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case 1:
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case 2:
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case 3:
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case 4:
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case 6:
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break;
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case 5:
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FPU_ParseCW(LoadMw(addr)); /* FLDCW */
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break;
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case 7: /* FSTCW */
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FPU_makeCW(cw);
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SaveMw(addr,cw);
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break;
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}
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}
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void FPU_ESC1_Normal(Bitu rm) {
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Bitu opcode = (rm&0xF0);
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switch(opcode) {
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case 0xC0:
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// if(rm&8)
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// else
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FLDST(rm-0xC0); /* FLDST */
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break;
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case 0xD0:
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break;
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}
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switch(rm) {
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case 0xE0: /* FCHS */
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FCHS;
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break;
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case 0xE8: /* FLD1 */
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FLD(1);
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break;
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case 0xEE: /* FLDZ */
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FLD(0);
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break;
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}
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}
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@ -192,14 +83,18 @@ void FPU_ESC3_EA(Bitu rm,PhysPt addr) {
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}
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void FPU_ESC3_Normal(Bitu rm) {
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switch( rm ) {
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case 0xE3: /* FINIT */
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FPU_ParseCW(0x037F);
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for(int i=0;i<8;i++) {
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fpu_regs.st[i].r = 0;
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fpu_regs.st[i].tag = FPUREG_EMPTY;
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}
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Bitu group=(rm >> 3) & 7;
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Bitu sub=(rm & 7);
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switch (group) {
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case 0x04:
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switch (sub) {
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case 0x03: //FINIT
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FPU_FINIT();
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break;
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default:
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LOG(LOG_FPU,LOG_WARN)("ESC 3:Unhandled group %d subfunction %d",group,sub);
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}
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LOG(LOG_FPU,LOG_WARN)("ESC 3:Unhandled group %d",group);
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}
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}
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@ -212,23 +107,6 @@ void FPU_ESC4_Normal(Bitu rm) {
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void FPU_ESC5_EA(Bitu rm,PhysPt addr) {
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Bit16u sw;
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Bitu opcode = (rm&0x38)>>3;
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switch(opcode) {
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case 0:
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case 1:
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case 2:
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case 3:
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case 4:
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case 5:
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case 6:
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case 7: /* FSTSW */
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FPU_LOADFLAGS;
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FPU_makeSW(sw);
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SaveMw(addr,sw);
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break;
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}
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}
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void FPU_ESC5_Normal(Bitu rm) {
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@ -239,27 +117,6 @@ void FPU_ESC6_EA(Bitu rm,PhysPt addr) {
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}
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void FPU_ESC6_Normal(Bitu rm) {
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Bitu opcode = (rm&0xF0);
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if(rm==0xD9) { /* FCOMPP */
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FCOMPP;
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return;
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}
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switch(opcode) {
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case 0xC0:
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// if(rm&8)
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break;
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case 0xD0:
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// if(rm&8)
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break;
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case 0xE0:
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// if(rm&8)
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break;
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case 0xF0:
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if(rm&8)
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FDIVP(rm-0xF8,0);
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break;
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}
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}
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@ -271,7 +128,7 @@ void FPU_ESC7_Normal(Bitu rm) {
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void FPU_Init(void) {
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fpu_flags.type = t_FUNKNOWN;
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FPU_FINIT();
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}
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#endif
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