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updated loggingsystem

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Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@989
This commit is contained in:
Peter Veenstra 2003-05-04 19:19:09 +00:00
parent 72d44cbc16
commit bbb7cf45b0
44 changed files with 208 additions and 201 deletions
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14
src/hardware/cmos.cpp
View file

@ -53,7 +53,7 @@ static void cmos_checktimer(void) {
if (!cmos.timer.div || !cmos.timer.enabled) return;
if (cmos.timer.div<=2) cmos.timer.div+=7;
cmos.timer.micro=(Bitu) (10000000.0/(32768.0 / (1 << (cmos.timer.div - 1))));
LOG(LOG_PIT,"RTC Timer at %f hz",1000000.0/cmos.timer.micro);
LOG(LOG_PIT,LOG_NORMAL)("RTC Timer at %f hz",1000000.0/cmos.timer.micro);
PIC_AddEvent(cmos_timerevent,cmos.timer.micro);
}
@ -76,13 +76,13 @@ static void cmos_writereg(Bit32u port,Bit8u val) {
case 0x01: /* Seconds Alarm */
case 0x03: /* Minutes Alarm */
case 0x05: /* Hours Alarm */
LOG(LOG_BIOS,"CMOS:Trying to set alarm");
LOG(LOG_BIOS,LOG_NORMAL)("CMOS:Trying to set alarm");
cmos.regs[cmos.reg]=val;
break;
case 0x0a: /* Status reg A */
cmos.regs[cmos.reg]=val & 0x7f;
if (val & 0x70!=0x20) LOG(LOG_ERROR|LOG_BIOS,"CMOS Illegal 22 stage divider value");
if (val & 0x70!=0x20) LOG(LOG_BIOS,LOG_ERROR)("CMOS Illegal 22 stage divider value");
cmos.timer.div=(val & 0xf);
cmos_checktimer();
break;
@ -90,7 +90,7 @@ static void cmos_writereg(Bit32u port,Bit8u val) {
cmos.bcd=!(val & 0x4);
cmos.regs[cmos.reg]=val & 0x7f;
cmos.timer.enabled=(val & 0x40)>0;
if (val&0x10) LOG(LOG_ERROR|LOG_BIOS,"CMOS:Updated ended interrupt not supported yet");
if (val&0x10) LOG(LOG_BIOS,LOG_ERROR)("CMOS:Updated ended interrupt not supported yet");
cmos_checktimer();
break;
case 0x0f: /* Shutdown status byte */
@ -98,7 +98,7 @@ static void cmos_writereg(Bit32u port,Bit8u val) {
break;
default:
cmos.regs[cmos.reg]=val & 0x7f;
LOG(LOG_ERROR|LOG_BIOS,"CMOS:WRite to unhandled register %x",cmos.reg);
LOG(LOG_BIOS,LOG_ERROR)("CMOS:WRite to unhandled register %x",cmos.reg);
}
}
@ -107,7 +107,7 @@ static void cmos_writereg(Bit32u port,Bit8u val) {
static Bit8u cmos_readreg(Bit32u port) {
if (cmos.reg>0x3f) {
LOG(LOG_ERROR|LOG_BIOS,"CMOS:Read from illegal register %x",cmos.reg);
LOG(LOG_BIOS,LOG_ERROR)("CMOS:Read from illegal register %x",cmos.reg);
return 0xff;
}
time_t curtime;
@ -151,7 +151,7 @@ static Bit8u cmos_readreg(Bit32u port) {
case 0x31: /* Extended memory in KB High Byte */
return cmos.regs[cmos.reg];
default:
LOG(LOG_BIOS,"CMOS:Read from reg %F",cmos.reg);
LOG(LOG_BIOS,LOG_NORMAL)("CMOS:Read from reg %F",cmos.reg);
return cmos.regs[cmos.reg];
}
}

8
src/hardware/disney.cpp
View file

@ -47,7 +47,7 @@ static void disney_write(Bit32u port,Bit8u val) {
disney.data=val;
break;
case 1: /* Status Port */
LOG(LOG_MISC,"DISNEY:Status write %x",val);
LOG(LOG_MISC,LOG_NORMAL)("DISNEY:Status write %x",val);
break;
case 2: /* Control Port */
// LOG_WARN("DISNEY:Control write %x",val);
@ -56,7 +56,7 @@ static void disney_write(Bit32u port,Bit8u val) {
disney.buffer[disney.used++]=disney.data;
}
}
if (val&0x10) LOG(LOG_ERROR,"DISNEY:Parallel IRQ Enabled");
if (val&0x10) LOG(LOG_MISC,LOG_ERROR)("DISNEY:Parallel IRQ Enabled");
disney.control=val;
break;
}
@ -66,7 +66,7 @@ static Bit8u disney_read(Bit32u port) {
switch (port-DISNEY_BASE) {
case 0: /* Data Port */
// LOG(LOG_MISC,"DISNEY:Read from data port");
// LOG(LOG_MISC,LOG_NORMAL)("DISNEY:Read from data port");
return disney.data;
break;
case 1: /* Status Port */
@ -75,7 +75,7 @@ static Bit8u disney_read(Bit32u port) {
else return 0x0;
break;
case 2: /* Control Port */
LOG(LOG_MISC,"DISNEY:Read from control port");
LOG(LOG_MISC,LOG_NORMAL)("DISNEY:Read from control port");
return disney.control;
break;
}

8
src/hardware/dma.cpp
View file

@ -105,7 +105,7 @@ static Bit8u read_dma(Bit32u port) {
ret=0x0;
break;
default:
LOG(LOG_ERROR,"DMA:Unhandled read from %X",port);
LOG(LOG_DMA,LOG_ERROR)("DMA:Unhandled read from %X",port);
}
return ret;
}
@ -140,7 +140,7 @@ static void write_dma(Bit32u port,Bit8u val) {
DMA_TestChannel(chan);
break;
case 0x08: /* Command Register */
if (val != 4) LOG(LOG_ERROR,"DMA1:Illegal command %2X",val);
if (val != 4) LOG(LOG_DMA,LOG_ERROR)("DMA1:Illegal command %2X",val);
cont->command_reg=val;
break;
case 0x09: /* Request Register */
@ -165,7 +165,7 @@ static void write_dma(Bit32u port,Bit8u val) {
chan->mode.autoinit_enable = (val & 0x10) > 0;
chan->mode.transfer_type = (val >> 2) & 0x03;
if (chan->mode.address_decrement) {
LOG(LOG_ERROR,"DMA:Address Decrease not supported yet");
LOG(LOG_DMA,LOG_ERROR)("DMA:Address Decrease not supported yet");
}
DMA_TestChannel(chan);
break;
@ -173,7 +173,7 @@ static void write_dma(Bit32u port,Bit8u val) {
cont->flipflop=true;
break;
default:
LOG(LOG_ERROR,"DMA:Unhandled write %X to %X",val,port);
LOG(LOG_DMA,LOG_ERROR)("DMA:Unhandled write %X to %X",static_cast<Bit32u>(val),port);
};
};

2
src/hardware/gameblaster.cpp
View file

@ -358,7 +358,7 @@ static void saa1099_write_port_w( int chip, int offset, int data )
break;
default: /* Error! */
// logerror("%04x: (SAA1099 #%d) Unknown operation (reg:%02x, data:%02x)\n",activecpu_get_pc(), chip, reg, data);
LOG(0|LOG_ERROR,"CMS Unkown write to reg %x with %x",reg, data);
LOG(LOG_MISC,LOG_ERROR)("CMS Unkown write to reg %x with %x",reg, data);
}
}

8
src/hardware/iohandler.cpp
View file

@ -24,12 +24,12 @@ IO_WriteBlock IO_WriteTable[IO_MAX];
void IO_Write(Bitu num,Bit8u val) {
if (num<IO_MAX) IO_WriteTable[num].handler(num,val);
else LOG(LOG_ERROR,"IO:Out or range write %X2 to port %4X",val,num);
else LOG(LOG_ALL,LOG_ERROR)("IO:Out or range write %X2 to port %4X",val,num);
}
Bit8u IO_Read(Bitu num) {
if (num<IO_MAX) return IO_ReadTable[num].handler(num);
else LOG(LOG_ERROR,"IO:Out or range read from port %4X",num);
else LOG(LOG_ALL,LOG_ERROR)("IO:Out or range read from port %4X",num);
return 0xff;
}
@ -42,13 +42,13 @@ static void IO_WriteBlocked(Bit32u port,Bit8u val) {
}
static Bit8u IO_ReadDefault(Bit32u port) {
LOG(LOG_ERROR,"Reading from undefined port %04X",port);
LOG(LOG_ALL,LOG_ERROR)("Reading from undefined port %04X",port);
IO_RegisterReadHandler(port,&IO_ReadBlocked,"Blocked Read");
return 0xff;
}
void IO_WriteDefault(Bit32u port,Bit8u val) {
LOG(LOG_ERROR,"Writing %02X to undefined port %04X",val,port);
LOG(LOG_ALL,LOG_ERROR)("Writing %02X to undefined port %04X",static_cast<Bit32u>(val),port);
IO_RegisterWriteHandler(port,&IO_WriteBlocked,"Blocked Write");
}

14
src/hardware/keyboard.cpp
View file

@ -47,7 +47,7 @@ struct KeyCode {
};
struct KeyEvent {
Bitu type;
Bits type;
Bitu state;
KEYBOARD_EventHandler * handler;
KeyEvent * next;
@ -180,7 +180,7 @@ static void write_p60(Bit32u port,Bit8u val) {
KEYBOARD_AddCode(0xfa,0,0,STATE_NORMAL); /* Acknowledge */
break;
default:
LOG(LOG_ERROR|LOG_KEYBOARD,"60:Unhandled command %X",val);
LOG(LOG_KEYBOARD,LOG_ERROR)("60:Unhandled command %X",val);
}
return;
case CMD_SETOUTPORT:
@ -218,13 +218,13 @@ static void write_p64(Bit32u port,Bit8u val) {
keyb.scheduled=true;
PIC_AddEvent(KEYBOARD_GetCode,KEYDELAY);
}
LOG(LOG_KEYBOARD,"Activated");
LOG(LOG_KEYBOARD,LOG_NORMAL)("Activated");
break;
case 0xae: /* Deactivate keyboard */
keyb.active=false;
PIC_DeActivateIRQ(1);
PIC_RemoveEvents(KEYBOARD_GetCode);
LOG(LOG_KEYBOARD,"De-Activated");
LOG(LOG_KEYBOARD,LOG_NORMAL)("De-Activated");
break;
case 0xd0: /* Outport on buffer */
KEYBOARD_AddCode(MEM_A20_Enabled() ? 0x02 : 0,0,0,STATE_NORMAL);
@ -233,7 +233,7 @@ static void write_p64(Bit32u port,Bit8u val) {
keyb.command=CMD_SETOUTPORT;
break;
default:
LOG(LOG_ERROR|LOG_KEYBOARD,"Port 64 write with val %d",val);
LOG(LOG_KEYBOARD,LOG_ERROR)("Port 64 write with val %d",val);
break;
}
}
@ -246,7 +246,7 @@ void KEYBOARD_AddEvent(Bitu keytype,Bitu state,KEYBOARD_EventHandler * handler)
KeyEvent * newevent=new KeyEvent;
/* Add the event in the correct key structure */
if (keytype>=KBD_LAST) {
LOG(LOG_ERROR|LOG_KEYBOARD,"Illegal key %d for handler",keytype);
LOG(LOG_KEYBOARD,LOG_ERROR)("Illegal key %d for handler",keytype);
}
newevent->next=event_handlers[keytype];
event_handlers[keytype]=newevent;
@ -372,7 +372,7 @@ void KEYBOARD_AddKey(KBD_KEYS keytype,Bitu unicode,Bitu mod,bool pressed) {
case KBD_insert:extend=true;ret=82;break;
case KBD_delete:extend=true;ret=83;break;
default:
E_Exit("Unsopperted key press");
E_Exit("Unsupported key press");
break;
}
/* check for active key events */

6
src/hardware/memory.cpp
View file

@ -93,11 +93,11 @@ void MEM_StrCopy(PhysPt off,char * data,Bitu size) {
}
static Bit8u Illegal_ReadHandler(PhysPt pt) {
LOG(LOG_ERROR,"MEM:Illegal read from address %4X",pt);
LOG(LOG_ALL,LOG_ERROR)("MEM:Illegal read from address %4X",pt);
return 0xff;
}
static void Illegal_WriteHandler(PhysPt pt,Bit8u val) {
LOG(LOG_ERROR,"Illegal write val %2X to address %4X",val,pt);
LOG(LOG_ALL,LOG_ERROR)("Illegal write val %2X to address %4X",static_cast<Bit32u>(val),pt);
}
/* Could only be called when the pt host entry is 0 ah well :) */
@ -243,7 +243,7 @@ void MEM_A20_Enable(bool enable) {
} else {
MEM_SetupMapping(PAGE_COUNT(1024*1024),PAGE_COUNT(64*1024),memory);
}
LOG(LOG_MISC,"A20 Line is %s",enable ? "Enabled" : "Disabled");
LOG(LOG_MISC,LOG_NORMAL)("A20 Line is %s",enable ? "Enabled" : "Disabled");
}
Bitu MEM_TotalSize(void) {

4
src/hardware/mpu401.cpp
View file

@ -158,7 +158,7 @@ static void QueueByte(Bit8u data) {
if (pos>=MPU_QUEUE) pos-=MPU_QUEUE;
mpu.queue_used++;
mpu.queue[pos]=data;
} else LOG(LOG_MISC,"MPU401:Data queue full");
} else LOG(LOG_MISC,LOG_NORMAL)("MPU401:Data queue full");
}
static void ClrQueue(void) {
@ -184,7 +184,7 @@ static void MPU401_WriteCommand(Bit32u port,Bit8u val) {
break;
default:
LOG(LOG_MISC,"MPU401:Unhandled command %X",val);
LOG(LOG_MISC,LOG_NORMAL)("MPU401:Unhandled command %X",val);
QueueByte(MSG_CMD_ACK);
break;
}

12
src/hardware/pic.cpp
View file

@ -126,14 +126,14 @@ static void write_data(Bit32u port,Bit8u val) {
};
break;
case 1: /* icw2 */
LOG(LOG_PIC,"%d:Base vector %X",port==0x21 ? 0 : 1,val);
LOG(LOG_PIC,LOG_NORMAL)("%d:Base vector %X",static_cast<Bitu>(port==0x21 ? 0 : 1),static_cast<Bitu>(val));
for (i=0;i<=7;i++) {
irqs[i+irq_base].vector=(val&0xf8)+i;
};
if(pic->icw_index++ >= pic->icw_words) pic->icw_index=0;
break;
case 2: /* icw 3 */
LOG(LOG_PIC,"%d:ICW 3 %X",port==0x21 ? 0 : 1,val);
LOG(LOG_PIC,LOG_NORMAL)("%d:ICW 3 %X",static_cast<Bitu>(port==0x21 ? 0 : 1),static_cast<Bitu>(val));
if(pic->icw_index++ >= pic->icw_words) pic->icw_index=0;
break;
case 3: /* icw 4 */
@ -147,11 +147,11 @@ static void write_data(Bit32u port,Bit8u val) {
*/
pic->auto_eoi=(val & 0x2)>0;
LOG(LOG_PIC,"%d:ICW 4 %X",port==0x21 ? 0 : 1,val);
LOG(LOG_PIC,LOG_NORMAL)("%d:ICW 4 %X",static_cast<Bitu>(port==0x21 ? 0 : 1),static_cast<Bitu>(val));
if(pic->icw_index++ >= pic->icw_words) pic->icw_index=0;
break;
default: /* icw 3, and 4*/
LOG(LOG_PIC,"ICW HUH? %X",val);
LOG(LOG_PIC,LOG_NORMAL)("ICW HUH? %X",val);
}
}
@ -269,7 +269,7 @@ static void AddEntry(PICEntry * entry) {
void PIC_AddEvent(PIC_EventHandler handler,Bitu delay) {
if (!pic.free_entry) {
LOG(LOG_ERROR|LOG_PIC,"Event queue full");
LOG(LOG_PIC,LOG_ERROR)("Event queue full");
return;
}
PICEntry * entry=pic.free_entry;
@ -284,7 +284,7 @@ void PIC_AddEvent(PIC_EventHandler handler,Bitu delay) {
void PIC_AddIRQ(Bitu irq,Bitu delay) {
if (irq>15) E_Exit("PIC:Illegal IRQ");
if (!pic.free_entry) {
LOG(LOG_ERROR|LOG_PIC,"Event queue full");
LOG(LOG_PIC,LOG_ERROR)("Event queue full");
return;
}
PICEntry * entry=pic.free_entry;

20
src/hardware/sblaster.cpp
View file

@ -344,7 +344,7 @@ static void GenerateSound(Bitu size) {
}
}
if (sb.out.pos>SB_BUF_SIZE) {
LOG(LOG_ERROR|LOG_SB,"Generation Buffer Full!!!!");
LOG(LOG_SB,LOG_ERROR)("Generation Buffer Full!!!!");
sb.out.pos=0;
}
}
@ -408,7 +408,7 @@ static void DSP_StartDMATranfser(DMA_MODES mode) {
sb.tmp.add_index=(sb.dma.rate<<16)/sb.hw.rate;
break;
default:
LOG(LOG_ERROR|LOG_SB,"DSP:Illegal transfer mode %d",mode);
LOG(LOG_SB,LOG_ERROR)("DSP:Illegal transfer mode %d",mode);
return;
}
//TODO Use the 16-bit dma for 16-bit transfers
@ -416,7 +416,7 @@ static void DSP_StartDMATranfser(DMA_MODES mode) {
sb.dma.mode=mode;
DMA_SetEnableCallBack(sb.hw.dma8,DMA_Enable);
//TODO with stereo divide add_index
LOG(LOG_SB,"DMA Transfer:%s rate %d size %d",type,sb.dma.rate,sb.dma.total);
LOG(LOG_SB,LOG_NORMAL)("DMA Transfer:%s rate %d size %d",type,sb.dma.rate,sb.dma.total);
}
static void DSP_AddData(Bit8u val) {
@ -426,7 +426,7 @@ static void DSP_AddData(Bit8u val) {
sb.dsp.out.data[start]=val;
sb.dsp.out.used++;
} else {
LOG(LOG_ERROR|LOG_SB,"DSP:Data Output buffer full");
LOG(LOG_SB,LOG_ERROR)("DSP:Data Output buffer full");
}
}
@ -538,7 +538,7 @@ static void DSP_DoCommand(void) {
break;
case 0xe2: /* Weird DMA identification write routine */
{
LOG(LOG_SB,"DSP Function 0xe2");
LOG(LOG_SB,LOG_NORMAL)("DSP Function 0xe2");
for (Bitu i = 0; i < 8; i++)
if ((sb.dsp.in.data[0] >> i) & 0x01) sb.e2.value += E2_incr_table[sb.e2.count % 4][i];
sb.e2.value += E2_incr_table[sb.e2.count % 4][8];
@ -567,7 +567,7 @@ static void DSP_DoCommand(void) {
PIC_AddIRQ(sb.hw.irq,0);
break;
default:
LOG(LOG_ERROR|LOG_SB,"DSP:Unhandled command %2X",sb.dsp.cmd);
LOG(LOG_SB,LOG_ERROR)("DSP:Unhandled command %2X",sb.dsp.cmd);
break;
}
sb.dsp.cmd=DSP_NO_COMMAND;
@ -610,7 +610,7 @@ static void MIXER_Write(Bit8u val) {
sb.mixer.master=val;
break;
default:
LOG(LOG_ERROR|LOG_SB,"MIXER:Write to unhandled index %X",sb.mixer.index);
LOG(LOG_SB,LOG_ERROR)("MIXER:Write to unhandled index %X",sb.mixer.index);
}
}
@ -623,7 +623,7 @@ static Bit8u MIXER_Read(void) {
ret=sb.mixer.master;
break;
default:
LOG(LOG_ERROR|LOG_SB,"MIXER:Read from unhandled index %X",sb.mixer.index);
LOG(LOG_SB,LOG_ERROR)("MIXER:Read from unhandled index %X",sb.mixer.index);
ret=0xff;
}
return ret;
@ -659,7 +659,7 @@ static Bit8u read_sb(Bit32u port) {
case DSP_RESET:
return 0xff;
default:
LOG(LOG_SB,"Unhandled read from SB Port %4X",port);
LOG(LOG_SB,LOG_NORMAL)("Unhandled read from SB Port %4X",port);
break;
}
return 0xff;
@ -688,7 +688,7 @@ static void write_sb(Bit32u port,Bit8u val) {
break;
default:
LOG(LOG_SB,"Unhandled write to SB Port %4X",port);
LOG(LOG_SB,LOG_NORMAL)("Unhandled write to SB Port %4X",port);
break;
}
}

2
src/hardware/tandy_sound.cpp
View file

@ -99,7 +99,7 @@ static void write_pc0(Bit32u port,Bit8u val) {
// tandy.chan[tandy.reg>>1].freq_pos=0;
break;
default:
LOG(0,"TANDY:Illegal dual byte reg %d",tandy.reg);
LOG(LOG_ALL,LOG_ERROR)("TANDY:Illegal dual byte reg %d",tandy.reg);
};
}

6
src/hardware/timer.cpp
View file

@ -84,7 +84,7 @@ static void counter_latch(Bitu counter) {
else p->read_latch=(Bit16u)(p->cntr-(((double)micro/(double)p->micro)*(double)p->cntr));
break;
default:
LOG(LOG_ERROR|LOG_PIT,"Illegal Mode %d for reading counter %d",p->mode,counter);
LOG(LOG_PIT,LOG_ERROR)("Illegal Mode %d for reading counter %d",p->mode,counter);
micro%=p->micro;
p->read_latch=(Bit16u)(p->cntr-(((double)micro/(double)p->micro)*(double)p->cntr));
break;
@ -120,14 +120,14 @@ static void write_latch(Bit32u port,Bit8u val) {
case 0x00: /* Timer hooked to IRQ 0 */
PIC_RemoveEvents(PIT0_Event);
PIC_AddEvent(PIT0_Event,p->micro);
LOG(LOG_PIT,"PIT 0 Timer at %.3g Hz mode %d",PIT_TICK_RATE/(double)p->cntr,p->mode);
LOG(LOG_PIT,LOG_NORMAL)("PIT 0 Timer at %.3g Hz mode %d",PIT_TICK_RATE/(double)p->cntr,(Bit32u)p->mode);
break;
case 0x02: /* Timer hooked to PC-Speaker */
// LOG(LOG_PIT,"PIT 2 Timer at %.3g Hz mode %d",PIT_TICK_RATE/(double)p->cntr,p->mode);
PCSPEAKER_SetCounter(p->cntr,p->mode);
break;
default:
LOG(LOG_ERROR|LOG_PIT,"PIT:Illegal timer selected for writing");
LOG(LOG_PIT,LOG_ERROR)("PIT:Illegal timer selected for writing");
}
}
}

12
src/hardware/vga.cpp
View file

@ -56,7 +56,7 @@ static void VGA_DrawHandler(RENDER_Part_Handler part_handler) {
Bitu stop=vga.config.line_compare;
if (vga.draw.double_height) stop/=2;
if (stop>=vga.draw.height){
LOG(LOG_VGAGFX,"Split at %d",stop);
LOG(LOG_VGAGFX,LOG_NORMAL)("Split at %d",stop);
goto drawnormal;
}
switch (vga.mode) {
@ -73,7 +73,7 @@ static void VGA_DrawHandler(RENDER_Part_Handler part_handler) {
bufsplit=memory+0xa0000;
break;
default:
LOG(LOG_VGAGFX,"VGA:Unhandled split screen mode %d",vga.mode);
LOG(LOG_VGAGFX,LOG_NORMAL)("VGA:Unhandled split screen mode %d",vga.mode);
goto norender;
}
part_handler(buf,0,0,vga.draw.width,stop);
@ -161,8 +161,8 @@ static void VGA_DoResize(void) {
/* Check for pixel doubling, master clock/2 */
if (vga.seq.clocking_mode & 0x8) clock/=2;
LOG(LOG_VGA,"H total %d, V Total %d",htotal,vtotal);
LOG(LOG_VGA,"H D End %d, V D End %d",hdispend,vdispend);
LOG(LOG_VGA,LOG_NORMAL)("H total %d, V Total %d",htotal,vtotal);
LOG(LOG_VGA,LOG_NORMAL)("H D End %d, V D End %d",hdispend,vdispend);
fps=clock/(vtotal*htotal);
vga.draw.resizing=false;
@ -221,8 +221,8 @@ static void VGA_DoResize(void) {
vga.draw.height=height;
vga.draw.pitch=pitch;
LOG(LOG_VGA,"Width %d, Height %d",width,height);
LOG(LOG_VGA,"Flags %X, fps %f",flags,fps);
LOG(LOG_VGA,LOG_NORMAL)("Width %d, Height %d",width,height);
LOG(LOG_VGA,LOG_NORMAL)("Flags %X, fps %f",flags,fps);
RENDER_SetSize(width,height,8,pitch,((float)width/(float)height),flags,&VGA_DrawHandler);
vga.draw.blank=(Bitu)(1000000/fps);
PIC_AddEvent(VGA_BlankTimer,vga.draw.blank);

6
src/hardware/vga_attr.cpp
View file

@ -122,10 +122,10 @@ void write_p3c0(Bit32u port,Bit8u val) {
except in 256 color mode.
Note: this register does not affect 256 color modes.
*/
if (val) LOG(LOG_VGAGFX,"VGA:ATTR:DAC index set to %d",val);
if (val) LOG(LOG_VGAGFX,LOG_NORMAL)("VGA:ATTR:DAC index set to %d",val);
break;
default:
LOG(LOG_VGAMISC,"VGA:ATTR:Write to unkown Index %2X",attr(index));
LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:ATTR:Write to unkown Index %2X",attr(index));
break;
}
}
@ -151,7 +151,7 @@ Bit8u read_p3c1(Bit32u port) {
case 0x14: /* Color Select Register */
return attr(color_select);
default:
LOG(LOG_VGAMISC,"VGA:ATTR:Read from unkown Index %2X",attr(index));
LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:ATTR:Read from unkown Index %2X",attr(index));
}
return 0;
};

4
src/hardware/vga_crtc.cpp
View file

@ -274,7 +274,7 @@ void write_p3d5(Bit32u port,Bit8u val) {
break;
default:
LOG(LOG_VGAMISC,"VGA:CRTC:Write to unknown index %2X",val,crtc(index));
LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:CRTC:Write to unknown index %2X",val,crtc(index));
}
}
@ -331,7 +331,7 @@ Bit8u read_p3d5(Bit32u port) {
case 0x18: /* Line Compare Register */
return crtc(line_compare);
default:
LOG(LOG_VGAMISC,"VGA:CRTC:Read from unknown index %X",crtc(index));
LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:CRTC:Read from unknown index %X",crtc(index));
}
return 0;
}

6
src/hardware/vga_dac.cpp
View file

@ -54,7 +54,7 @@ enum {DAC_READ,DAC_WRITE};
static void write_p3c6(Bit32u port,Bit8u val) {
if (val!=0xff) LOG(LOG_VGAGFX,"VGA:Pel Mask not 0xff");
if (val!=0xff) LOG(LOG_VGAGFX,LOG_NORMAL)("VGA:Pel Mask not 0xff");
vga.dac.pel_mask=val;
}
@ -112,7 +112,7 @@ static void write_p3c9(Bit32u port,Bit8u val) {
vga.dac.pel_index=0;
break;
default:
LOG(LOG_VGAGFX,"VGA:DAC:Illegal Pel Index"); //If this can actually happen that will be the day
LOG(LOG_VGAGFX,LOG_NORMAL)("VGA:DAC:Illegal Pel Index"); //If this can actually happen that will be the day
};
}
@ -133,7 +133,7 @@ static Bit8u read_p3c9(Bit32u port) {
vga.dac.pel_index=0;
break;
default:
LOG(LOG_VGAMISC,"VGA:DAC:Illegal Pel Index"); //If this can actually happen that will be the day
LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:DAC:Illegal Pel Index"); //If this can actually happen that will be the day
}
return ret;
}

8
src/hardware/vga_gfx.cpp
View file

@ -70,7 +70,7 @@ void write_p3cf(Bit32u port,Bit8u val) {
case 3: /* Data Rotate */
gfx(data_rotate)=val;
vga.config.data_rotate=val & 7;
if (vga.config.data_rotate) LOG(LOG_VGAGFX,"VGA:Data Rotate used %d",val &7);
if (vga.config.data_rotate) LOG(LOG_VGAGFX,LOG_NORMAL)("VGA:Data Rotate used %d",val &7);
vga.config.raster_op=(val>>3) & 3;
/*
0-2 Number of positions to rotate data right before it is written to
@ -171,12 +171,12 @@ void write_p3cf(Bit32u port,Bit8u val) {
case 9: /* Unknown */
/* Crystal Dreams seems to like to write tothis register very weird */
if (!index9warned) {
LOG(LOG_VGAMISC,"VGA:3CF:Write %2X to illegal index 9",val);
LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:3CF:Write %2X to illegal index 9",val);
index9warned=true;
}
break;
default:
LOG(LOG_VGAMISC,"VGA:3CF:Write %2X to illegal index %2X",val,gfx(index));
LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:3CF:Write %2X to illegal index %2X",val,gfx(index));
break;
}
}
@ -202,7 +202,7 @@ switch (gfx(index)) {
case 8: /* Bit Mask Register */
return gfx(bit_mask);
default:
LOG(LOG_VGAMISC,"Reading from illegal index %2X in port %4X",gfx(index),port);
LOG(LOG_VGAMISC,LOG_NORMAL)("Reading from illegal index %2X in port %4X",static_cast<Bit32u>(gfx(index)),port);
}
return 0; /* Compiler happy */
}

2
src/hardware/vga_memory.cpp
View file

@ -86,7 +86,7 @@ INLINE static Bit32u ModeOperation(Bit8u val) {
full=RasterOp(vga.config.full_set_reset,ExpandTable[val] & vga.config.full_bit_mask);
break;
default:
LOG(LOG_VGAMISC,"VGA:Unsupported write mode %d",vga.config.write_mode);
LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:Unsupported write mode %d",vga.config.write_mode);
}
return full;
}

2
src/hardware/vga_misc.cpp
View file

@ -48,7 +48,7 @@ static Bit8u read_p3da(Bit32u port) {
static void write_p3d8(Bit32u port,Bit8u val) {
LOG(LOG_VGAMISC,"Write %2X to 3da",val);
LOG(LOG_VGAMISC,LOG_NORMAL)("Write %2X to 3da",val);
/*
3 Vertical Sync Select. If set Vertical Sync to the monitor is the
logical OR of the vertical sync and the vertical display enable.

4
src/hardware/vga_seq.cpp
View file

@ -91,7 +91,7 @@ void write_p3c5(Bit32u port,Bit8u val) {
VGA_FindSettings();
break;
default:
LOG(LOG_VGAMISC,"VGA:SEQ:Write to illegal index %2X",seq(index));
LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:SEQ:Write to illegal index %2X",seq(index));
};
};
@ -113,7 +113,7 @@ Bit8u read_p3c5(Bit32u port) {
case 4: /* Memory Mode */
return seq(memory_mode);
default:
LOG(LOG_VGAMISC,"VGA:SEQ:Read from illegal index %2X",seq(index));
LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:SEQ:Read from illegal index %2X",seq(index));
};
return 0;
};