diff --git a/include/paging.h b/include/paging.h index e0b53d69..1faabb9e 100644 --- a/include/paging.h +++ b/include/paging.h @@ -16,7 +16,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* $Id: paging.h,v 1.25 2007-06-12 20:22:07 c2woody Exp $ */ +/* $Id: paging.h,v 1.26 2007-09-29 13:23:59 c2woody Exp $ */ #ifndef DOSBOX_PAGING_H #define DOSBOX_PAGING_H @@ -169,10 +169,10 @@ Bit32u mem_unalignedreadd(PhysPt address); void mem_unalignedwritew(PhysPt address,Bit16u val); void mem_unalignedwrited(PhysPt address,Bit32u val); -bool mem_unalignedreadw_checked_x86(PhysPt address,Bit16u * val); -bool mem_unalignedreadd_checked_x86(PhysPt address,Bit32u * val); -bool mem_unalignedwritew_checked_x86(PhysPt address,Bit16u val); -bool mem_unalignedwrited_checked_x86(PhysPt address,Bit32u val); +bool mem_unalignedreadw_checked(PhysPt address,Bit16u * val); +bool mem_unalignedreadd_checked(PhysPt address,Bit32u * val); +bool mem_unalignedwritew_checked(PhysPt address,Bit16u val); +bool mem_unalignedwrited_checked(PhysPt address,Bit32u val); /* Special inlined memory reading/writing */ @@ -183,7 +183,7 @@ INLINE Bit8u mem_readb_inline(PhysPt address) { } INLINE Bit16u mem_readw_inline(PhysPt address) { - if (!(address & 1)) { + if ((address & 0xfff)<0xfff) { Bitu index=(address>>12); if (paging.tlb.read[index]) return host_readw(paging.tlb.read[index]+address); @@ -192,7 +192,7 @@ INLINE Bit16u mem_readw_inline(PhysPt address) { } INLINE Bit32u mem_readd_inline(PhysPt address) { - if (!(address & 3)) { + if ((address & 0xfff)<0xffd) { Bitu index=(address>>12); if (paging.tlb.read[index]) return host_readd(paging.tlb.read[index]+address); @@ -208,7 +208,7 @@ INLINE void mem_writeb_inline(PhysPt address,Bit8u val) { } INLINE void mem_writew_inline(PhysPt address,Bit16u val) { - if (!(address & 1)) { + if ((address & 0xfff)<0xfff) { Bitu index=(address>>12); if (paging.tlb.write[index]) host_writew(paging.tlb.write[index]+address,val); @@ -217,43 +217,6 @@ INLINE void mem_writew_inline(PhysPt address,Bit16u val) { } INLINE void mem_writed_inline(PhysPt address,Bit32u val) { - if (!(address & 3)) { - Bitu index=(address>>12); - - if (paging.tlb.write[index]) host_writed(paging.tlb.write[index]+address,val); - else paging.tlb.handler[index]->writed(address,val); - } else mem_unalignedwrited(address,val); -} - - -INLINE Bit16u mem_readw_dyncorex86(PhysPt address) { - if ((address & 0xfff)<0xfff) { - Bitu index=(address>>12); - - if (paging.tlb.read[index]) return host_readw(paging.tlb.read[index]+address); - else return (Bit16u)paging.tlb.handler[index]->readw(address); - } else return mem_unalignedreadw(address); -} - -INLINE Bit32u mem_readd_dyncorex86(PhysPt address) { - if ((address & 0xfff)<0xffd) { - Bitu index=(address>>12); - - if (paging.tlb.read[index]) return host_readd(paging.tlb.read[index]+address); - else return paging.tlb.handler[index]->readd(address); - } else return mem_unalignedreadd(address); -} - -INLINE void mem_writew_dyncorex86(PhysPt address,Bit16u val) { - if ((address & 0xfff)<0xfff) { - Bitu index=(address>>12); - - if (paging.tlb.write[index]) host_writew(paging.tlb.write[index]+address,val); - else paging.tlb.handler[index]->writew(address,val); - } else mem_unalignedwritew(address,val); -} - -INLINE void mem_writed_dyncorex86(PhysPt address,Bit32u val) { if ((address & 0xfff)<0xffd) { Bitu index=(address>>12); @@ -263,7 +226,7 @@ INLINE void mem_writed_dyncorex86(PhysPt address,Bit32u val) { } -INLINE bool mem_readb_checked_x86(PhysPt address, Bit8u * val) { +INLINE bool mem_readb_checked(PhysPt address, Bit8u * val) { Bitu index=(address>>12); if (paging.tlb.read[index]) { *val=host_readb(paging.tlb.read[index]+address); @@ -277,7 +240,7 @@ INLINE bool mem_readb_checked_x86(PhysPt address, Bit8u * val) { } } -INLINE bool mem_readw_checked_x86(PhysPt address, Bit16u * val) { +INLINE bool mem_readw_checked(PhysPt address, Bit16u * val) { if ((address & 0xfff)<0xfff) { Bitu index=(address>>12); if (paging.tlb.read[index]) { @@ -290,11 +253,10 @@ INLINE bool mem_readw_checked_x86(PhysPt address, Bit16u * val) { *val=(Bit16u)uval; return retval; } - } else return mem_unalignedreadw_checked_x86(address, val); + } else return mem_unalignedreadw_checked(address, val); } - -INLINE bool mem_readd_checked_x86(PhysPt address, Bit32u * val) { +INLINE bool mem_readd_checked(PhysPt address, Bit32u * val) { if ((address & 0xfff)<0xffd) { Bitu index=(address>>12); if (paging.tlb.read[index]) { @@ -307,10 +269,10 @@ INLINE bool mem_readd_checked_x86(PhysPt address, Bit32u * val) { *val=(Bit32u)uval; return retval; } - } else return mem_unalignedreadd_checked_x86(address, val); + } else return mem_unalignedreadd_checked(address, val); } -INLINE bool mem_writeb_checked_x86(PhysPt address,Bit8u val) { +INLINE bool mem_writeb_checked(PhysPt address,Bit8u val) { Bitu index=(address>>12); if (paging.tlb.write[index]) { host_writeb(paging.tlb.write[index]+address,val); @@ -318,24 +280,24 @@ INLINE bool mem_writeb_checked_x86(PhysPt address,Bit8u val) { } else return paging.tlb.handler[index]->writeb_checked(address,val); } -INLINE bool mem_writew_checked_x86(PhysPt address,Bit16u val) { +INLINE bool mem_writew_checked(PhysPt address,Bit16u val) { if ((address & 0xfff)<0xfff) { Bitu index=(address>>12); if (paging.tlb.write[index]) { host_writew(paging.tlb.write[index]+address,val); return false; } else return paging.tlb.handler[index]->writew_checked(address,val); - } else return mem_unalignedwritew_checked_x86(address,val); + } else return mem_unalignedwritew_checked(address,val); } -INLINE bool mem_writed_checked_x86(PhysPt address,Bit32u val) { +INLINE bool mem_writed_checked(PhysPt address,Bit32u val) { if ((address & 0xfff)<0xffd) { Bitu index=(address>>12); if (paging.tlb.write[index]) { host_writed(paging.tlb.write[index]+address,val); return false; } else return paging.tlb.handler[index]->writed_checked(address,val); - } else return mem_unalignedwrited_checked_x86(address,val); + } else return mem_unalignedwrited_checked(address,val); } diff --git a/src/cpu/core_dyn_x86/decoder.h b/src/cpu/core_dyn_x86/decoder.h index d9456f4f..e36b27b5 100644 --- a/src/cpu/core_dyn_x86/decoder.h +++ b/src/cpu/core_dyn_x86/decoder.h @@ -53,7 +53,7 @@ static struct DynDecode { static bool MakeCodePage(Bitu lin_addr,CodePageHandler * &cph) { Bit8u rdval; //Ensure page contains memory: - if (GCC_UNLIKELY(mem_readb_checked_x86(lin_addr,&rdval))) return true; + if (GCC_UNLIKELY(mem_readb_checked(lin_addr,&rdval))) return true; Bitu lin_page=lin_addr >> 12; PageHandler * handler=paging.tlb.handler[lin_page]; if (handler->flags & PFLAG_HASCODE) { @@ -386,52 +386,52 @@ static void dyn_fill_blocks(void) { #if !defined(X86_INLINED_MEMACCESS) static void dyn_read_byte(DynReg * addr,DynReg * dst,Bitu high) { gen_protectflags(); - gen_call_function((void *)&mem_readb_checked_x86,"%Dd%Id",addr,&core_dyn.readdata); + gen_call_function((void *)&mem_readb_checked,"%Dd%Id",addr,&core_dyn.readdata); dyn_check_bool_exception_al(); gen_mov_host(&core_dyn.readdata,dst,1,high); } static void dyn_write_byte(DynReg * addr,DynReg * val,Bitu high) { gen_protectflags(); - if (high) gen_call_function((void *)&mem_writeb_checked_x86,"%Dd%Dh",addr,val); - else gen_call_function((void *)&mem_writeb_checked_x86,"%Dd%Dd",addr,val); + if (high) gen_call_function((void *)&mem_writeb_checked,"%Dd%Dh",addr,val); + else gen_call_function((void *)&mem_writeb_checked,"%Dd%Dd",addr,val); dyn_check_bool_exception_al(); } static void dyn_read_word(DynReg * addr,DynReg * dst,bool dword) { gen_protectflags(); - if (dword) gen_call_function((void *)&mem_readd_checked_x86,"%Dd%Id",addr,&core_dyn.readdata); - else gen_call_function((void *)&mem_readw_checked_x86,"%Dd%Id",addr,&core_dyn.readdata); + if (dword) gen_call_function((void *)&mem_readd_checked,"%Dd%Id",addr,&core_dyn.readdata); + else gen_call_function((void *)&mem_readw_checked,"%Dd%Id",addr,&core_dyn.readdata); dyn_check_bool_exception_al(); gen_mov_host(&core_dyn.readdata,dst,dword?4:2); } static void dyn_write_word(DynReg * addr,DynReg * val,bool dword) { gen_protectflags(); - if (dword) gen_call_function((void *)&mem_writed_checked_x86,"%Dd%Dd",addr,val); - else gen_call_function((void *)&mem_writew_checked_x86,"%Dd%Dd",addr,val); + if (dword) gen_call_function((void *)&mem_writed_checked,"%Dd%Dd",addr,val); + else gen_call_function((void *)&mem_writew_checked,"%Dd%Dd",addr,val); dyn_check_bool_exception_al(); } static void dyn_read_byte_release(DynReg * addr,DynReg * dst,Bitu high) { gen_protectflags(); - gen_call_function((void *)&mem_readb_checked_x86,"%Ddr%Id",addr,&core_dyn.readdata); + gen_call_function((void *)&mem_readb_checked,"%Ddr%Id",addr,&core_dyn.readdata); dyn_check_bool_exception_al(); gen_mov_host(&core_dyn.readdata,dst,1,high); } static void dyn_write_byte_release(DynReg * addr,DynReg * val,Bitu high) { gen_protectflags(); - if (high) gen_call_function((void *)&mem_writeb_checked_x86,"%Ddr%Dh",addr,val); - else gen_call_function((void *)&mem_writeb_checked_x86,"%Ddr%Dd",addr,val); + if (high) gen_call_function((void *)&mem_writeb_checked,"%Ddr%Dh",addr,val); + else gen_call_function((void *)&mem_writeb_checked,"%Ddr%Dd",addr,val); dyn_check_bool_exception_al(); } static void dyn_read_word_release(DynReg * addr,DynReg * dst,bool dword) { gen_protectflags(); - if (dword) gen_call_function((void *)&mem_readd_checked_x86,"%Ddr%Id",addr,&core_dyn.readdata); - else gen_call_function((void *)&mem_readw_checked_x86,"%Ddr%Id",addr,&core_dyn.readdata); + if (dword) gen_call_function((void *)&mem_readd_checked,"%Ddr%Id",addr,&core_dyn.readdata); + else gen_call_function((void *)&mem_readw_checked,"%Ddr%Id",addr,&core_dyn.readdata); dyn_check_bool_exception_al(); gen_mov_host(&core_dyn.readdata,dst,dword?4:2); } static void dyn_write_word_release(DynReg * addr,DynReg * val,bool dword) { gen_protectflags(); - if (dword) gen_call_function((void *)&mem_writed_checked_x86,"%Ddr%Dd",addr,val); - else gen_call_function((void *)&mem_writew_checked_x86,"%Ddr%Dd",addr,val); + if (dword) gen_call_function((void *)&mem_writed_checked,"%Ddr%Dd",addr,val); + else gen_call_function((void *)&mem_writew_checked,"%Ddr%Dd",addr,val); dyn_check_bool_exception_al(); } @@ -559,7 +559,7 @@ bool mem_readd_checked_x86x(PhysPt address) { core_dyn.readdata=(Bit32u)uval; return retval; } - } else return mem_unalignedreadd_checked_x86(address, &core_dyn.readdata); + } else return mem_unalignedreadd_checked(address, &core_dyn.readdata); } static void dyn_read_word(DynReg * addr,DynReg * dst,bool dword) { @@ -602,7 +602,7 @@ static void dyn_read_word(DynReg * addr,DynReg * dst,bool dword) { gen_fill_jump(jmp_loc); } else { gen_protectflags(); - gen_call_function((void *)&mem_readw_checked_x86,"%Dd%Id",addr,&core_dyn.readdata); + gen_call_function((void *)&mem_readw_checked,"%Dd%Id",addr,&core_dyn.readdata); dyn_check_bool_exception_al(); gen_mov_host(&core_dyn.readdata,dst,2); } @@ -648,7 +648,7 @@ static void dyn_read_word_release(DynReg * addr,DynReg * dst,bool dword) { gen_fill_jump(jmp_loc); } else { gen_protectflags(); - gen_call_function((void *)&mem_readw_checked_x86,"%Ddr%Id",addr,&core_dyn.readdata); + gen_call_function((void *)&mem_readw_checked,"%Ddr%Id",addr,&core_dyn.readdata); dyn_check_bool_exception_al(); gen_mov_host(&core_dyn.readdata,dst,2); } @@ -709,7 +709,7 @@ static void dyn_write_byte(DynReg * addr,DynReg * val,bool high) { cache_addb(0x50); // push eax if (GCC_UNLIKELY(high)) cache_addw(0xe086+((genreg->index+(genreg->index<<3))<<8)); cache_addb(0xe8); - cache_addd(((Bit32u)&mem_writeb_checked_x86) - (Bit32u)cache.pos-4); + cache_addd(((Bit32u)&mem_writeb_checked) - (Bit32u)cache.pos-4); cache_addw(0xc483); // add esp,8 cache_addb(0x08); cache_addw(0x012c); // sub al,1 @@ -748,7 +748,7 @@ static void dyn_write_byte_release(DynReg * addr,DynReg * val,bool high) { cache_addb(0x50); // push eax if (GCC_UNLIKELY(high)) cache_addw(0xe086+((genreg->index+(genreg->index<<3))<<8)); cache_addb(0xe8); - cache_addd(((Bit32u)&mem_writeb_checked_x86) - (Bit32u)cache.pos-4); + cache_addd(((Bit32u)&mem_writeb_checked) - (Bit32u)cache.pos-4); cache_addw(0xc483); // add esp,8 cache_addb(0x08); cache_addw(0x012c); // sub al,1 @@ -792,7 +792,7 @@ static void dyn_write_word(DynReg * addr,DynReg * val,bool dword) { cache_addb(0x50+genreg->index); cache_addb(0x50); // push eax cache_addb(0xe8); - cache_addd(((Bit32u)&mem_writed_checked_x86) - (Bit32u)cache.pos-4); + cache_addd(((Bit32u)&mem_writed_checked) - (Bit32u)cache.pos-4); cache_addw(0xc483); // add esp,8 cache_addb(0x08); cache_addw(0x012c); // sub al,1 @@ -807,7 +807,7 @@ static void dyn_write_word(DynReg * addr,DynReg * val,bool dword) { gen_fill_jump(jmp_loc); } else { gen_protectflags(); - gen_call_function((void *)&mem_writew_checked_x86,"%Dd%Dd",addr,val); + gen_call_function((void *)&mem_writew_checked,"%Dd%Dd",addr,val); dyn_check_bool_exception_al(); } } @@ -841,7 +841,7 @@ static void dyn_write_word_release(DynReg * addr,DynReg * val,bool dword) { cache_addb(0x50+genreg->index); cache_addb(0x50); // push eax cache_addb(0xe8); - cache_addd(((Bit32u)&mem_writed_checked_x86) - (Bit32u)cache.pos-4); + cache_addd(((Bit32u)&mem_writed_checked) - (Bit32u)cache.pos-4); cache_addw(0xc483); // add esp,8 cache_addb(0x08); cache_addw(0x012c); // sub al,1 @@ -856,7 +856,7 @@ static void dyn_write_word_release(DynReg * addr,DynReg * val,bool dword) { gen_fill_jump(jmp_loc); } else { gen_protectflags(); - gen_call_function((void *)&mem_writew_checked_x86,"%Ddr%Dd",addr,val); + gen_call_function((void *)&mem_writew_checked,"%Ddr%Dd",addr,val); dyn_check_bool_exception_al(); } } @@ -888,10 +888,10 @@ static void dyn_push(DynReg * dynreg) { gen_dop_word(DOP_OR,true,DREG(NEWESP),DREG(STACK)); gen_dop_word(DOP_ADD,true,DREG(STACK),DREG(SS)); if (decode.big_op) { - gen_call_function((void *)&mem_writed_checked_x86,"%Drd%Dd",DREG(STACK),dynreg); + gen_call_function((void *)&mem_writed_checked,"%Drd%Dd",DREG(STACK),dynreg); } else { //Can just push the whole 32-bit word as operand - gen_call_function((void *)&mem_writew_checked_x86,"%Drd%Dd",DREG(STACK),dynreg); + gen_call_function((void *)&mem_writew_checked,"%Drd%Dd",DREG(STACK),dynreg); } dyn_check_bool_exception_al(); /* everything was ok, change register now */ @@ -906,9 +906,9 @@ static void dyn_pop(DynReg * dynreg,bool checked=true) { gen_dop_word(DOP_ADD,true,DREG(STACK),DREG(SS)); if (checked) { if (decode.big_op) { - gen_call_function((void *)&mem_readd_checked_x86,"%Drd%Id",DREG(STACK),&core_dyn.readdata); + gen_call_function((void *)&mem_readd_checked,"%Drd%Id",DREG(STACK),&core_dyn.readdata); } else { - gen_call_function((void *)&mem_readw_checked_x86,"%Drd%Id",DREG(STACK),&core_dyn.readdata); + gen_call_function((void *)&mem_readw_checked,"%Drd%Id",DREG(STACK),&core_dyn.readdata); } dyn_check_bool_exception_al(); gen_mov_host(&core_dyn.readdata,dynreg,decode.big_op?4:2); @@ -1654,8 +1654,8 @@ static void dyn_pop_ev(void) { if (decode.modrm.mod<3) { dyn_fill_ea(); // dyn_write_word_release(DREG(EA),DREG(TMPW),decode.big_op); - if (decode.big_op) gen_call_function((void *)&mem_writed_dyncorex86,"%Ddr%Dd",DREG(EA),DREG(TMPW)); - else gen_call_function((void *)&mem_writew_dyncorex86,"%Ddr%Dd",DREG(EA),DREG(TMPW)); + if (decode.big_op) gen_call_function((void *)&mem_writed_inline,"%Ddr%Dd",DREG(EA),DREG(TMPW)); + else gen_call_function((void *)&mem_writew_inline,"%Ddr%Dd",DREG(EA),DREG(TMPW)); } else { gen_dop_word(DOP_MOV,decode.big_op,&DynRegs[decode.modrm.rm],DREG(TMPW)); } diff --git a/src/cpu/core_dyn_x86/dyn_fpu_dh.h b/src/cpu/core_dyn_x86/dyn_fpu_dh.h index a769e3dc..5a6ca5f7 100644 --- a/src/cpu/core_dyn_x86/dyn_fpu_dh.h +++ b/src/cpu/core_dyn_x86/dyn_fpu_dh.h @@ -16,47 +16,47 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* $Id: dyn_fpu_dh.h,v 1.4 2007-06-14 17:47:24 c2woody Exp $ */ +/* $Id: dyn_fpu_dh.h,v 1.5 2007-09-29 13:23:59 c2woody Exp $ */ #include "dosbox.h" #if C_FPU static void FPU_FLD_16(PhysPt addr) { - dyn_dh_fpu.temp.m1 = (Bit32u)mem_readw_dyncorex86(addr); + dyn_dh_fpu.temp.m1 = (Bit32u)mem_readw(addr); } static void FPU_FST_16(PhysPt addr) { - mem_writew_dyncorex86(addr,(Bit16u)dyn_dh_fpu.temp.m1); + mem_writew(addr,(Bit16u)dyn_dh_fpu.temp.m1); } static void FPU_FLD_32(PhysPt addr) { - dyn_dh_fpu.temp.m1 = mem_readd_dyncorex86(addr); + dyn_dh_fpu.temp.m1 = mem_readd(addr); } static void FPU_FST_32(PhysPt addr) { - mem_writed_dyncorex86(addr,dyn_dh_fpu.temp.m1); + mem_writed(addr,dyn_dh_fpu.temp.m1); } static void FPU_FLD_64(PhysPt addr) { - dyn_dh_fpu.temp.m1 = mem_readd_dyncorex86(addr); - dyn_dh_fpu.temp.m2 = mem_readd_dyncorex86(addr+4); + dyn_dh_fpu.temp.m1 = mem_readd(addr); + dyn_dh_fpu.temp.m2 = mem_readd(addr+4); } static void FPU_FST_64(PhysPt addr) { - mem_writed_dyncorex86(addr,dyn_dh_fpu.temp.m1); - mem_writed_dyncorex86(addr+4,dyn_dh_fpu.temp.m2); + mem_writed(addr,dyn_dh_fpu.temp.m1); + mem_writed(addr+4,dyn_dh_fpu.temp.m2); } static void FPU_FLD_80(PhysPt addr) { - dyn_dh_fpu.temp.m1 = mem_readd_dyncorex86(addr); - dyn_dh_fpu.temp.m2 = mem_readd_dyncorex86(addr+4); - dyn_dh_fpu.temp.m3 = mem_readw_dyncorex86(addr+8); + dyn_dh_fpu.temp.m1 = mem_readd(addr); + dyn_dh_fpu.temp.m2 = mem_readd(addr+4); + dyn_dh_fpu.temp.m3 = mem_readw(addr+8); } static void FPU_FST_80(PhysPt addr) { - mem_writed_dyncorex86(addr,dyn_dh_fpu.temp.m1); - mem_writed_dyncorex86(addr+4,dyn_dh_fpu.temp.m2); - mem_writew_dyncorex86(addr+8,dyn_dh_fpu.temp.m3); + mem_writed(addr,dyn_dh_fpu.temp.m1); + mem_writed(addr+4,dyn_dh_fpu.temp.m2); + mem_writew(addr+8,dyn_dh_fpu.temp.m3); } static void FPU_FLDCW_DH(PhysPt addr){ @@ -74,35 +74,35 @@ static void FPU_FNINIT_DH(void){ static void FPU_FSTENV_DH(PhysPt addr){ if(!cpu.code.big) { - mem_writew_dyncorex86(addr+0,(Bit16u)dyn_dh_fpu.cw); - mem_writew_dyncorex86(addr+2,(Bit16u)dyn_dh_fpu.temp.m2); - mem_writew_dyncorex86(addr+4,dyn_dh_fpu.temp.m3); + mem_writew(addr+0,(Bit16u)dyn_dh_fpu.cw); + mem_writew(addr+2,(Bit16u)dyn_dh_fpu.temp.m2); + mem_writew(addr+4,dyn_dh_fpu.temp.m3); } else { - mem_writed_dyncorex86(addr+0,dyn_dh_fpu.temp.m1); - mem_writew_dyncorex86(addr+0,(Bit16u)dyn_dh_fpu.cw); - mem_writed_dyncorex86(addr+4,dyn_dh_fpu.temp.m2); - mem_writed_dyncorex86(addr+8,dyn_dh_fpu.temp.m3); + mem_writed(addr+0,dyn_dh_fpu.temp.m1); + mem_writew(addr+0,(Bit16u)dyn_dh_fpu.cw); + mem_writed(addr+4,dyn_dh_fpu.temp.m2); + mem_writed(addr+8,dyn_dh_fpu.temp.m3); } } static void FPU_FLDENV_DH(PhysPt addr){ if(!cpu.code.big) { - dyn_dh_fpu.cw = (Bit32u)mem_readw_dyncorex86(addr); + dyn_dh_fpu.cw = (Bit32u)mem_readw(addr); dyn_dh_fpu.temp.m1 = dyn_dh_fpu.cw|0x3f; - dyn_dh_fpu.temp.m2 = (Bit32u)mem_readw_dyncorex86(addr+2); - dyn_dh_fpu.temp.m3 = mem_readw_dyncorex86(addr+4); + dyn_dh_fpu.temp.m2 = (Bit32u)mem_readw(addr+2); + dyn_dh_fpu.temp.m3 = mem_readw(addr+4); } else { - dyn_dh_fpu.cw = (Bit32u)mem_readw_dyncorex86(addr); - dyn_dh_fpu.temp.m1 = mem_readd_dyncorex86(addr)|0x3f; - dyn_dh_fpu.temp.m2 = mem_readd_dyncorex86(addr+4); - dyn_dh_fpu.temp.m3 = mem_readw_dyncorex86(addr+8); - dyn_dh_fpu.temp.d1 = mem_readw_dyncorex86(addr+10); + dyn_dh_fpu.cw = (Bit32u)mem_readw(addr); + dyn_dh_fpu.temp.m1 = mem_readd(addr)|0x3f; + dyn_dh_fpu.temp.m2 = mem_readd(addr+4); + dyn_dh_fpu.temp.m3 = mem_readw(addr+8); + dyn_dh_fpu.temp.d1 = mem_readw(addr+10); } } static void FPU_FSAVE_DH(PhysPt addr){ if (!cpu.code.big) { - mem_writew_dyncorex86(addr,(Bit16u)dyn_dh_fpu.cw); + mem_writew(addr,(Bit16u)dyn_dh_fpu.cw); addr+=2; mem_writeb(addr++,dyn_dh_fpu.temp_state[0x04]); mem_writeb(addr++,dyn_dh_fpu.temp_state[0x05]); @@ -118,7 +118,7 @@ static void FPU_FSAVE_DH(PhysPt addr){ mem_writeb(addr++,dyn_dh_fpu.temp_state[0x19]); for(Bitu i=28;i<108;i++) mem_writeb(addr++,dyn_dh_fpu.temp_state[i]); } else { - mem_writew_dyncorex86(addr,(Bit16u)dyn_dh_fpu.cw); + mem_writew(addr,(Bit16u)dyn_dh_fpu.cw); addr+=2; for(Bitu i=2;i<108;i++) mem_writeb(addr++,dyn_dh_fpu.temp_state[i]); } @@ -126,7 +126,7 @@ static void FPU_FSAVE_DH(PhysPt addr){ static void FPU_FRSTOR_DH(PhysPt addr){ if (!cpu.code.big) { - dyn_dh_fpu.cw = (Bit32u)mem_readw_dyncorex86(addr); + dyn_dh_fpu.cw = (Bit32u)mem_readw(addr); dyn_dh_fpu.temp_state[0x00] = mem_readb(addr++)|0x3f; dyn_dh_fpu.temp_state[0x01] = mem_readb(addr++); dyn_dh_fpu.temp_state[0x04] = mem_readb(addr++); @@ -143,7 +143,7 @@ static void FPU_FRSTOR_DH(PhysPt addr){ dyn_dh_fpu.temp_state[0x19] = mem_readb(addr++); for(Bitu i=28;i<108;i++) dyn_dh_fpu.temp_state[i] = mem_readb(addr++); } else { - dyn_dh_fpu.cw = (Bit32u)mem_readw_dyncorex86(addr); + dyn_dh_fpu.cw = (Bit32u)mem_readw(addr); for(Bitu i=0;i<108;i++) dyn_dh_fpu.temp_state[i] = mem_readb(addr++); dyn_dh_fpu.temp_state[0]|=0x3f; } diff --git a/src/cpu/core_dyn_x86/risc_x86.h b/src/cpu/core_dyn_x86/risc_x86.h index 08ea139e..709cf6b6 100644 --- a/src/cpu/core_dyn_x86/risc_x86.h +++ b/src/cpu/core_dyn_x86/risc_x86.h @@ -925,9 +925,9 @@ static void gen_call_write(DynReg * dr,Bit32u val,Bitu write_size) { /* Do the actual call to the procedure */ cache_addb(0xe8); switch (write_size) { - case 1: cache_addd((Bit32u)mem_writeb_checked_x86 - (Bit32u)cache.pos-4); break; - case 2: cache_addd((Bit32u)mem_writew_checked_x86 - (Bit32u)cache.pos-4); break; - case 4: cache_addd((Bit32u)mem_writed_checked_x86 - (Bit32u)cache.pos-4); break; + case 1: cache_addd((Bit32u)mem_writeb_checked - (Bit32u)cache.pos-4); break; + case 2: cache_addd((Bit32u)mem_writew_checked - (Bit32u)cache.pos-4); break; + case 4: cache_addd((Bit32u)mem_writed_checked - (Bit32u)cache.pos-4); break; default: IllegalOption("gen_call_write"); } diff --git a/src/cpu/core_dynrec/decoder_basic.h b/src/cpu/core_dynrec/decoder_basic.h index b8f515bb..198c4124 100644 --- a/src/cpu/core_dynrec/decoder_basic.h +++ b/src/cpu/core_dynrec/decoder_basic.h @@ -130,7 +130,7 @@ static struct DynDecode { static bool MakeCodePage(Bitu lin_addr,CodePageHandlerDynRec * &cph) { Bit8u rdval; //Ensure page contains memory: - if (GCC_UNLIKELY(mem_readb_checked_x86(lin_addr,&rdval))) return true; + if (GCC_UNLIKELY(mem_readb_checked(lin_addr,&rdval))) return true; Bitu lin_page=lin_addr >> 12; @@ -589,12 +589,8 @@ bool DRC_CALL_CONV mem_writeb_checked_drc(PhysPt address,Bit8u val) { bool DRC_CALL_CONV mem_readw_checked_drc(PhysPt address) DRC_FC; bool DRC_CALL_CONV mem_readw_checked_drc(PhysPt address) { -#if defined(WORDS_BIGENDIAN) || !defined(C_UNALIGNED_MEMORY) - if (!(address & 1)) { -#else if ((address & 0xfff)<0xfff) { -#endif - Bitu index=(address>>12); + Bitu index=(address>>12); if (paging.tlb.read[index]) { *((Bit16u*)(&core_dynrec.readdata))=host_readw(paging.tlb.read[index]+address); return false; @@ -605,16 +601,12 @@ bool DRC_CALL_CONV mem_readw_checked_drc(PhysPt address) { *((Bit16u*)(&core_dynrec.readdata))=(Bit16u)uval; return retval; } - } else return mem_unalignedreadw_checked_x86(address, ((Bit16u*)(&core_dynrec.readdata))); + } else return mem_unalignedreadw_checked(address, ((Bit16u*)(&core_dynrec.readdata))); } bool DRC_CALL_CONV mem_readd_checked_drc(PhysPt address) DRC_FC; bool DRC_CALL_CONV mem_readd_checked_drc(PhysPt address) { -#if defined(WORDS_BIGENDIAN) || !defined(C_UNALIGNED_MEMORY) - if (!(address & 3)) { -#else if ((address & 0xfff)<0xffd) { -#endif Bitu index=(address>>12); if (paging.tlb.read[index]) { *((Bit32u*)(&core_dynrec.readdata))=host_readd(paging.tlb.read[index]+address); @@ -626,37 +618,29 @@ bool DRC_CALL_CONV mem_readd_checked_drc(PhysPt address) { *((Bit32u*)(&core_dynrec.readdata))=(Bit32u)uval; return retval; } - } else return mem_unalignedreadd_checked_x86(address, ((Bit32u*)(&core_dynrec.readdata))); + } else return mem_unalignedreadd_checked(address, ((Bit32u*)(&core_dynrec.readdata))); } bool DRC_CALL_CONV mem_writew_checked_drc(PhysPt address,Bit16u val) DRC_FC; bool DRC_CALL_CONV mem_writew_checked_drc(PhysPt address,Bit16u val) { -#if defined(WORDS_BIGENDIAN) || !defined(C_UNALIGNED_MEMORY) - if (!(address & 1)) { -#else if ((address & 0xfff)<0xfff) { -#endif Bitu index=(address>>12); if (paging.tlb.write[index]) { host_writew(paging.tlb.write[index]+address,val); return false; } else return paging.tlb.handler[index]->writew_checked(address,val); - } else return mem_unalignedwritew_checked_x86(address,val); + } else return mem_unalignedwritew_checked(address,val); } bool DRC_CALL_CONV mem_writed_checked_drc(PhysPt address,Bit32u val) DRC_FC; bool DRC_CALL_CONV mem_writed_checked_drc(PhysPt address,Bit32u val) { -#if defined(WORDS_BIGENDIAN) || !defined(C_UNALIGNED_MEMORY) - if (!(address & 3)) { -#else if ((address & 0xfff)<0xffd) { -#endif Bitu index=(address>>12); if (paging.tlb.write[index]) { host_writed(paging.tlb.write[index]+address,val); return false; } else return paging.tlb.handler[index]->writed_checked(address,val); - } else return mem_unalignedwrited_checked_x86(address,val); + } else return mem_unalignedwrited_checked(address,val); } diff --git a/src/hardware/memory.cpp b/src/hardware/memory.cpp index b0769130..99eb482e 100644 --- a/src/hardware/memory.cpp +++ b/src/hardware/memory.cpp @@ -16,7 +16,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* $Id: memory.cpp,v 1.51 2007-07-19 18:58:39 c2woody Exp $ */ +/* $Id: memory.cpp,v 1.52 2007-09-29 13:23:59 c2woody Exp $ */ #include "dosbox.h" #include "mem.h" @@ -447,35 +447,35 @@ void mem_unalignedwrited(PhysPt address,Bit32u val) { } -bool mem_unalignedreadw_checked_x86(PhysPt address, Bit16u * val) { +bool mem_unalignedreadw_checked(PhysPt address, Bit16u * val) { Bit8u rval1,rval2; - if (mem_readb_checked_x86(address+0, &rval1)) return true; - if (mem_readb_checked_x86(address+1, &rval2)) return true; + if (mem_readb_checked(address+0, &rval1)) return true; + if (mem_readb_checked(address+1, &rval2)) return true; *val=(Bit16u)(((Bit8u)rval1) | (((Bit8u)rval2) << 8)); return false; } -bool mem_unalignedreadd_checked_x86(PhysPt address, Bit32u * val) { +bool mem_unalignedreadd_checked(PhysPt address, Bit32u * val) { Bit8u rval1,rval2,rval3,rval4; - if (mem_readb_checked_x86(address+0, &rval1)) return true; - if (mem_readb_checked_x86(address+1, &rval2)) return true; - if (mem_readb_checked_x86(address+2, &rval3)) return true; - if (mem_readb_checked_x86(address+3, &rval4)) return true; + if (mem_readb_checked(address+0, &rval1)) return true; + if (mem_readb_checked(address+1, &rval2)) return true; + if (mem_readb_checked(address+2, &rval3)) return true; + if (mem_readb_checked(address+3, &rval4)) return true; *val=(Bit32u)(((Bit8u)rval1) | (((Bit8u)rval2) << 8) | (((Bit8u)rval3) << 16) | (((Bit8u)rval4) << 24)); return false; } -bool mem_unalignedwritew_checked_x86(PhysPt address,Bit16u val) { - if (mem_writeb_checked_x86(address,(Bit8u)(val & 0xff))) return true;val>>=8; - if (mem_writeb_checked_x86(address+1,(Bit8u)(val & 0xff))) return true; +bool mem_unalignedwritew_checked(PhysPt address,Bit16u val) { + if (mem_writeb_checked(address,(Bit8u)(val & 0xff))) return true;val>>=8; + if (mem_writeb_checked(address+1,(Bit8u)(val & 0xff))) return true; return false; } -bool mem_unalignedwrited_checked_x86(PhysPt address,Bit32u val) { - if (mem_writeb_checked_x86(address,(Bit8u)(val & 0xff))) return true;val>>=8; - if (mem_writeb_checked_x86(address+1,(Bit8u)(val & 0xff))) return true;val>>=8; - if (mem_writeb_checked_x86(address+2,(Bit8u)(val & 0xff))) return true;val>>=8; - if (mem_writeb_checked_x86(address+3,(Bit8u)(val & 0xff))) return true; +bool mem_unalignedwrited_checked(PhysPt address,Bit32u val) { + if (mem_writeb_checked(address,(Bit8u)(val & 0xff))) return true;val>>=8; + if (mem_writeb_checked(address+1,(Bit8u)(val & 0xff))) return true;val>>=8; + if (mem_writeb_checked(address+2,(Bit8u)(val & 0xff))) return true;val>>=8; + if (mem_writeb_checked(address+3,(Bit8u)(val & 0xff))) return true; return false; }