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Fix small jumps forcing eip to 16bit in 32bit mode

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Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@1630
This commit is contained in:
Sjoerd van der Berg 2004-01-31 09:17:03 +00:00
parent 5993407d53
commit dc174a4897
5 changed files with 112 additions and 70 deletions
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34
src/cpu/core_normal/prefix_0f.h
View file

@ -154,7 +154,7 @@
Bitu which=(rm >> 3) & 7;
if (rm >= 0xc0 ) {
GetEArd;
if (!CPU_SET_CRX(which,*eard)) goto decode_end;
CPU_SET_CRX(which,*eard);
} else {
GetEAa;
LOG(LOG_CPU,LOG_ERROR)("MOV CR%,XXX with non-register",which);
@ -174,37 +174,37 @@
}
break;
CASE_0F_W(0x80) /* JO */
JumpSIw(TFLG_O);break;
JumpCond16_w(TFLG_O);break;
CASE_0F_W(0x81) /* JNO */
JumpSIw(TFLG_NO);break;
JumpCond16_w(TFLG_NO);break;
CASE_0F_W(0x82) /* JB */
JumpSIw(TFLG_B);break;
JumpCond16_w(TFLG_B);break;
CASE_0F_W(0x83) /* JNB */
JumpSIw(TFLG_NB);break;
JumpCond16_w(TFLG_NB);break;
CASE_0F_W(0x84) /* JZ */
JumpSIw(TFLG_Z);break;
JumpCond16_w(TFLG_Z);break;
CASE_0F_W(0x85) /* JNZ */
JumpSIw(TFLG_NZ);break;
JumpCond16_w(TFLG_NZ);break;
CASE_0F_W(0x86) /* JBE */
JumpSIw(TFLG_BE);break;
JumpCond16_w(TFLG_BE);break;
CASE_0F_W(0x87) /* JNBE */
JumpSIw(TFLG_NBE);break;
JumpCond16_w(TFLG_NBE);break;
CASE_0F_W(0x88) /* JS */
JumpSIw(TFLG_S);break;
JumpCond16_w(TFLG_S);break;
CASE_0F_W(0x89) /* JNS */
JumpSIw(TFLG_NS);break;
JumpCond16_w(TFLG_NS);break;
CASE_0F_W(0x8a) /* JP */
JumpSIw(TFLG_P);break;
JumpCond16_w(TFLG_P);break;
CASE_0F_W(0x8b) /* JNP */
JumpSIw(TFLG_NP);break;
JumpCond16_w(TFLG_NP);break;
CASE_0F_W(0x8c) /* JL */
JumpSIw(TFLG_L);break;
JumpCond16_w(TFLG_L);break;
CASE_0F_W(0x8d) /* JNL */
JumpSIw(TFLG_NL);break;
JumpCond16_w(TFLG_NL);break;
CASE_0F_W(0x8e) /* JLE */
JumpSIw(TFLG_LE);break;
JumpCond16_w(TFLG_LE);break;
CASE_0F_W(0x8f) /* JNLE */
JumpSIw(TFLG_NLE);break;
JumpCond16_w(TFLG_NLE);break;
CASE_0F_B(0x90) /* SETO */
SETcc(TFLG_O);break;
CASE_0F_B(0x91) /* SETNO */

32
src/cpu/core_normal/prefix_66.h
View file

@ -190,6 +190,38 @@
CASE_D(0x6b) /* IMUL Gd,Ed,Ib */
RMGdEdOp3(DIMULD,Fetchbs());
break;
CASE_D(0x70) /* JO */
JumpCond32_b(TFLG_O);break;
CASE_D(0x71) /* JNO */
JumpCond32_b(TFLG_NO);break;
CASE_D(0x72) /* JB */
JumpCond32_b(TFLG_B);break;
CASE_D(0x73) /* JNB */
JumpCond32_b(TFLG_NB);break;
CASE_D(0x74) /* JZ */
JumpCond32_b(TFLG_Z);break;
CASE_D(0x75) /* JNZ */
JumpCond32_b(TFLG_NZ);break;
CASE_D(0x76) /* JBE */
JumpCond32_b(TFLG_BE);break;
CASE_D(0x77) /* JNBE */
JumpCond32_b(TFLG_NBE);break;
CASE_D(0x78) /* JS */
JumpCond32_b(TFLG_S);break;
CASE_D(0x79) /* JNS */
JumpCond32_b(TFLG_NS);break;
CASE_D(0x7a) /* JP */
JumpCond32_b(TFLG_P);break;
CASE_D(0x7b) /* JNP */
JumpCond32_b(TFLG_NP);break;
CASE_D(0x7c) /* JL */
JumpCond32_b(TFLG_L);break;
CASE_D(0x7d) /* JNL */
JumpCond32_b(TFLG_NL);break;
CASE_D(0x7e) /* JLE */
JumpCond32_b(TFLG_LE);break;
CASE_D(0x7f) /* JNLE */
JumpCond32_b(TFLG_NLE);break;
CASE_D(0x81) /* Grpl Ed,Id */
{
GetRM;Bitu which=(rm>>3)&7;

32
src/cpu/core_normal/prefix_66_0f.h
View file

@ -124,37 +124,37 @@
}
break;
CASE_0F_D(0x80) /* JO */
JumpSId(TFLG_O);break;
JumpCond32_d(TFLG_O);break;
CASE_0F_D(0x81) /* JNO */
JumpSId(TFLG_NO);break;
JumpCond32_d(TFLG_NO);break;
CASE_0F_D(0x82) /* JB */
JumpSId(TFLG_B);break;
JumpCond32_d(TFLG_B);break;
CASE_0F_D(0x83) /* JNB */
JumpSId(TFLG_NB);break;
JumpCond32_d(TFLG_NB);break;
CASE_0F_D(0x84) /* JZ */
JumpSId(TFLG_Z);break;
JumpCond32_d(TFLG_Z);break;
CASE_0F_D(0x85) /* JNZ */
JumpSId(TFLG_NZ);break;
JumpCond32_d(TFLG_NZ);break;
CASE_0F_D(0x86) /* JBE */
JumpSId(TFLG_BE);break;
JumpCond32_d(TFLG_BE);break;
CASE_0F_D(0x87) /* JNBE */
JumpSId(TFLG_NBE);break;
JumpCond32_d(TFLG_NBE);break;
CASE_0F_D(0x88) /* JS */
JumpSId(TFLG_S);break;
JumpCond32_d(TFLG_S);break;
CASE_0F_D(0x89) /* JNS */
JumpSId(TFLG_NS);break;
JumpCond32_d(TFLG_NS);break;
CASE_0F_D(0x8a) /* JP */
JumpSId(TFLG_P);break;
JumpCond32_d(TFLG_P);break;
CASE_0F_D(0x8b) /* JNP */
JumpSId(TFLG_NP);break;
JumpCond32_d(TFLG_NP);break;
CASE_0F_D(0x8c) /* JL */
JumpSId(TFLG_L);break;
JumpCond32_d(TFLG_L);break;
CASE_0F_D(0x8d) /* JNL */
JumpSId(TFLG_NL);break;
JumpCond32_d(TFLG_NL);break;
CASE_0F_D(0x8e) /* JLE */
JumpSId(TFLG_LE);break;
JumpCond32_d(TFLG_LE);break;
CASE_0F_D(0x8f) /* JNLE */
JumpSId(TFLG_NLE);break;
JumpCond32_d(TFLG_NLE);break;
CASE_0F_D(0xa0) /* PUSH FS */
Push_32(SegValue(fs));break;

64
src/cpu/core_normal/prefix_none.h
View file

@ -278,38 +278,38 @@
DoString(R_OUTSB);break;
CASE_W(0x6f) /* OUTSW */
DoString(R_OUTSW);break;
CASE_B(0x70) /* JO */
JumpSIb(TFLG_O);break;
CASE_B(0x71) /* JNO */
JumpSIb(TFLG_NO);break;
CASE_B(0x72) /* JB */
JumpSIb(TFLG_B);break;
CASE_B(0x73) /* JNB */
JumpSIb(TFLG_NB);break;
CASE_B(0x74) /* JZ */
JumpSIb(TFLG_Z);break;
CASE_B(0x75) /* JNZ */
JumpSIb(TFLG_NZ);break;
CASE_B(0x76) /* JBE */
JumpSIb(TFLG_BE);break;
CASE_B(0x77) /* JNBE */
JumpSIb(TFLG_NBE);break;
CASE_B(0x78) /* JS */
JumpSIb(TFLG_S);break;
CASE_B(0x79) /* JNS */
JumpSIb(TFLG_NS);break;
CASE_B(0x7a) /* JP */
JumpSIb(TFLG_P);break;
CASE_B(0x7b) /* JNP */
JumpSIb(TFLG_NP);break;
CASE_B(0x7c) /* JL */
JumpSIb(TFLG_L);break;
CASE_B(0x7d) /* JNL */
JumpSIb(TFLG_NL);break;
CASE_B(0x7e) /* JLE */
JumpSIb(TFLG_LE);break;
CASE_B(0x7f) /* JNLE */
JumpSIb(TFLG_NLE);break;
CASE_W(0x70) /* JO */
JumpCond16_b(TFLG_O);break;
CASE_W(0x71) /* JNO */
JumpCond16_b(TFLG_NO);break;
CASE_W(0x72) /* JB */
JumpCond16_b(TFLG_B);break;
CASE_W(0x73) /* JNB */
JumpCond16_b(TFLG_NB);break;
CASE_W(0x74) /* JZ */
JumpCond16_b(TFLG_Z);break;
CASE_W(0x75) /* JNZ */
JumpCond16_b(TFLG_NZ);break;
CASE_W(0x76) /* JBE */
JumpCond16_b(TFLG_BE);break;
CASE_W(0x77) /* JNBE */
JumpCond16_b(TFLG_NBE);break;
CASE_W(0x78) /* JS */
JumpCond16_b(TFLG_S);break;
CASE_W(0x79) /* JNS */
JumpCond16_b(TFLG_NS);break;
CASE_W(0x7a) /* JP */
JumpCond16_b(TFLG_P);break;
CASE_W(0x7b) /* JNP */
JumpCond16_b(TFLG_NP);break;
CASE_W(0x7c) /* JL */
JumpCond16_b(TFLG_L);break;
CASE_W(0x7d) /* JNL */
JumpCond16_b(TFLG_NL);break;
CASE_W(0x7e) /* JLE */
JumpCond16_b(TFLG_LE);break;
CASE_W(0x7f) /* JNLE */
JumpCond16_b(TFLG_NLE);break;
CASE_B(0x80) /* Grpl Eb,Ib */
CASE_B(0x82) /* Grpl Eb,Ib Mirror instruction*/
{

20
src/cpu/core_normal/support.h
View file

@ -37,9 +37,11 @@ static INLINE void ADDIPd(Bits add) {
LOADIP;
}
static INLINE void ADDIPFAST(Bits blah) {
core.ip_lookup+=blah;
// SAVEIP;
// reg_eip=(reg_eip+blah);
// LOADIP;
}
#define EXCEPTION(blah) \
@ -112,14 +114,22 @@ static INLINE Bit32u Pop_32() {
#endif
#define JumpSIb(blah) \
//TODO Could probably make all byte operands fast?
#define JumpCond16_b(blah) \
if (blah) { \
ADDIPFAST(Fetchbs()); \
ADDIPw(Fetchbs()); \
} else { \
ADDIPFAST(1); \
}
#define JumpSIw(blah) \
#define JumpCond32_b(blah) \
if (blah) { \
ADDIPd(Fetchbs()); \
} else { \
ADDIPFAST(1); \
}
#define JumpCond16_w(blah) \
if (blah) { \
ADDIPw(Fetchws()); \
} else { \
@ -127,7 +137,7 @@ static INLINE Bit32u Pop_32() {
}
#define JumpSId(blah) \
#define JumpCond32_d(blah) \
if (blah) { \
ADDIPd(Fetchds()); \
} else { \