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fix some trapflag bugs, add partial trapflag handling to the dynamic core

Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@2655
This commit is contained in:
Sebastian Strohhäcker 2006-06-20 17:14:04 +00:00
parent 3f792c66af
commit e3fe68c847
6 changed files with 25 additions and 21 deletions

View file

@ -45,6 +45,7 @@ Bits CPU_Core_Normal_Trap_Run(void);
Bits CPU_Core_Simple_Run(void);
Bits CPU_Core_Full_Run(void);
Bits CPU_Core_Dyn_X86_Run(void);
Bits CPU_Core_Dyn_X86_Trap_Run(void);
//CPU Stuff

View file

@ -112,6 +112,7 @@ enum BlockReturn {
#if (C_DEBUG)
BR_OpcodeFull,
#endif
BR_Iret,
BR_CallBack,
BR_SMCBlock
};
@ -241,6 +242,13 @@ run_block:
cache.block.running=0;
BlockReturn ret=gen_runcode(block->cache.start);
switch (ret) {
case BR_Iret:
#if C_HEAVY_DEBUG
if (DEBUG_HeavyIsBreakpoint()) return debugCallback;
#endif
if (!GETFLAG(TF)) goto restart_core;
cpudecoder=CPU_Core_Dyn_X86_Trap_Run;
return CBRET_NONE;
case BR_Normal:
/* Maybe check if we staying in the same page? */
#if C_HEAVY_DEBUG
@ -283,7 +291,19 @@ run_block:
}
goto restart_core;
}
return 0;
return CBRET_NONE;
}
Bits CPU_Core_Dyn_X86_Trap_Run(void) {
Bits oldCycles = CPU_Cycles;
CPU_Cycles = 1;
Bits ret=CPU_Core_Normal_Run();
if (GETFLAG(TF)) CPU_HW_Interrupt(1);
CPU_Cycles = oldCycles-1;
cpudecoder = &CPU_Core_Dyn_X86_Run;
return ret;
}
void CPU_Core_Dyn_X86_Init(void) {

View file

@ -1197,7 +1197,7 @@ static void dyn_iret(void) {
dyn_set_eip_last_end(DREG(TMPW));
dyn_save_critical_regs();
gen_call_function((void*)&CPU_IRET,"%Id%Drd",decode.big_op,DREG(TMPW));
gen_return_fast(BR_Normal);
gen_return_fast(BR_Iret);
dyn_closeblock();
}

View file

@ -95,9 +95,6 @@ static struct {
bool rep_zero;
Bitu prefixes;
GetEAHandler * ea_table;
struct {
bool skip;
} trap;
} core;
#define GETIP (core.cseip-SegBase(cs))
@ -191,10 +188,9 @@ decode_end:
Bits CPU_Core_Normal_Trap_Run(void) {
Bits oldCycles = CPU_Cycles;
CPU_Cycles = 1;
core.trap.skip=false;
Bits ret=CPU_Core_Normal_Run();
if (!core.trap.skip) CPU_HW_Interrupt(1);
if (GETFLAG(TF)) CPU_HW_Interrupt(1);
CPU_Cycles = oldCycles-1;
cpudecoder = &CPU_Core_Normal_Run;

View file

@ -734,9 +734,6 @@
return debugCallback;
#endif
CPU_SW_Interrupt_NoIOPLCheck(3,GETIP);
#if CPU_TRAP_CHECK
core.trap.skip=true;
#endif
continue;
CASE_B(0xcd) /* INT Ib */
{
@ -748,18 +745,12 @@
}
#endif
CPU_SW_Interrupt(num,GETIP);
#if CPU_TRAP_CHECK
core.trap.skip=true;
#endif
continue;
}
CASE_B(0xce) /* INTO */
if (get_OF()) {
FillFlags();
CPU_SW_Interrupt(4,GETIP);
#if CPU_TRAP_CHECK
core.trap.skip=true;
#endif
continue;
}
break;
@ -943,9 +934,6 @@
CASE_B(0xf1) /* ICEBP */
FillFlags();
CPU_SW_Interrupt_NoIOPLCheck(1,GETIP);
#if CPU_TRAP_CHECK
core.trap.skip=true;
#endif
continue;
CASE_B(0xf2) /* REPNZ */
DO_PREFIX_REP(false);

View file

@ -185,10 +185,9 @@ Bits CPU_Core_Simple_Trap_Run(void) {
Bits oldCycles = CPU_Cycles;
CPU_Cycles = 1;
core.trap.skip=false;
Bits ret=CPU_Core_Normal_Run();
if (!core.trap.skip) CPU_SW_Interrupt(1,reg_eip);
if (GETFLAG(TF)) CPU_SW_Interrupt(1,reg_eip);
CPU_Cycles = oldCycles-1;
cpudecoder = &CPU_Core_Normal_Run;