Paging tables/functions changed somewhat
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@1356
This commit is contained in:
Sjoerd van der Berg
parent
708eee4f86
commit
e712e7dc9c
2 changed files with 282 additions and 640 deletions
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@ -23,169 +23,165 @@
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#include "dosbox.h"
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#include "mem.h"
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#include "paging.h"
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#include "../hardware/vga.h"
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#include "regs.h"
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#define LINK_TOTAL (64*1024)
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static PageLink link_list[LINK_TOTAL];
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struct PagingBlock paging;
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PagingBlock paging;
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static Bit32u mapfirstmb[LINK_START];
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class PageDirChange : public PageChange {
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public:
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PageDirChange(PageDirectory * mydir) { dir=mydir;}
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void Changed(PageLink * link,Bitu start,Bitu end) {
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start>>=2;end>>=2;
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for (;start<=end;start++) {
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dir->InvalidateTable(start);
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}
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}
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private:
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PageDirectory * dir;
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Bitu PageHandler::readb(PhysPt addr) {
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E_Exit("No byte handler for read from %d",addr);
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return 0;
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}
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Bitu PageHandler::readw(PhysPt addr) {
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return
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(readb(addr+0) << 0) |
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(readb(addr+1) << 8);
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}
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Bitu PageHandler::readd(PhysPt addr) {
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return
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(readb(addr+0) << 0) |
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(readb(addr+1) << 8) |
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(readb(addr+2) << 16) |
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(readb(addr+3) << 24);
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}
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void PageHandler::writeb(PhysPt addr,Bitu val) {
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E_Exit("No byte handler for write to %d",addr);
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};
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class PageTableChange : public PageChange {
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void PageHandler::writew(PhysPt addr,Bitu val) {
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writeb(addr+0,(Bit8u) (val >> 0));
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writeb(addr+1,(Bit8u) (val >> 8));
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}
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void PageHandler::writed(PhysPt addr,Bitu val) {
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writeb(addr+0,(Bit8u) (val >> 0));
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writeb(addr+1,(Bit8u) (val >> 8));
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writeb(addr+2,(Bit8u) (val >> 16));
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writeb(addr+3,(Bit8u) (val >> 24));
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};
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HostPt PageHandler::GetHostPt(Bitu phys_page) {
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return 0;
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}
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class InitPageHandler : public PageHandler {
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public:
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PageTableChange(PageDirectory * mydir) { dir=mydir;}
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void Changed(PageLink * link,Bitu start,Bitu end) {
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start>>=2;end>>=2;
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for (;start<=end;start++) {
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dir->InvalidateLink(link->data.table,start);
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}
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InitPageHandler() {flags=0;}
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void AddPageLink(Bitu lin_page, Bitu phys_page) {
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assert(0);
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}
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Bitu readb(PhysPt addr) {
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InitPage(addr);
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return mem_readb(addr);
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}
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Bitu readw(PhysPt addr) {
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InitPage(addr);
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return mem_readw(addr);
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}
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Bitu readd(PhysPt addr) {
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InitPage(addr);
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return mem_readd(addr);
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}
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void writeb(PhysPt addr,Bitu val) {
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InitPage(addr);
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mem_writeb(addr,val);
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}
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void writew(PhysPt addr,Bitu val) {
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InitPage(addr);
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mem_writew(addr,val);
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}
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void writed(PhysPt addr,Bitu val) {
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InitPage(addr);
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mem_writed(addr,val);
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}
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void InitPage(Bitu addr) {
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Bitu lin_page=addr >> 12;
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Bitu phys_page;
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if (paging.enabled) {
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E_Exit("No paging support");
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} else {
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if (lin_page<LINK_START) phys_page=mapfirstmb[lin_page];
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else phys_page=lin_page;
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}
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PAGING_LinkPage(lin_page,phys_page);
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}
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private:
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PageDirectory * dir;
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};
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PageDirectory::PageDirectory() {
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entry_init.data.dir=this;
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entry_init.type=ENTRY_INIT;
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link_init.read=0;
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link_init.write=0;
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link_init.entry=&entry_init;
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table_change = new PageTableChange(this);
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dir_change = new PageDirChange(this);
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}
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PageDirectory::~PageDirectory() {
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delete table_change;
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delete dir_change;
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}
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void PageDirectory::ClearDirectory(void) {
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Bitu i;
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for (i=0;i<1024*1024;i++) links[i]=&link_init;
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for (i=0;i<1024;i++) {
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tables[i]=0;
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}
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}
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void PageDirectory::SetBase(PhysPt page) {
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base_page=page;
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ClearDirectory();
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/* Setup handler for PageDirectory changes */
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link_dir=MEM_LinkPage(base_page,0);
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if (!link_dir) E_Exit("PAGING:Directory setup on illegal address");
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link_dir->data.dir=this;
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link_dir->change=dir_change;
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MEM_CheckLinks(link_dir->entry);
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}
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void PageDirectory::LinkPage(Bitu lin_page,Bitu phys_page) {
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if (links[lin_page] != &link_init) MEM_UnlinkPage(links[lin_page]);
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PageLink * link=MEM_LinkPage(phys_page,lin_page*4096);
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if (link) links[lin_page]=link;
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else links[lin_page]=&link_init;
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}
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bool PageDirectory::InitPage(Bitu lin_address) {
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Bitu lin_page=lin_address >> 12;
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Bitu table=lin_page >> 10;
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Bitu index=lin_page & 0x3ff;
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/* Check if there already is table linked */
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if (!tables[table]) {
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X86PageEntry table_entry;
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table_entry.load=phys_page_readd(base_page,0);
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if (!table_entry.block.p) {
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LOG(LOG_PAGING,LOG_ERROR)("NP TABLE");
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return false;
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}
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PageLink * link=MEM_LinkPage(table_entry.block.base,table_entry.block.base);
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if (!link) return false;
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link->data.table=table;
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link->change=table_change;
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MEM_CheckLinks(link->entry);
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tables[table]=link;
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}
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X86PageEntry entry;
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entry.load=phys_page_readd(tables[table]->lin_base,index);
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if (!entry.block.p) {
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LOG(LOG_PAGING,LOG_ERROR)("NP PAGE");
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return false;
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}
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PageLink * link=MEM_LinkPage(entry.block.base,lin_page*4096);
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if (!link) return false;
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links[lin_page]=link;
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return true;
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}
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bool PageDirectory::InitPageLinear(Bitu lin_address) {
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Bitu phys_page=lin_address >> 12;
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PageLink * link=MEM_LinkPage(phys_page,phys_page*4096);
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if (link) {
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/* Set the page entry in our table */
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links[phys_page]=link;
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return true;
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}
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return false;
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}
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void PageDirectory::InvalidateTable(Bitu table) {
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if (tables[table]) {
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MEM_UnlinkPage(tables[table]);
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tables[table]=0;
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for (Bitu i=(table*1024);i<(table+1)*1024;i++) {
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if (links[i]!=&link_init) {
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MEM_UnlinkPage(links[i]);
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links[i]=&link_init;
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}
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}
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}
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}
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void PageDirectory::InvalidateLink(Bitu table,Bitu index) {
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Bitu i=(table*1024)+index;
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if (links[i]!=&link_init) {
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MEM_UnlinkPage(links[i]);
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links[i]=&link_init;
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}
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}
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static InitPageHandler init_page_handler;
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Bitu PAGING_GetDirBase(void) {
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return paging.cr3;
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}
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void PAGING_ClearTLB(void) {
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LOG(LOG_PAGING,LOG_NORMAL)("Clearing TLB");
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Bitu i;
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for (i=0;i<LINK_START;i++) {
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paging.tlb.read[i]=0;
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paging.tlb.write[i]=0;
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paging.tlb.handler[i]=&init_page_handler;
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}
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MEM_UnlinkPages();
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}
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void PAGING_InitTLB(void) {
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for (Bitu i=0;i<TLB_SIZE;i++) {
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paging.tlb.read[i]=0;
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paging.tlb.write[i]=0;
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paging.tlb.handler[i]=&init_page_handler;
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}
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}
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void PAGING_ClearTLBEntries(Bitu pages,Bit32u * entries) {
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for (;pages>0;pages--) {
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Bitu page=*entries++;
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paging.tlb.read[page]=0;
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paging.tlb.write[page]=0;
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paging.tlb.handler[page]=&init_page_handler;
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}
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}
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void PAGING_LinkPage(Bitu lin_page,Bitu phys_page) {
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PageHandler * handler=MEM_GetPageHandler(phys_page);
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Bitu lin_base=lin_page << 12;
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HostPt host_mem=handler->GetHostPt(phys_page);
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paging.tlb.phys_page[lin_page]=phys_page;
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if (handler->flags & PFLAG_READABLE) paging.tlb.read[lin_page]=host_mem-lin_base;
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else paging.tlb.read[lin_page]=0;
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if (handler->flags & PFLAG_WRITEABLE) paging.tlb.write[lin_page]=host_mem-lin_base;
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else paging.tlb.write[lin_page]=0;
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handler->AddPageLink(lin_page,phys_page);
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paging.tlb.handler[lin_page]=handler;
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}
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void PAGING_MapPage(Bitu lin_page,Bitu phys_page) {
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if (lin_page<LINK_START) {
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mapfirstmb[lin_page]=phys_page;
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paging.tlb.read[lin_page]=0;
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paging.tlb.write[lin_page]=0;
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paging.tlb.handler[lin_page]=&init_page_handler;
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} else {
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PAGING_LinkPage(lin_page,phys_page);
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}
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}
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void PAGING_SetDirBase(Bitu cr3) {
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paging.cr3=cr3;
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Bitu base_page=cr3 >> 12;
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LOG(LOG_PAGING,LOG_NORMAL)("CR3:%X Base %X",cr3,base_page);
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paging.base.page=cr3 >> 12;
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paging.base.addr=cr3 & ~4095;
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LOG(LOG_PAGING,LOG_NORMAL)("CR3:%X Base %X",cr3,paging.base.page);
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if (paging.enabled) {
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/* Check if we already have this one cached */
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PageDirectory * dir=paging.cache;
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while (dir) {
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if (dir->base_page==base_page) {
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paging.dir=dir;
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return;
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}
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dir=dir->next;
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}
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/* Couldn't find cached directory, make a new one */
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dir=new PageDirectory();
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dir->next=paging.cache;
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paging.cache=dir;
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dir->SetBase(base_page);
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paging.dir=dir;
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PAGING_ClearTLB();
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}
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}
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@ -195,7 +191,6 @@ void PAGING_Enable(bool enabled) {
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paging.enabled=enabled;
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if (!enabled) {
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LOG(LOG_PAGING,LOG_NORMAL)("Disabled");
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paging.dir=MEM_DefaultDirectory();
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} else {
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LOG(LOG_PAGING,LOG_NORMAL)("Enabled");
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#if !(C_DEBUG)
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@ -203,51 +198,20 @@ void PAGING_Enable(bool enabled) {
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#endif
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PAGING_SetDirBase(paging.cr3);
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}
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PAGING_ClearTLB();
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}
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bool PAGING_Enabled(void) {
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return paging.enabled;
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}
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void PAGING_FreePageLink(PageLink * link) {
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MEM_UnlinkPage(link);
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PAGING_AddFreePageLink(link);
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}
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void PAGING_LinkPage(PageDirectory * dir,Bitu lin_page,Bitu phys_page) {
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PageLink * link=MEM_LinkPage(phys_page,lin_page*4096);
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/* Only replace if we can */
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if (link) {
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PAGING_FreePageLink(dir->links[lin_page]);
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dir->links[lin_page]=link;
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void PAGING_Init(Section * sec) {
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/* Setup default Page Directory, force it to update */
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paging.enabled=false;
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PAGING_InitTLB();
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Bitu i;
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for (i=0;i<LINK_START;i++) {
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mapfirstmb[i]=i;
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}
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}
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void PAGING_AddFreePageLink(PageLink * link) {
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link->read=0;
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link->write=0;
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link->change=0;
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link->next=paging.free_link;
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link->entry=0;
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paging.free_link=link;
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}
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PageLink * PAGING_GetFreePageLink(void) {
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PageLink * ret;
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if (paging.free_link) ret=paging.free_link;
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else E_Exit("PAGING:Ran out of PageEntries");
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paging.free_link=ret->next;
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ret->next=0;
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return ret;
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}
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void PAGING_Init(Section * sec) {
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Bitu i;
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/* Setup the free pages tables for fast page allocation */
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paging.cache=0;
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paging.free_link=0;
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for (i=0;i<LINK_TOTAL;i++) PAGING_AddFreePageLink(&link_list[i]);
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/* Setup default Page Directory, force it to update */
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paging.enabled=true;PAGING_Enable(false);
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}
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@ -30,20 +30,26 @@
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#define PAGES_IN_BLOCK ((1024*1024)/MEM_PAGE_SIZE)
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#define MAX_MEMORY 64
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#define MAX_PAGE_ENTRIES (MAX_MEMORY*1024*1024/4096)
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#define LFB_PAGES 512
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static Bit8u controlport_data;
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static bool a20_enabled;
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#define MAX_LINKS ((MAX_MEMORY*1024/4)+4096) //Hopefully enough
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struct AllocBlock {
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Bit8u data[PAGES_IN_BLOCK*4096];
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AllocBlock * next;
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};
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struct LinkBlock {
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Bit8u used;
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Bit32u pages[MAX_LINKS];
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};
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static struct MemoryBlock {
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Bitu pages;
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Bitu free_pages;
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PageEntry * entries;
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Bitu pages;
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PageHandler * * phandlers;
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HostPt * hostpts;
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MemHandle * mhandles;
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LinkBlock links;
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struct {
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Bitu pages;
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HostPt cur_page;
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@ -54,172 +60,94 @@ static struct MemoryBlock {
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Bitu end_page;
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Bitu pages;
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HostPt address;
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PageEntry entries[LFB_PAGES];
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} lfb;
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struct {
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HostPt ram_bases[128/4];
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HostPt map_base;
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VGA_RANGES range;
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} vga;
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PageDirectory dir;
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bool enabled;
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Bit8u controlport;
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} a20;
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} memory;
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Bit8u ENTRY_readb(PageEntry * pentry,PhysPt address) {
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switch(pentry->type) {
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case ENTRY_VGA:
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return (*vga.config.readhandler)(pentry->data.vga_base+(address & 4095));
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case ENTRY_NA:
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if (pentry->data.dir->InitPageLinear(address)) return mem_readb(address);
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break;
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case ENTRY_INIT:
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if (pentry->data.dir->InitPage(address)) return mem_readb(address);
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break;
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class IllegalPageHandler : public PageHandler {
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public:
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void AddPageLink(Bitu lin_page, Bitu phys_page) {
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default:
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LOG(LOG_PAGING,LOG_ERROR)("Entry read from %X with illegal type %d",address,pentry->type);
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}
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IllegalPageHandler() {
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flags=0;
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}
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};
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class RAMPageHandler : public PageHandler {
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public:
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void AddPageLink(Bitu lin_page, Bitu phys_page) {
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/* Always clear links in first MB on TLB change */
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if (lin_page<LINK_START) return;
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if (memory.links.used<MAX_LINKS) {
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memory.links.pages[memory.links.used++]=lin_page;
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} else E_Exit("MEM:Ran out of page links");
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}
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RAMPageHandler() {
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flags=PFLAG_READABLE|PFLAG_WRITEABLE;
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}
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HostPt GetHostPt(Bitu phys_page) {
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if (!memory.hostpts[phys_page]) {
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memory.hostpts[phys_page]=MEM_GetBlockPage();
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}
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return memory.hostpts[phys_page];
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}
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};
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class ROMPageHandler : public RAMPageHandler {
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public:
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ROMPageHandler() {
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flags=PFLAG_READABLE|PFLAG_HASROM;
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}
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};
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class LFBPageHandler : public RAMPageHandler {
|
||||
public:
|
||||
LFBPageHandler() {
|
||||
flags=PFLAG_READABLE|PFLAG_WRITEABLE|PFLAG_NOCODE;
|
||||
}
|
||||
HostPt GetHostPt(Bitu phys_page) {
|
||||
return memory.lfb.address+(phys_page-memory.lfb.start_page)*4096;
|
||||
}
|
||||
};
|
||||
|
||||
|
||||
static IllegalPageHandler illegal_page_handler;
|
||||
static RAMPageHandler ram_page_handler;
|
||||
static ROMPageHandler rom_page_handler;
|
||||
static LFBPageHandler lfb_page_handler;
|
||||
|
||||
void MEM_SetLFB(Bitu page,Bitu pages,HostPt pt) {
|
||||
memory.lfb.address=pt;
|
||||
memory.lfb.start_page=page;
|
||||
memory.lfb.end_page=page+pages;
|
||||
memory.lfb.pages=pages;
|
||||
PAGING_ClearTLB();
|
||||
}
|
||||
|
||||
PageHandler * MEM_GetPageHandler(Bitu phys_page) {
|
||||
if (phys_page<memory.pages) {
|
||||
return memory.phandlers[phys_page];
|
||||
} else if ((phys_page>=memory.lfb.start_page) && (phys_page<memory.lfb.end_page)) {
|
||||
return &lfb_page_handler;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
Bit16u ENTRY_readw(PageEntry * pentry,PhysPt address) {
|
||||
switch(pentry->type) {
|
||||
case ENTRY_VGA:
|
||||
{
|
||||
VGA_ReadHandler * handler=vga.config.readhandler;
|
||||
address=pentry->data.vga_base + (address & 4095);
|
||||
return (*handler)(address) |
|
||||
((*handler)(address+1) << 8);
|
||||
}
|
||||
case ENTRY_NA:
|
||||
if (pentry->data.dir->InitPageLinear(address)) return mem_readw(address);
|
||||
break;
|
||||
case ENTRY_INIT:
|
||||
if (pentry->data.dir->InitPage(address)) return mem_readw(address);
|
||||
break;
|
||||
default:
|
||||
LOG(LOG_PAGING,LOG_ERROR)("Entry read from %X with illegal type %d",address,pentry->type);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
Bit32u ENTRY_readd(PageEntry * pentry,PhysPt address) {
|
||||
switch(pentry->type) {
|
||||
case ENTRY_VGA:
|
||||
{
|
||||
VGA_ReadHandler * handler=vga.config.readhandler;
|
||||
address=pentry->data.vga_base + (address & 4095);
|
||||
return (*handler)(address) |
|
||||
((*handler)(address+1) << 8) |
|
||||
((*handler)(address+2) << 16) |
|
||||
((*handler)(address+3) << 24);
|
||||
}
|
||||
case ENTRY_NA:
|
||||
if (pentry->data.dir->InitPageLinear(address)) return mem_readd(address);
|
||||
break;
|
||||
case ENTRY_INIT:
|
||||
if (pentry->data.dir->InitPage(address)) return mem_readd(address);
|
||||
break;
|
||||
default:
|
||||
LOG(LOG_PAGING,LOG_ERROR)("Entry read from %X with illegal type %d",address,pentry->type);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
void ENTRY_writeb(PageEntry * pentry,PhysPt address,Bit8u val) {
|
||||
switch(pentry->type) {
|
||||
case ENTRY_VGA:
|
||||
(*vga.config.writehandler)(pentry->data.vga_base+(address&4095),val);
|
||||
break;
|
||||
case ENTRY_NA:
|
||||
if (pentry->data.dir->InitPageLinear(address)) mem_writeb(address,val);
|
||||
break;
|
||||
case ENTRY_INIT:
|
||||
if (pentry->data.dir->InitPage(address)) mem_writeb(address,val);
|
||||
break;
|
||||
case ENTRY_ROM:
|
||||
LOG(LOG_PAGING,LOG_WARN)("Write %X to ROM at %X",val,address);
|
||||
break;
|
||||
case ENTRY_CHANGES:
|
||||
writeb(pentry->data.mem+(address&4095),val);
|
||||
{
|
||||
Bitu start=address&4095;Bitu end=start;
|
||||
for (PageLink * link=pentry->links;link;link=link->next)
|
||||
if (link->change) link->change->Changed(link,start,end);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
LOG(LOG_PAGING,LOG_ERROR)("Entry write %X to %X with illegal type %d",val,address,pentry->type);
|
||||
void MEM_SetPageHandler(Bitu phys_page,Bitu pages,PageHandler * handler) {
|
||||
for (;pages>0;pages--) {
|
||||
memory.phandlers[phys_page]=handler;
|
||||
phys_page++;
|
||||
}
|
||||
}
|
||||
|
||||
void ENTRY_writew(PageEntry * pentry,PhysPt address,Bit16u val) {
|
||||
switch(pentry->type) {
|
||||
case ENTRY_VGA:
|
||||
{
|
||||
VGA_WriteHandler * handler=vga.config.writehandler;
|
||||
address=pentry->data.vga_base+(address&4095);
|
||||
(*handler)(address,(Bit8u)val);
|
||||
(*handler)(address+1,(Bit8u)(val>>8));
|
||||
}
|
||||
break;
|
||||
case ENTRY_NA:
|
||||
if (pentry->data.dir->InitPageLinear(address)) mem_writew(address,val);
|
||||
break;
|
||||
case ENTRY_INIT:
|
||||
if (pentry->data.dir->InitPage(address)) mem_writew(address,val);
|
||||
break;
|
||||
case ENTRY_ROM:
|
||||
LOG(LOG_PAGING,LOG_WARN)("Write %X to ROM at %X",val,address);
|
||||
break;
|
||||
case ENTRY_CHANGES:
|
||||
writew(pentry->data.mem+(address&4095),val);
|
||||
{
|
||||
Bitu start=address&4095;Bitu end=start+1;
|
||||
for (PageLink * link=pentry->links;link;link=link->next)
|
||||
if (link->change) link->change->Changed(link,start,end);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
LOG(LOG_PAGING,LOG_ERROR)("Entry write %X to %X with illegal type %d",val,address,pentry->type);
|
||||
}
|
||||
void MEM_UnlinkPages(void) {
|
||||
PAGING_ClearTLBEntries(memory.links.used,memory.links.pages);
|
||||
}
|
||||
|
||||
|
||||
void ENTRY_writed(PageEntry * pentry,PhysPt address,Bit32u val) {
|
||||
switch(pentry->type) {
|
||||
case ENTRY_VGA:
|
||||
{
|
||||
VGA_WriteHandler * handler=vga.config.writehandler;
|
||||
address=pentry->data.vga_base+(address&4095);
|
||||
(*handler)(address,(Bit8u)val);
|
||||
(*handler)(address+1,(Bit8u)(val>>8));
|
||||
(*handler)(address+2,(Bit8u)(val>>16));
|
||||
(*handler)(address+3,(Bit8u)(val>>24));
|
||||
}
|
||||
break;
|
||||
case ENTRY_NA:
|
||||
if (pentry->data.dir->InitPageLinear(address)) mem_writed(address,val);
|
||||
break;
|
||||
case ENTRY_INIT:
|
||||
if (pentry->data.dir->InitPage(address)) mem_writed(address,val);
|
||||
break;
|
||||
case ENTRY_ROM:
|
||||
LOG(LOG_PAGING,LOG_WARN)("Write %X to ROM at %X",val,address);
|
||||
break;
|
||||
case ENTRY_CHANGES:
|
||||
writed(pentry->data.mem+(address&4095),val);
|
||||
{
|
||||
Bitu start=address&4095;Bitu end=start+3;
|
||||
for (PageLink * link=pentry->links;link;link=link->next)
|
||||
if (link->change) link->change->Changed(link,start,end);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
LOG(LOG_PAGING,LOG_ERROR)("Entry write %X to %X with illegal type %d",val,address,pentry->type);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
Bitu mem_strlen(PhysPt pt) {
|
||||
Bitu x=0;
|
||||
while (x<1024) {
|
||||
|
|
@ -270,193 +198,11 @@ Bitu MEM_TotalPages(void) {
|
|||
return memory.pages;
|
||||
}
|
||||
|
||||
void MEM_UnlinkPage(PageLink * plink) {
|
||||
PageLink * checker=plink->entry->links;
|
||||
PageLink * * last=&plink->entry->links;
|
||||
while (checker) {
|
||||
if (checker == plink) {
|
||||
*last=plink->next;
|
||||
PAGING_AddFreePageLink(plink);
|
||||
return;
|
||||
}
|
||||
last=&checker->next;
|
||||
checker=checker->next;
|
||||
}
|
||||
E_Exit("Unlinking unlinked link");
|
||||
|
||||
}
|
||||
|
||||
PageLink * MEM_LinkPage(Bitu phys_page,PhysPt lin_base) {
|
||||
PageEntry * entry;
|
||||
/* Check if it's in a valid memory range */
|
||||
if (phys_page<memory.pages) {
|
||||
entry=&memory.entries[phys_page];
|
||||
/* Check if it's in the lfb range */
|
||||
} else if (phys_page>=memory.lfb.start_page && phys_page<memory.lfb.end_page) {
|
||||
entry=&memory.lfb.entries[phys_page-memory.lfb.start_page];
|
||||
} else {
|
||||
/* Invalid memory */
|
||||
LOG(LOG_PAGING,LOG_NORMAL)("Trying to link invalid page %X",phys_page);
|
||||
return 0;
|
||||
}
|
||||
PageLink * link=PAGING_GetFreePageLink();
|
||||
link->lin_base=lin_base;
|
||||
link->change=0;
|
||||
/* Check what kind of handler we need to give the page */
|
||||
switch (entry->type) {
|
||||
case ENTRY_RAM:
|
||||
link->read=entry->data.mem - lin_base;
|
||||
link->write=link->read;
|
||||
break;
|
||||
case ENTRY_ROM:
|
||||
link->read=entry->data.mem - lin_base;
|
||||
link->write=0;
|
||||
break;
|
||||
case ENTRY_VGA:
|
||||
link->read=0;
|
||||
link->write=0;
|
||||
break;
|
||||
case ENTRY_LFB:
|
||||
link->read=entry->data.mem - lin_base;
|
||||
link->write=link->read;
|
||||
break;
|
||||
case ENTRY_ALLOC:
|
||||
entry->type=ENTRY_RAM;
|
||||
entry->data.mem=MEM_GetBlockPage();
|
||||
link->read=entry->data.mem - lin_base;
|
||||
link->write=link->read;
|
||||
break;
|
||||
case ENTRY_CHANGES:
|
||||
link->read=entry->data.mem - lin_base;
|
||||
link->write=0;
|
||||
break;
|
||||
default:
|
||||
E_Exit("LinkPage:Illegal type %d",entry->type);
|
||||
}
|
||||
/* Place the entry in the link */
|
||||
link->entry=entry;
|
||||
link->next=entry->links;
|
||||
entry->links=link;
|
||||
return link;
|
||||
}
|
||||
|
||||
|
||||
void MEM_CheckLinks(PageEntry * theentry) {
|
||||
if (theentry->type!=ENTRY_RAM && theentry->type!=ENTRY_CHANGES) {
|
||||
LOG(LOG_PAGING,LOG_NORMAL)("Checking links on type %d",theentry->type);
|
||||
return;
|
||||
}
|
||||
bool haschange=false;PageLink * link;
|
||||
for (link=theentry->links;link;link=link->next) {
|
||||
if (link->change) {
|
||||
haschange=true;break;
|
||||
}
|
||||
}
|
||||
if (haschange) {
|
||||
theentry->type=ENTRY_CHANGES;
|
||||
for (link=theentry->links;link;link=link->next) {
|
||||
link->read=theentry->data.mem - link->lin_base;
|
||||
link->write=0;
|
||||
}
|
||||
} else {
|
||||
theentry->type=ENTRY_RAM;
|
||||
for (link=theentry->links;link;link=link->next) {
|
||||
link->read=theentry->data.mem - link->lin_base;
|
||||
link->write=link->read;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void MEM_AllocLinkMemory(PageEntry * theentry) {
|
||||
//TODO Maybe check if this is a LINK_ALLOC type
|
||||
HostPt themem=MEM_GetBlockPage();
|
||||
theentry->data.mem=themem;
|
||||
theentry->type=ENTRY_RAM;
|
||||
theentry->links=0;
|
||||
}
|
||||
|
||||
void MEM_SetLFB(Bitu page,Bitu pages,HostPt pt) {
|
||||
if (pages>LFB_PAGES) E_Exit("MEM:LFB to large");
|
||||
LOG(LOG_PAGING,LOG_NORMAL)("LFB Base at address %X,page %X",page*4096,page);
|
||||
memory.lfb.pages=pages;
|
||||
memory.lfb.start_page=page;
|
||||
memory.lfb.end_page=page+pages;
|
||||
memory.lfb.address=pt;
|
||||
for (Bitu i=0;i<pages;i++) {
|
||||
memory.lfb.entries[i].data.mem=pt+(i*4096);
|
||||
memory.lfb.entries[i].type=ENTRY_LFB;
|
||||
}
|
||||
//TODO Maybe free the linked pages, but doubht that will be necessary
|
||||
}
|
||||
|
||||
void MEM_SetupVGA(VGA_RANGES range,HostPt base) {
|
||||
Bitu i;
|
||||
memory.vga.map_base=base;
|
||||
/* If it's another range, first clear the old one */
|
||||
if (memory.vga.range!=range) {
|
||||
Bitu start,end;
|
||||
switch (memory.vga.range) {
|
||||
case VGA_RANGE_A000:start=0;end=16;break;
|
||||
case VGA_RANGE_B000:start=16;end=24;break;
|
||||
case VGA_RANGE_B800:start=24;end=32;break;
|
||||
}
|
||||
for (i=start;i<end;i++) {
|
||||
PageEntry * theentry=&memory.entries[i+0xa0];
|
||||
HostPt themem=memory.vga.ram_bases[i];
|
||||
theentry->data.mem=themem;
|
||||
theentry->type=ENTRY_LFB;
|
||||
PageLink * link=theentry->links;
|
||||
while (link) {
|
||||
link->read=themem - link->lin_base;
|
||||
link->write=link->read;
|
||||
link=link->next;
|
||||
}
|
||||
}
|
||||
memory.vga.range=range;
|
||||
}
|
||||
/* Setup the new range, check if it's gonna handler based */
|
||||
Bitu start,end;
|
||||
switch (range) {
|
||||
case VGA_RANGE_A000:start=0;end=16;break;
|
||||
case VGA_RANGE_B000:start=16;end=24;break;
|
||||
case VGA_RANGE_B800:start=24;end=32;break;
|
||||
}
|
||||
if (base) {
|
||||
/* If it has an address it's a mapping */
|
||||
for (i=start;i<end;i++) {
|
||||
PageEntry * theentry=&memory.entries[i+0xa0];
|
||||
HostPt themem=base+(i-start)*4096;
|
||||
theentry->type=ENTRY_LFB;
|
||||
theentry->data.mem=themem;
|
||||
PageLink * link=theentry->links;
|
||||
while (link) {
|
||||
link->read=themem - link->lin_base;
|
||||
link->write=link->read;
|
||||
link=link->next;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
/* No address, so it'll be a handler */
|
||||
for (i=start;i<end;i++) {
|
||||
PageEntry * theentry=&memory.entries[i+0xa0];
|
||||
theentry->type=ENTRY_VGA;
|
||||
PhysPt thebase=(i-start)*4096;
|
||||
PageLink * link=theentry->links;
|
||||
theentry->data.vga_base=thebase;
|
||||
while (link) {
|
||||
link->read=0;
|
||||
link->write=0;
|
||||
link=link->next;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Bitu MEM_FreeLargest(void) {
|
||||
Bitu size=0;Bitu largest=0;
|
||||
Bitu index=XMS_START;
|
||||
while (index<memory.pages) {
|
||||
if (!memory.entries[index].next_handle) {
|
||||
if (!memory.mhandles[index]) {
|
||||
size++;
|
||||
} else {
|
||||
if (size>largest) largest=size;
|
||||
|
|
@ -472,7 +218,7 @@ Bitu MEM_FreeTotal(void) {
|
|||
Bitu free=0;
|
||||
Bitu index=XMS_START;
|
||||
while (index<memory.pages) {
|
||||
if (!memory.entries[index].next_handle) free++;
|
||||
if (!memory.mhandles[index]) free++;
|
||||
index++;
|
||||
}
|
||||
return free;
|
||||
|
|
@ -483,7 +229,7 @@ Bitu MEM_AllocatedPages(MemHandle handle)
|
|||
Bitu pages = 0;
|
||||
while (handle>0) {
|
||||
pages++;
|
||||
handle=memory.entries[handle].next_handle;
|
||||
handle=memory.mhandles[handle];
|
||||
}
|
||||
return pages;
|
||||
}
|
||||
|
|
@ -499,12 +245,12 @@ INLINE Bitu BestMatch(Bitu size) {
|
|||
/* Check if we are searching for first free page */
|
||||
if (!first) {
|
||||
/* Check if this is a free page */
|
||||
if (!memory.entries[index].next_handle) {
|
||||
if (!memory.mhandles[index]) {
|
||||
first=index;
|
||||
}
|
||||
} else {
|
||||
/* Check if this still is used page */
|
||||
if (memory.entries[index].next_handle) {
|
||||
if (memory.mhandles[index]) {
|
||||
Bitu pages=index-first;
|
||||
if (pages==size) {
|
||||
return first;
|
||||
|
|
@ -535,7 +281,7 @@ MemHandle MEM_AllocatePages(Bitu pages,bool sequence) {
|
|||
MemHandle * next=&ret;
|
||||
while (pages) {
|
||||
*next=index;
|
||||
next=&memory.entries[index].next_handle;
|
||||
next=&memory.mhandles[index];
|
||||
index++;pages--;
|
||||
}
|
||||
*next=-1;
|
||||
|
|
@ -545,9 +291,9 @@ MemHandle MEM_AllocatePages(Bitu pages,bool sequence) {
|
|||
while (pages) {
|
||||
Bitu index=BestMatch(1);
|
||||
if (!index) E_Exit("MEM:corruption during allocate");
|
||||
while (pages && (!memory.entries[index].next_handle)) {
|
||||
while (pages && (!memory.mhandles[index])) {
|
||||
*next=index;
|
||||
next=&memory.entries[index].next_handle;
|
||||
next=&memory.mhandles[index];
|
||||
index++;pages--;
|
||||
}
|
||||
*next=-1; //Invalidate it in case we need another match
|
||||
|
|
@ -558,8 +304,8 @@ MemHandle MEM_AllocatePages(Bitu pages,bool sequence) {
|
|||
|
||||
void MEM_ReleasePages(MemHandle handle) {
|
||||
while (handle>0) {
|
||||
MemHandle next=memory.entries[handle].next_handle;
|
||||
memory.entries[handle].next_handle=0;
|
||||
MemHandle next=memory.mhandles[handle];
|
||||
memory.mhandles[handle]=0;
|
||||
handle=next;
|
||||
}
|
||||
}
|
||||
|
|
@ -580,22 +326,22 @@ bool MEM_ReAllocatePages(MemHandle & handle,Bitu pages,bool sequence) {
|
|||
while (index>0) {
|
||||
old_pages++;
|
||||
last=index;
|
||||
index=memory.entries[index].next_handle;
|
||||
index=memory.mhandles[index];
|
||||
}
|
||||
if (old_pages == pages) return true;
|
||||
if (old_pages > pages) {
|
||||
/* Decrease size */
|
||||
pages--;index=handle;old_pages--;
|
||||
while (pages) {
|
||||
index=memory.entries[index].next_handle;
|
||||
index=memory.mhandles[index];
|
||||
pages--;old_pages--;
|
||||
}
|
||||
MemHandle next=memory.entries[index].next_handle;
|
||||
memory.entries[index].next_handle=-1;
|
||||
MemHandle next=memory.mhandles[index];
|
||||
memory.mhandles[index]=-1;
|
||||
index=next;
|
||||
while (old_pages) {
|
||||
next=memory.entries[index].next_handle;
|
||||
memory.entries[index].next_handle=0;
|
||||
next=memory.mhandles[index];
|
||||
memory.mhandles[index]=0;
|
||||
index=next;
|
||||
old_pages--;
|
||||
}
|
||||
|
|
@ -606,17 +352,17 @@ bool MEM_ReAllocatePages(MemHandle & handle,Bitu pages,bool sequence) {
|
|||
if (sequence) {
|
||||
index=last+1;
|
||||
Bitu free=0;
|
||||
while ((index<memory.pages) && !memory.entries[index].next_handle) {
|
||||
while ((index<(MemHandle)memory.pages) && !memory.mhandles[index]) {
|
||||
index++;free++;
|
||||
}
|
||||
if (free>=need) {
|
||||
/* Enough space allocate more pages */
|
||||
index=last;
|
||||
while (need) {
|
||||
memory.entries[index].next_handle=index+1;
|
||||
memory.mhandles[index]=index+1;
|
||||
need--;index++;
|
||||
}
|
||||
memory.entries[index].next_handle=-1;
|
||||
memory.mhandles[index]=-1;
|
||||
return true;
|
||||
} else {
|
||||
/* Not Enough space allocate new block and copy */
|
||||
|
|
@ -630,63 +376,38 @@ bool MEM_ReAllocatePages(MemHandle & handle,Bitu pages,bool sequence) {
|
|||
} else {
|
||||
MemHandle rem=MEM_AllocatePages(need,false);
|
||||
if (!rem) return false;
|
||||
memory.entries[last].next_handle=rem;
|
||||
memory.mhandles[last]=rem;
|
||||
return true;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
void MEM_UnmapPages(Bitu phys_page,Bitu pages) {
|
||||
for (;pages;pages--) {
|
||||
memory.dir.LinkPage(phys_page,phys_page);
|
||||
phys_page++;
|
||||
}
|
||||
}
|
||||
|
||||
void MEM_MapPagesHandle(Bitu lin_page,MemHandle mem,Bitu mem_page,Bitu pages) {
|
||||
for (;mem_page;mem_page--) {
|
||||
if (mem<=0) E_Exit("MEM:MapPages:Fault in memory tables");
|
||||
mem=memory.entries[mem].next_handle;
|
||||
}
|
||||
for (;pages;pages--) {
|
||||
if (mem<=0) E_Exit("MEM:MapPages:Fault in memory tables");
|
||||
memory.dir.LinkPage(lin_page++,mem);
|
||||
mem=memory.entries[mem].next_handle;
|
||||
}
|
||||
}
|
||||
|
||||
void MEM_MapPagesDirect(Bitu lin_page,Bitu phys_page,Bitu pages) {
|
||||
for (;pages;pages--) {
|
||||
memory.dir.LinkPage(lin_page++,phys_page++);
|
||||
}
|
||||
}
|
||||
|
||||
MemHandle MEM_NextHandle(MemHandle handle) {
|
||||
return memory.entries[handle].next_handle;
|
||||
return memory.mhandles[handle];
|
||||
}
|
||||
|
||||
MemHandle MEM_NextHandleAt(MemHandle handle,Bitu where) {
|
||||
while (where) {
|
||||
where--;
|
||||
handle=memory.mhandles[handle];
|
||||
}
|
||||
return handle;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
A20 line handling,
|
||||
Basically maps the 4 pages at the 1mb to 0mb in the default page directory
|
||||
*/
|
||||
bool MEM_A20_Enabled(void) {
|
||||
return a20_enabled;
|
||||
return memory.a20.enabled;
|
||||
}
|
||||
|
||||
void MEM_A20_Enable(bool enabled) {
|
||||
a20_enabled=enabled;
|
||||
Bitu i;
|
||||
if (!enabled) {
|
||||
for (i=0x0;i<0x10;i++) {
|
||||
memory.dir.LinkPage(0x100+i,i);
|
||||
}
|
||||
} else {
|
||||
for (i=0x0;i<0x10;i++) {
|
||||
memory.dir.LinkPage(0x100+i,0x100+i);
|
||||
}
|
||||
}
|
||||
Bitu phys_base=enabled ? (1024/4) : 0;
|
||||
for (Bitu i=0;i<16;i++) PAGING_MapPage((1024/4)+i,phys_base+i);
|
||||
memory.a20.enabled=enabled;
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -742,20 +463,11 @@ void mem_writed(PhysPt address,Bit32u val) {
|
|||
}
|
||||
|
||||
void phys_writeb(PhysPt addr,Bit8u val) {
|
||||
Bitu page=addr>>12;
|
||||
if (page>=memory.pages) E_Exit("physwrite:outside of physical range");
|
||||
PageEntry * theentry=&memory.entries[page];
|
||||
switch (theentry->type) {
|
||||
case ENTRY_ALLOC:
|
||||
MEM_AllocLinkMemory(theentry);
|
||||
break;
|
||||
case ENTRY_RAM:
|
||||
case ENTRY_ROM:
|
||||
break;
|
||||
default:
|
||||
E_Exit("physwrite:illegal type %d",theentry->type);
|
||||
HostPt block=memory.hostpts[addr >> 12];
|
||||
if (!block) {
|
||||
block=memory.hostpts[addr >> 12]=MEM_GetBlockPage();
|
||||
}
|
||||
writeb(theentry->data.mem+(addr & 4095),val);
|
||||
host_writeb(block+(addr & 4095),val);
|
||||
}
|
||||
|
||||
void phys_writew(PhysPt addr,Bit16u val) {
|
||||
|
|
@ -771,17 +483,6 @@ void phys_writed(PhysPt addr,Bit32u val) {
|
|||
}
|
||||
|
||||
Bit32u phys_page_readd(Bitu page,Bitu index) {
|
||||
if (page>=memory.pages) E_Exit("physwrite:outside of physical range");
|
||||
PageEntry * theentry=&memory.entries[page];
|
||||
switch (theentry->type) {
|
||||
case ENTRY_CHANGES:
|
||||
case ENTRY_RAM:
|
||||
case ENTRY_ROM:
|
||||
return readd(memory.entries[page].data.mem+index*4);
|
||||
break;
|
||||
default:
|
||||
E_Exit("pageread:illegal type %d",theentry->type);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -789,19 +490,15 @@ Bit32u phys_page_readd(Bitu page,Bitu index) {
|
|||
static void write_p92(Bit32u port,Bit8u val) {
|
||||
// Bit 0 = system reset (switch back to real mode)
|
||||
if (val&1) E_Exit("XMS: CPU reset via port 0x92 not supported.");
|
||||
controlport_data = val & ~2;
|
||||
memory.a20.controlport = val & ~2;
|
||||
MEM_A20_Enable((val & 2)>0);
|
||||
}
|
||||
|
||||
static Bit8u read_p92(Bit32u port) {
|
||||
return controlport_data | (a20_enabled ? 0x02 : 0);
|
||||
return memory.a20.controlport | (memory.a20.enabled ? 0x02 : 0);
|
||||
}
|
||||
|
||||
|
||||
PageDirectory * MEM_DefaultDirectory(void) {
|
||||
return &memory.dir;
|
||||
}
|
||||
|
||||
HostPt MEM_GetBlockPage(void) {
|
||||
HostPt ret;
|
||||
if (memory.block.pages) {
|
||||
|
|
@ -847,36 +544,17 @@ void MEM_Init(Section * sec) {
|
|||
memsize=MAX_MEMORY;
|
||||
}
|
||||
memory.pages=(memsize*1024*1024)/4096;
|
||||
if (memory.pages>0x110) memory.free_pages=memory.pages-0x110;
|
||||
else memory.free_pages=0;
|
||||
|
||||
memory.entries= new PageEntry[memory.pages];
|
||||
/* Allocate the data for the different page information blocks */
|
||||
memory.hostpts=new HostPt[memory.pages];
|
||||
memory.phandlers=new PageHandler * [memory.pages];
|
||||
memory.mhandles=new MemHandle [memory.pages];
|
||||
for (i=0;i<memory.pages;i++) {
|
||||
memory.entries[i].type=ENTRY_ALLOC;
|
||||
memory.entries[i].data.mem=0;
|
||||
memory.entries[i].links=0;
|
||||
memory.entries[i].next_handle=0; //Set to 0 for memory allocation
|
||||
}
|
||||
/* Setup 128kb of memory for the VGA segments */
|
||||
for (i=0;i<128/4;i++) {
|
||||
memory.vga.ram_bases[i]=MEM_GetBlockPage();
|
||||
memory.entries[0xa0+i].type=ENTRY_LFB;
|
||||
memory.entries[0xa0+i].data.mem=memory.vga.ram_bases[i];
|
||||
}
|
||||
memory.vga.range=VGA_RANGE_B800;
|
||||
/* Setup the default page mapping */
|
||||
memory.dir.entry_init.type=ENTRY_NA; //Setup to use NA by default
|
||||
memory.dir.ClearDirectory();
|
||||
/* All pages now pointing to NA handler that will check on first access */
|
||||
/* Setup the ROM Areas */
|
||||
for (i=0xc0;i<0xd0;i++) {
|
||||
MEM_AllocLinkMemory(&memory.entries[i]);
|
||||
memory.entries[i].type=ENTRY_ROM;
|
||||
}
|
||||
for (i=0xf0;i<0x100;i++) {
|
||||
MEM_AllocLinkMemory(&memory.entries[i]);
|
||||
memory.entries[i].type=ENTRY_ROM;
|
||||
memory.hostpts[i]=0; //0 handler is allocate memory
|
||||
memory.phandlers[i]=&ram_page_handler;
|
||||
memory.mhandles[i]=0; //Set to 0 for memory allocation
|
||||
}
|
||||
/* Reset some links */
|
||||
memory.links.used=0;
|
||||
// A20 Line - PS/2 system control port A
|
||||
IO_RegisterWriteHandler(0x92,write_p92,"Control Port");
|
||||
IO_RegisterReadHandler(0x92,read_p92,"Control Port");
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue