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add video parameter table for low-number video modes (special usage for cga/tandy/pcjr machines), thanks to hal;

some cleanup


Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@3452
This commit is contained in:
Sebastian Strohhäcker 2009-07-31 15:36:01 +00:00
parent b560a767ef
commit e744620458
5 changed files with 153 additions and 26 deletions

View file

@ -16,7 +16,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
/* $Id: int10.h,v 1.40 2009-07-11 10:25:25 c2woody Exp $ */
/* $Id: int10.h,v 1.41 2009-07-31 15:36:00 c2woody Exp $ */
#include "vga.h"
@ -102,7 +102,7 @@ extern Bit8u int10_font_14[256 * 14];
extern Bit8u int10_font_16[256 * 16];
struct VideoModeBlock {
Bitu mode;
Bit16u mode;
VGAModes type;
Bitu swidth, sheight;
Bitu twidth, theight;
@ -137,9 +137,9 @@ typedef struct {
Bit16u pmode_interface_start;
Bit16u pmode_interface_window;
Bit16u pmode_interface_palette;
Bitu used;
Bit16u used;
} rom;
Bitu vesa_setmode;
Bit16u vesa_setmode;
bool vesa_nolfb;
bool vesa_oldvbe;
} Int10Data;
@ -154,7 +154,7 @@ static Bit8u CURSOR_POS_ROW(Bit8u page) {
return real_readb(BIOSMEM_SEG,BIOSMEM_CURSOR_POS+page*2+1);
}
bool INT10_SetVideoMode(Bitu mode);
bool INT10_SetVideoMode(Bit16u mode);
void INT10_ScrollWindow(Bit8u rul,Bit8u cul,Bit8u rlr,Bit8u clr,Bit8s nlines,Bit8u attr,Bit8u page);
@ -230,4 +230,5 @@ bool INT10_VideoState_Save(Bitu state,RealPt buffer);
bool INT10_VideoState_Restore(Bitu state,RealPt buffer);
/* Video Parameter Tables */
Bitu INT10_SetupVideoParameterTable(PhysPt basepos);
Bit16u INT10_SetupVideoParameterTable(PhysPt basepos);
void INT10_SetupBasicVideoParameterTable(void);

View file

@ -16,7 +16,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
/* $Id: int10_memory.cpp,v 1.28 2009-05-27 09:15:42 qbix79 Exp $ */
/* $Id: int10_memory.cpp,v 1.29 2009-07-31 15:36:01 c2woody Exp $ */
#include "dosbox.h"
#include "mem.h"
@ -47,7 +47,7 @@ static Bit16u map_offset[8]={
};
void INT10_LoadFont(PhysPt font,bool reload,Bitu count,Bitu offset,Bitu map,Bitu height) {
PhysPt ftwhere=PhysMake(0xa000,map_offset[map & 0x7]+offset*32);
PhysPt ftwhere=PhysMake(0xa000,map_offset[map & 0x7]+(Bit16u)(offset*32));
IO_Write(0x3c4,0x2);IO_Write(0x3c5,0x4); //Enable plane 2
IO_Write(0x3ce,0x6);Bitu old_6=IO_Read(0x3cf);
IO_Write(0x3cf,0x0); //Disable odd/even and a0000 adressing
@ -58,7 +58,7 @@ void INT10_LoadFont(PhysPt font,bool reload,Bitu count,Bitu offset,Bitu map,Bitu
}
IO_Write(0x3c4,0x2);IO_Write(0x3c5,0x3); //Enable textmode planes (0,1)
IO_Write(0x3ce,0x6);
if (IS_VGA_ARCH) IO_Write(0x3cf,old_6); //odd/even and b8000 adressing
if (IS_VGA_ARCH) IO_Write(0x3cf,(Bit8u)old_6); //odd/even and b8000 adressing
else IO_Write(0x3cf,0x0e);
/* Reload tables and registers with new values based on this height */
if (reload) {
@ -69,7 +69,7 @@ void INT10_LoadFont(PhysPt font,bool reload,Bitu count,Bitu offset,Bitu map,Bitu
//Vertical display end bios says, but should stay the same?
//Rows setting in bios segment
real_writeb(BIOSMEM_SEG,BIOSMEM_NB_ROWS,(CurMode->sheight/height)-1);
real_writeb(BIOSMEM_SEG,BIOSMEM_CHAR_HEIGHT,height);
real_writeb(BIOSMEM_SEG,BIOSMEM_CHAR_HEIGHT,(Bit8u)height);
//TODO Reprogram cursor size?
}
}
@ -181,6 +181,8 @@ void INT10_SetupRomMemory(void) {
phys_writed(rom_base+int10.rom.used,0); int10.rom.used+=4;
}
INT10_SetupBasicVideoParameterTable();
if (IS_TANDY_ARCH) {
RealSetVec(0x44,int10.rom.font_8_first);
}
@ -216,7 +218,7 @@ void INT10_SetupRomMemoryChecksum(void) {
Bitu last_rombyte = 32*1024 - 1; //32 KB romsize
for (Bitu i = 0;i < last_rombyte;i++)
sum += phys_readb(rom_base + i); //OVERFLOW IS OKAY
sum = 256 - sum;
sum = (Bit8u)((256 - (Bitu)sum)&0xff);
phys_writeb(rom_base + last_rombyte,sum);
}
}

View file

@ -16,7 +16,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
/* $Id: int10_modes.cpp,v 1.87 2009-07-11 10:25:25 c2woody Exp $ */
/* $Id: int10_modes.cpp,v 1.88 2009-07-31 15:36:01 c2woody Exp $ */
#include <string.h>
@ -340,7 +340,7 @@ static Bit8u vga_palette[256][3]=
};
VideoModeBlock * CurMode;
static bool SetCurMode(VideoModeBlock modeblock[],Bitu mode) {
static bool SetCurMode(VideoModeBlock modeblock[],Bit16u mode) {
Bitu i=0;
while (modeblock[i].mode!=0xffff) {
if (modeblock[i].mode!=mode) i++;
@ -418,7 +418,7 @@ static void FinishSetMode(bool clearmem) {
Mouse_NewVideoMode();
}
bool INT10_SetVideoMode_OTHER(Bitu mode,bool clearmem) {
bool INT10_SetVideoMode_OTHER(Bit16u mode,bool clearmem) {
switch (machine) {
case MCH_CGA:
if (mode>6) return false;
@ -569,12 +569,42 @@ bool INT10_SetVideoMode_OTHER(Bitu mode,bool clearmem) {
real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_PAL,color_select);
break;
}
RealPt vparams = RealGetVec(0x1d);
if ((vparams != RealMake(0xf000,0xf0a4)) && (mode < 8)) {
// load crtc parameters from video params table
Bit16u crtc_block_index = 0;
if (mode < 2) crtc_block_index = 0;
else if (mode < 4) crtc_block_index = 1;
else if (mode < 7) crtc_block_index = 2;
else {
if (IS_EGAVGA_ARCH) {
if (mode == 7) crtc_block_index = 3;
} else if (machine==MCH_PCJR) {
if (mode < 9) crtc_block_index = 2;
else crtc_block_index = 3;
}
}
// init CRTC registers
for (Bit16u i = 0; i < 16; i++)
IO_WriteW(crtc_base, i | (real_readb(RealSeg(vparams),
RealOff(vparams) + i + crtc_block_index*16) << 8));
// mode register
IO_WriteB(crtc_base + 4, real_readb(RealSeg(vparams),
RealOff(vparams) + 4*16 + 24 + mode));
if (machine!=MCH_CGA) {
E_Exit("INT10 modeset: video parameter table changed");
}
}
FinishSetMode(clearmem);
return true;
}
bool INT10_SetVideoMode(Bitu mode) {
bool INT10_SetVideoMode(Bit16u mode) {
bool clearmem=true;Bitu i;
if (mode>=0x100) {
if ((mode & 0x4000) && int10.vesa_nolfb) return false;

View file

@ -16,7 +16,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
/* $Id: int10_vesa.cpp,v 1.39 2009-05-27 09:15:42 qbix79 Exp $ */
/* $Id: int10_vesa.cpp,v 1.40 2009-07-31 15:36:01 c2woody Exp $ */
#include <string.h>
#include <stddef.h>
@ -271,7 +271,7 @@ Bit8u VESA_SetSVGAMode(Bit16u mode) {
Bit8u VESA_GetSVGAMode(Bit16u & mode) {
if (int10.vesa_setmode!=0xffff) mode=int10.vesa_setmode;
else mode=(Bit16u)(CurMode->mode);
else mode=CurMode->mode;
return 0x00;
}
@ -297,7 +297,7 @@ Bit8u VESA_SetPalette(PhysPt data,Bitu index,Bitu count) {
Bit8u r,g,b;
if (index>255) return 0x1;
if (index+count>256) return 0x1;
IO_Write(0x3c8,index);
IO_Write(0x3c8,(Bit8u)index);
while (count) {
b = mem_readb(data++);
g = mem_readb(data++);
@ -316,7 +316,7 @@ Bit8u VESA_GetPalette(PhysPt data,Bitu index,Bitu count) {
Bit8u r,g,b;
if (index>255) return 0x1;
if (index+count>256) return 0x1;
IO_Write(0x3c7,index);
IO_Write(0x3c7,(Bit8u)index);
while (count) {
r = IO_Read(0x3c9);
g = IO_Read(0x3c9);
@ -428,8 +428,8 @@ Bit8u VESA_GetDisplayStart(Bit16u & x,Bit16u & y) {
Bitu pan=vga.config.pel_panning;
switch (CurMode->type) {
case M_LIN8:
y=times;
x=rem+pan;
y=(Bit16u)times;
x=(Bit16u)(rem+pan);
break;
default:
return 0x1;
@ -503,17 +503,17 @@ void INT10_SetupVESA(void) {
int10.rom.pmode_interface_window = int10.rom.used - RealOff( int10.rom.pmode_interface );
phys_writew( Real2Phys(int10.rom.pmode_interface) + 0, int10.rom.pmode_interface_window );
callback.pmWindow=CALLBACK_Allocate();
int10.rom.used += CALLBACK_Setup(callback.pmWindow, VESA_PMSetWindow, CB_RETN, PhysMake(0xc000,int10.rom.used), "VESA PM Set Window");
int10.rom.used += (Bit16u)CALLBACK_Setup(callback.pmWindow, VESA_PMSetWindow, CB_RETN, PhysMake(0xc000,int10.rom.used), "VESA PM Set Window");
/* PM Set start call */
int10.rom.pmode_interface_start = int10.rom.used - RealOff( int10.rom.pmode_interface );
phys_writew( Real2Phys(int10.rom.pmode_interface) + 2, int10.rom.pmode_interface_start);
callback.pmStart=CALLBACK_Allocate();
int10.rom.used += CALLBACK_Setup(callback.pmStart, VESA_PMSetStart, CB_RETN, PhysMake(0xc000,int10.rom.used), "VESA PM Set Start");
int10.rom.used += (Bit16u)CALLBACK_Setup(callback.pmStart, VESA_PMSetStart, CB_RETN, PhysMake(0xc000,int10.rom.used), "VESA PM Set Start");
/* PM Set Palette call */
int10.rom.pmode_interface_palette = int10.rom.used - RealOff( int10.rom.pmode_interface );
phys_writew( Real2Phys(int10.rom.pmode_interface) + 4, int10.rom.pmode_interface_palette);
callback.pmPalette=CALLBACK_Allocate();
int10.rom.used += CALLBACK_Setup(callback.pmPalette, VESA_PMSetPalette, CB_RETN, PhysMake(0xc000,int10.rom.used), "VESA PM Set Palette");
int10.rom.used += (Bit16u)CALLBACK_Setup(callback.pmPalette, VESA_PMSetPalette, CB_RETN, PhysMake(0xc000,int10.rom.used), "VESA PM Set Palette");
/* Finalize the size and clear the required ports pointer */
phys_writew( Real2Phys(int10.rom.pmode_interface) + 6, 0);
int10.rom.pmode_interface_size=int10.rom.used - RealOff( int10.rom.pmode_interface );

View file

@ -16,7 +16,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
/* $Id: int10_vptable.cpp,v 1.4 2009-05-27 09:15:42 qbix79 Exp $ */
/* $Id: int10_vptable.cpp,v 1.5 2009-07-31 15:36:01 c2woody Exp $ */
#include "dosbox.h"
#include "mem.h"
@ -24,6 +24,77 @@
#include "int10.h"
const Bit8u vparams[] = {
// 40x25 mode 0 and 1 crtc registers
0x38, 0x28, 0x2d, 0x0a, 0x1f, 0x06, 0x19, 0x1c, 0x02, 0x07, 0x06, 0x07, 0,0,0,0,
// 80x25 mode 2 and 3 crtc registers
0x71, 0x50, 0x5a, 0x0a, 0x1f, 0x06, 0x19, 0x1c, 0x02, 0x07, 0x06, 0x07, 0,0,0,0,
// graphics modes 4, 5 and 6
0x38, 0x28, 0x2d, 0x0a, 0x7f, 0x06, 0x64, 0x70, 0x02, 0x01, 0x06, 0x07, 0,0,0,0,
// mode 7 MDA text
0x61, 0x50, 0x52, 0x0f, 0x19, 0x06, 0x19, 0x19, 0x02, 0x0d, 0x0b, 0x0c, 0,0,0,0,
// buffer length words 2048, 4096, 16384, 16384
0x00, 0x08, 0x00, 0x10, 0x00, 0x40, 0x00, 0x40,
// columns
40, 40, 80, 80, 40, 40, 80, 80,
// CGA mode register
0x2c, 0x28, 0x2d, 0x29, 0x2a, 0x2e, 0x1e, 0x29
};
const Bit8u vparams_pcjr[] = {
// 40x25 mode 0 and 1 crtc registers
0x38, 0x28, 0x2c, 0x06, 0x1f, 0x06, 0x19, 0x1c, 0x02, 0x07, 0x06, 0x07, 0,0,0,0,
// 80x25 mode 2 and 3 crtc registers
0x71, 0x50, 0x5a, 0x0c, 0x1f, 0x06, 0x19, 0x1c, 0x02, 0x07, 0x06, 0x07, 0,0,0,0,
// graphics modes 4, 5, 6, 8
0x38, 0x28, 0x2b, 0x06, 0x7f, 0x06, 0x64, 0x70, 0x02, 0x01, 0x26, 0x07, 0,0,0,0,
// other graphics modes
0x71, 0x50, 0x56, 0x0c, 0x3f, 0x06, 0x32, 0x38, 0x02, 0x03, 0x26, 0x07, 0,0,0,0,
// buffer length words 2048, 4096, 16384, 16384
0x00, 0x08, 0x00, 0x10, 0x00, 0x40, 0x00, 0x40,
// columns
40, 40, 80, 80, 40, 40, 80, 80,
// CGA mode register
0x2c, 0x28, 0x2d, 0x29, 0x2a, 0x2e, 0x1e, 0x29
};
const Bit8u vparams_tandy[] = {
// 40x25 mode 0 and 1 crtc registers
0x38, 0x28, 0x2c, 0x08, 0x1f, 0x06, 0x19, 0x1c, 0x02, 0x07, 0x06, 0x07, 0,0,0,0,
// 80x25 mode 2 and 3 crtc registers
0x71, 0x50, 0x58, 0x10, 0x1f, 0x06, 0x19, 0x1c, 0x02, 0x07, 0x06, 0x07, 0,0,0,0,
// graphics modes 4, 5 and 6
0x38, 0x28, 0x2c, 0x08, 0x7f, 0x06, 0x64, 0x70, 0x02, 0x01, 0x06, 0x07, 0,0,0,0,
// graphics mode 7
0x71, 0x50, 0x58, 0x10, 0x3f, 0x06, 0x32, 0x38, 0x02, 0x03, 0x06, 0x07, 0,0,0,0,
// buffer length words 2048, 4096, 16384, 16384
0x00, 0x08, 0x00, 0x10, 0x00, 0x40, 0x00, 0x40,
// columns
40, 40, 80, 80, 40, 40, 80, 80,
// CGA mode register
0x2c, 0x28, 0x2d, 0x29, 0x2a, 0x2e, 0x1e, 0x29
};
const Bit8u vparams_tandy_td[] = {
// 40x25 mode 0 and 1 crtc registers
0x38, 0x28, 0x2d, 0x0a, 0x1f, 0x06, 0x19, 0x1c, 0x02, 0x07, 0x06, 0x07, 0,0,0,0,
// 80x25 mode 2 and 3 crtc registers
0x71, 0x50, 0x5a, 0x0a, 0x1f, 0x06, 0x19, 0x1c, 0x02, 0x07, 0x06, 0x07, 0,0,0,0,
// graphics modes 4, 5 and 6
0x38, 0x28, 0x2d, 0x0a, 0x7f, 0x06, 0x64, 0x70, 0x02, 0x01, 0x06, 0x07, 0,0,0,0,
// mode 7 MDA text
0x61, 0x50, 0x52, 0x0f, 0x19, 0x06, 0x19, 0x19, 0x02, 0x0d, 0x0b, 0x0c, 0,0,0,0,
// ?? mode 2 and 3 crtc registers
0x71, 0x50, 0x5a, 0x0a, 0x3f, 0x06, 0x32, 0x38, 0x02, 0x03, 0x06, 0x07, 0,0,0,0,
// buffer length words 2048, 4096, 16384, 16384
0x00, 0x08, 0x00, 0x10, 0x00, 0x40, 0x00, 0x40,
// columns
40, 40, 80, 80, 40, 40, 80, 80,
// CGA mode register
0x2c, 0x28, 0x2d, 0x29, 0x2a, 0x2e, 0x1e, 0x29
};
static Bit8u video_parameter_table_vga[0x40*0x1d]={
// video parameter table for mode 0 (cga emulation)
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@ -447,7 +518,7 @@ static Bit8u video_parameter_table_ega[0x40*0x17]={
};
Bitu INT10_SetupVideoParameterTable(PhysPt basepos) {
Bit16u INT10_SetupVideoParameterTable(PhysPt basepos) {
if (IS_VGA_ARCH) {
for (Bitu i=0;i<0x40*0x1d;i++) {
phys_writeb(basepos+i,video_parameter_table_vga[i]);
@ -461,6 +532,29 @@ Bitu INT10_SetupVideoParameterTable(PhysPt basepos) {
}
}
void INT10_SetupBasicVideoParameterTable(void) {
/* video parameter table at F000:F0A4 */
RealSetVec(0x1d,RealMake(0xF000, 0xF0A4));
switch (machine) {
case EGAVGA_ARCH_CASE:
case MCH_CGA:
for (Bit16u i = 0; i < sizeof(vparams); i++) {
phys_writeb(0xFF0A4+i,vparams[i]);
}
break;
case MCH_TANDY:
for (Bit16u i = 0; i < sizeof(vparams_tandy); i++) {
phys_writeb(0xFF0A4+i,vparams_tandy[i]);
}
break;
case MCH_PCJR:
for (Bit16u i = 0; i < sizeof(vparams_pcjr); i++) {
phys_writeb(0xFF0A4+i,vparams_pcjr[i]);
}
break;
}
}
#if 0
void INT10_GenerateVideoParameterTable(void) {
if (!IS_VGA_ARCH) E_Exit("Be sure that all graphics registers are readable!");