Implemented 16-bit DMA support
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@1398
This commit is contained in:
Dean Beeler
parent
9d8d93a7dd
commit
ed4d000c14
2 changed files with 513 additions and 251 deletions
333
include/dma.h
333
include/dma.h
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@ -16,14 +16,347 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef __DMA_H
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#define __DMA_H
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#include "mem.h"
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#define DMA_MODE_DEMAND 0
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#define DMA_MODE_SINGLE 1
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#define DMA_MODE_BLOCK 2
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#define DMA_MODE_CASCADE 3
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#define DMA_BASEADDR 0
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#define DMA_TRANSCOUNT 1
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#define DMA_PAGEREG 2
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#define DMA_CMDREG 0
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#define DMA_MODEREG 1
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#define DMA_CLEARREG 2
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#define DMA_DMACREG 3
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#define DMA_CLRMASKREG 4
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#define DMA_SINGLEREG 5
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#define DMA_WRITEALLREG 6
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static Bit8u ChannelPorts [3][8] = { 0x00, 0x02, 0x04, 0x06, 0xff, 0xc4, 0xc8, 0xcc,
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0x01, 0x03, 0x05, 0x07, 0xff, 0xc6, 0xca, 0xce,
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0x87, 0x83, 0x81, 0x82, 0xff, 0x8b, 0x89, 0x8a };
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static Bit8u ControllerPorts [2][7] = { 0x08, 0x0b, 0x0c, 0x0d, 0x0e, 0x0a, 0xf,
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0xd0, 0xd6, 0xd8, 0xda, 0xdc, 0xd4, 0xde };
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typedef void (* DMA_EnableCallBack)(bool enable);
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typedef void (* DMA_NewCallBack)(void *useChannel, bool tc);
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void DMA_SetEnableCallBack(Bitu channel,DMA_EnableCallBack callback);
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void DMA_CheckEnabled(void * usechan);
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Bitu DMA_8_Read(Bitu channel,Bit8u * buffer,Bitu count);
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Bitu DMA_8_Write(Bitu dmachan,Bit8u * buffer,Bitu count);
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Bitu DMA_16_Read(Bitu channel,Bit8u * buffer,Bitu count);
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Bitu DMA_16_Write(Bitu dmachan,Bit8u * buffer,Bitu count);
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extern Bit8u read_dmaB(Bit32u port);
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extern Bit16u read_dmaW(Bit32u port);
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extern void write_dmaB(Bit32u port,Bit8u val);
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extern void write_dmaW(Bit32u port,Bit16u val);
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class DmaController {
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public:
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bool flipflop;
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Bit8u ctrlnum;
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public:
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DmaController(Bit8u num) {
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int i;
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for(i=0;i<7;i++) {
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IO_RegisterReadBHandler(ControllerPorts[num][i],read_dmaB);
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IO_RegisterReadWHandler(ControllerPorts[num][i],read_dmaW);
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IO_RegisterWriteBHandler(ControllerPorts[num][i],write_dmaB);
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IO_RegisterWriteWHandler(ControllerPorts[num][i],write_dmaW);
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}
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flipflop = true;
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ctrlnum = num;
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}
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Bit16u portRead(Bit32u port, bool eightbit);
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void portWrite(Bit32u port, Bit16u val, bool eightbit);
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};
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#define ff myController->flipflop
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class DmaChannel {
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public:
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Bit8u channum;
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Bit16u baseaddr;
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Bit16u current_addr;
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Bit16u pageaddr;
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PhysPt physaddr;
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PhysPt curraddr;
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Bit32s transcnt;
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Bit32s currcnt;
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DmaController *myController;
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bool DMA16;
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public:
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Bit8u dmamode;
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bool dir;
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bool autoinit;
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Bit8u trantype;
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bool masked;
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bool enabled;
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DMA_EnableCallBack enable_callback;
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DMA_NewCallBack newcallback;
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DmaChannel(Bit8u num, DmaController *useController, bool sb) {
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int i;
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masked = true;
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enabled = false;
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enable_callback = NULL;
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newcallback = NULL;
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if(num == 4) return;
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for(i=0;i<3;i++) {
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IO_RegisterReadBHandler(ChannelPorts[i][num],read_dmaB);
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IO_RegisterReadWHandler(ChannelPorts[i][num],read_dmaW);
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IO_RegisterWriteBHandler(ChannelPorts[i][num],write_dmaB);
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IO_RegisterWriteWHandler(ChannelPorts[i][num],write_dmaW);
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}
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myController = useController;
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channum = num;
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DMA16 = sb;
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baseaddr = 0;
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pageaddr = 0;
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physaddr = 0;
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curraddr = 0;
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transcnt = 0;
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currcnt = 0;
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dir = false;
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autoinit = false;
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}
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void RegisterCallback(DMA_NewCallBack useCallBack) { newcallback = useCallBack; }
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void reset(void) {
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curraddr = physaddr;
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currcnt = transcnt+1;
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current_addr = baseaddr;
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//LOG(LOG_DMA,LOG_NORMAL)("Setup at address %X:%X count %X",pageaddr,baseaddr,currcnt);
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}
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void MakeCallback(bool tc) {
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if (newcallback != NULL) {
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if(tc) {
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(*newcallback)(this, true);
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} else {
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if ((enabled) && (!masked) && (transcnt!=0)) {
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(*newcallback)(this, false);
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}
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}
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}
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}
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Bit32u Read(Bit32s requestsize, Bit8u * buffer) {
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Bit32s bytesread;
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bytesread = 0;
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if(autoinit) {
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while(requestsize>0) {
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if(currcnt>=requestsize) {
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MEM_BlockRead(curraddr,buffer,requestsize);
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curraddr+=requestsize;
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buffer+=requestsize;
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currcnt-=requestsize;
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bytesread+=requestsize;
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requestsize=0;
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break;
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} else {
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MEM_BlockRead(curraddr,buffer,currcnt);
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bytesread+=currcnt;
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buffer+=currcnt;
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requestsize-=currcnt;
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reset();
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MakeCallback(true);
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}
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}
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if(currcnt==0) {
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reset();
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MakeCallback(true);
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}
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return bytesread;
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} else {
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if(currcnt>=requestsize) {
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MEM_BlockRead(curraddr,buffer,requestsize);
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curraddr+=requestsize;
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buffer+=requestsize;
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currcnt-=requestsize;
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bytesread+=requestsize;
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} else {
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MEM_BlockRead(curraddr,buffer,currcnt);
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buffer+=currcnt;
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requestsize-=currcnt;
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bytesread+=currcnt;
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currcnt=0;
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}
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}
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if(currcnt==0) MakeCallback(true);
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return bytesread;
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}
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Bit32u Write(Bit32s requestsize, Bit8u * buffer) {
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Bit32s byteswrite;
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byteswrite = 0;
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if(autoinit) {
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while(requestsize>0) {
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if(currcnt>=requestsize) {
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MEM_BlockWrite(curraddr,buffer,requestsize);
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curraddr+=requestsize;
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buffer+=requestsize;
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currcnt-=requestsize;
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byteswrite+=requestsize;
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requestsize=0;
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break;
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} else {
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MEM_BlockWrite(curraddr,buffer,currcnt);
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byteswrite+=currcnt;
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buffer+=currcnt;
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requestsize-=currcnt;
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reset();
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MakeCallback(true);
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}
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}
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if(currcnt==0) {
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reset();
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MakeCallback(true);
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}
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return byteswrite;
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} else {
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if(currcnt>=requestsize) {
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MEM_BlockWrite(curraddr,buffer,requestsize);
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curraddr+=requestsize;
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buffer+=requestsize;
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currcnt-=requestsize;
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byteswrite+=requestsize;
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} else {
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MEM_BlockWrite(curraddr,buffer,currcnt);
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buffer+=currcnt;
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requestsize-=currcnt;
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byteswrite+=currcnt;
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currcnt=0;
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}
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}
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if(currcnt==0) MakeCallback(true);
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return byteswrite;
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}
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void calcPhys(void) {
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if (DMA16) {
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physaddr = (baseaddr << 1) | ((pageaddr >> 1) << 17);
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} else {
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physaddr = (baseaddr) | (pageaddr << 16);
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}
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curraddr = physaddr;
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current_addr = baseaddr;
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}
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Bit16u portRead(Bit32u port, bool eightbit) {
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if (port == ChannelPorts[DMA_BASEADDR][channum]) {
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if(eightbit) {
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if(ff) {
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ff = !ff;
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return current_addr & 0xff;
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} else {
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ff = !ff;
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return current_addr >> 8;
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}
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} else {
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return current_addr;
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}
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}
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if (port == ChannelPorts[DMA_TRANSCOUNT][channum]) {
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if(eightbit) {
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if(ff) {
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ff = !ff;
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return (Bit8u)(currcnt & 0xff);
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} else {
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ff = !ff;
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return (Bit8u)(currcnt >> 8);
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}
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} else {
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return (Bit16u)currcnt;
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}
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}
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if (port == ChannelPorts[DMA_PAGEREG][channum]) return pageaddr;
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return 0xffff;
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}
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void portWrite(Bit32u port, Bit16u val, bool eightbit) {
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if (port == ChannelPorts[DMA_BASEADDR][channum]) {
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if(eightbit) {
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if(ff) {
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baseaddr = (baseaddr & 0xff00) | (Bit8u)val;
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} else {
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baseaddr = (baseaddr & 0xff) | (val << 8);
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}
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ff = !ff;
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} else {
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baseaddr = val;
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}
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calcPhys();
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reset();
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}
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if (port == ChannelPorts[DMA_TRANSCOUNT][channum]) {
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if(eightbit) {
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if(ff) {
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transcnt = (transcnt & 0xff00) | (Bit8u)val;
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} else {
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transcnt = (transcnt & 0xff) | (val << 8);
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}
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ff = !ff;
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} else {
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transcnt = val;
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}
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currcnt = transcnt+1;
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reset();
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DMA_CheckEnabled(this);
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MakeCallback(false);
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}
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if (port == ChannelPorts[DMA_PAGEREG][channum]) {
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pageaddr = val;
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calcPhys();
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reset();
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}
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}
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// Notify channel when mask changes
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void Notify(void) {
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if(!masked) {
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DMA_CheckEnabled(this);
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MakeCallback(false);
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}
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}
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};
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#undef ff
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extern DmaChannel *DmaChannels[8];
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extern DmaController *DmaControllers[2];
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#endif
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