Added MC6845 display controller support for hercules,cga,tandy machine modes.
Added cga,tandy,text modes. Added some new tandy modes. Added better tandy register support. Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@1691
This commit is contained in:
Sjoerd van der Berg
parent
5ec076438e
commit
f7c4b46991
19 changed files with 953 additions and 667 deletions
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@ -445,7 +445,7 @@ static void SetupTandyBios(void) {
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void INT10_Init(Section* sec) {
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INT10_InitVGA();
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if (machine==MCH_TANDY || machine==MCH_AUTO) SetupTandyBios();
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if (machine==MCH_TANDY) SetupTandyBios();
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/* Setup the INT 10 vector */
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call_10=CALLBACK_Allocate();
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CALLBACK_Setup(call_10,&INT10_Handler,CB_IRET);
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@ -104,11 +104,10 @@ struct VideoModeBlock {
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Bitu htotal,vtotal;
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Bitu hdispend,vdispend;
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Bitu rate;
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Bitu special;
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};
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extern VideoModeBlock ModeList[];
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extern VideoModeBlock ModeList_VGA[];
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extern VideoModeBlock * CurMode;
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typedef struct {
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@ -16,7 +16,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: int10_char.cpp,v 1.22 2004-01-28 18:04:18 harekiet Exp $ */
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/* $Id: int10_char.cpp,v 1.23 2004-02-29 22:18:24 harekiet Exp $ */
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/* Character displaying moving functions */
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@ -174,7 +174,7 @@ static INLINE void TEXT_FillRow(Bit8u cleft,Bit8u cright,Bit8u row,PhysPt base,B
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void INT10_ScrollWindow(Bit8u rul,Bit8u cul,Bit8u rlr,Bit8u clr,Bit8s nlines,Bit8u attr,Bit8u page) {
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/* Do some range checking */
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if (CurMode->type>M_TEXT16) page=0xff;
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if (CurMode->type!=M_TEXT) page=0xff;
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BIOS_NCOLS;BIOS_NROWS;
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if(rul>rlr) return;
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if(cul>clr) return;
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@ -204,8 +204,7 @@ void INT10_ScrollWindow(Bit8u rul,Bit8u cul,Bit8u rlr,Bit8u clr,Bit8s nlines,Bit
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while (start!=end) {
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start+=next;
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switch (CurMode->type) {
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case M_TEXT2:
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case M_TEXT16:
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case M_TEXT:
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TEXT_CopyRow(cul,clr,start,start+nlines,base);break;
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case M_CGA2:
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CGA2_CopyRow(cul,clr,start,start+nlines,base);break;
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@ -229,8 +228,7 @@ filling:
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}
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for (;nlines>0;nlines--) {
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switch (CurMode->type) {
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case M_TEXT2:
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case M_TEXT16:
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case M_TEXT:
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TEXT_FillRow(cul,clr,start,base,attr);break;
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case M_CGA2:
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CGA2_FillRow(cul,clr,start,base,attr);break;
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@ -363,8 +361,7 @@ static void WriteChar(Bit16u col,Bit16u row,Bit8u page,Bit8u chr,Bit8u attr,bool
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Bitu x,y;
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Bit8u cheight = real_readb(BIOSMEM_SEG,BIOSMEM_CHAR_HEIGHT);
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switch (CurMode->type) {
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case M_TEXT2:
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case M_TEXT16:
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case M_TEXT:
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{
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// Compute the address
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Bit16u address=page*real_readw(BIOSMEM_SEG,BIOSMEM_PAGE_SIZE);
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@ -410,7 +407,7 @@ static void WriteChar(Bit16u col,Bit16u row,Bit8u page,Bit8u chr,Bit8u attr,bool
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void INT10_WriteChar(Bit8u chr,Bit8u attr,Bit8u page,Bit16u count,bool showattr) {
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//TODO Check if this page thing is correct
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if (CurMode->type>M_TEXT16) page=0xff;
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if (CurMode->type!=M_TEXT) page=0xff;
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if(page==0xFF) page=real_readb(BIOSMEM_SEG,BIOSMEM_CURRENT_PAGE);
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Bit8u cur_row=CURSOR_POS_ROW(page);
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Bit8u cur_col=CURSOR_POS_COL(page);
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@ -474,12 +471,12 @@ void INT10_TeletypeOutputAttr(Bit8u chr,Bit8u attr,bool useattr) {
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void INT10_TeletypeOutput(Bit8u chr,Bit8u attr) {
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INT10_TeletypeOutputAttr(chr,attr,CurMode->type>M_TEXT16);
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INT10_TeletypeOutputAttr(chr,attr,CurMode->type!=M_TEXT);
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}
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void INT10_WriteString(Bit8u row,Bit8u col,Bit8u flag,Bit8u attr,PhysPt string,Bit16u count,Bit8u page) {
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//TODO Check if this page thing is correct
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if (CurMode->type>M_TEXT16) page=0xff;
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if (CurMode->type!=M_TEXT) page=0xff;
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if(page==0xFF) page=real_readb(BIOSMEM_SEG,BIOSMEM_CURRENT_PAGE);
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BIOS_NCOLS;BIOS_NROWS;
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@ -80,8 +80,10 @@ void INT10_SetupRomMemory(void) {
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PhysPt rom_base=PhysMake(0xc000,0);
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Bitu i;
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int10.rom.used=3; // int10.rom.used=2; Size of ROM added
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phys_writew(rom_base+0,0xaa55);
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phys_writeb(rom_base+2,0x40); // Size of ROM: 64 512-blocks = 32KB
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if (machine==MCH_VGA) {
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phys_writew(rom_base+0,0xaa55);
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phys_writeb(rom_base+2,0x40); // Size of ROM: 64 512-blocks = 32KB
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}
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int10.rom.font_8_first=RealMake(0xC000,int10.rom.used);
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for (i=0;i<128*8;i++) {
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phys_writeb(rom_base+int10.rom.used++,int10_font_08[i]);
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@ -91,10 +91,8 @@ void INT10_GetFuncStateInformation(PhysPt save) {
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mem_writeb(save+0x25,real_readb(BIOSMEM_SEG,BIOSMEM_DCC_INDEX));
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Bit16u col_count=0;
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switch (CurMode->type) {
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case M_TEXT16:
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case M_TEXT:
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col_count=16;break;
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case M_TEXT2:
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col_count=2;break; // ??
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case M_CGA2:
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col_count=2;break;
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case M_CGA4:
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@ -5,6 +5,7 @@
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#include "inout.h"
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#include "int10.h"
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#include "mouse.h"
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#include "vga.h"
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#define _EGA_HALF_CLOCK 0x0001
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#define _EGA_LINE_DOUBLE 0x0002
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@ -13,41 +14,55 @@
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#define GFX_REGS 0x09
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#define ATT_REGS 0x15
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VideoModeBlock ModeList[]={
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/* mode ,type ,sw ,sh ,tw ,th ,cw,ch ,pt,pstart ,plength,htot,vtot,hde,vde ,rate,special flags */
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{ 0x000 ,M_TEXT16 ,320 ,400 ,40 ,25 ,9 ,16 ,8 ,0xB8000 ,0x0800 ,50 ,449 ,40 ,400 ,70 ,_EGA_HALF_CLOCK },
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{ 0x001 ,M_TEXT16 ,320 ,400 ,40 ,25 ,9 ,16 ,8 ,0xB8000 ,0x0800 ,50 ,449 ,40 ,400 ,70 ,_EGA_HALF_CLOCK },
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{ 0x002 ,M_TEXT16 ,640 ,400 ,80 ,25 ,9 ,16 ,4 ,0xB8000 ,0x1000 ,100 ,449 ,80 ,400 ,70 ,0 },
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{ 0x003 ,M_TEXT16 ,640 ,400 ,80 ,25 ,9 ,16 ,4 ,0xB8000 ,0x1000 ,100 ,449 ,80 ,400 ,70 ,0 },
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{ 0x004 ,M_CGA4 ,320 ,200 ,40 ,25 ,8 ,8 ,4 ,0xB8000 ,0x0800 ,100 ,449 ,80 ,400 ,60 ,0 },
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{ 0x005 ,M_CGA4 ,320 ,200 ,40 ,25 ,8 ,8 ,4 ,0xB8000 ,0x0800 ,100 ,449 ,80 ,400 ,60 ,0},
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{ 0x006 ,M_CGA2 ,640 ,200 ,80 ,25 ,8 ,8 ,4 ,0xB8000 ,0x0800 ,100 ,449 ,80 ,400 ,60 ,0 },
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{ 0x007 ,M_TEXT2 ,640 ,400 ,80 ,25 ,9 ,16 ,4 ,0xB0000 ,0x1000 ,100 ,449 ,80 ,400 ,70 ,0 },
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/* 8,9,0xa are tandy modes */
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{ 0x009 ,M_TANDY16,320 ,200 ,40 ,25 ,8 ,8 ,8 ,0xB8000 ,0x2000 ,100 ,449 ,80 ,400 ,60 ,0},
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{ 0x00D ,M_EGA16 ,320 ,200 ,40 ,25 ,8 ,8 ,8 ,0xA0000 ,0x2000 ,50 ,449 ,40 ,400 ,70 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE },
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{ 0x00E ,M_EGA16 ,640 ,200 ,80 ,25 ,8 ,8 ,4 ,0xA0000 ,0x4000 ,100 ,449 ,80 ,400 ,70 ,_EGA_LINE_DOUBLE },
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{ 0x00F ,M_EGA16 ,640 ,350 ,80 ,25 ,8 ,14 ,2 ,0xA0000 ,0x8000 ,100 ,449 ,80 ,400 ,70 ,0 },/*was EGA_2*/
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{ 0x010 ,M_EGA16 ,640 ,350 ,80 ,25 ,8 ,14 ,1 ,0xA0000 ,0x8000 ,100 ,449 ,80 ,350 ,70 ,0 },
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{ 0x011 ,M_EGA16 ,640 ,480 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0xA000 ,100 ,449 ,80 ,480 ,70 ,0 },/*was EGA_2 */
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{ 0x012 ,M_EGA16 ,640 ,480 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0xA000 ,100 ,525 ,80 ,480 ,70 ,0 },
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{ 0x013 ,M_VGA ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x0000 ,100 ,449 ,80 ,400 ,70 ,0 },
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VideoModeBlock ModeList_VGA[]={
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/* mode ,type ,sw ,sh ,tw ,th ,cw,ch ,pt,pstart ,plength,htot,vtot,hde,vde special flags */
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{ 0x000 ,M_TEXT ,320 ,400 ,40 ,25 ,9 ,16 ,8 ,0xB8000 ,0x0800 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK },
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{ 0x001 ,M_TEXT ,320 ,400 ,40 ,25 ,9 ,16 ,8 ,0xB8000 ,0x0800 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK },
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{ 0x002 ,M_TEXT ,640 ,400 ,80 ,25 ,9 ,16 ,4 ,0xB8000 ,0x1000 ,100 ,449 ,80 ,400 ,0 },
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{ 0x003 ,M_TEXT ,640 ,400 ,80 ,25 ,9 ,16 ,4 ,0xB8000 ,0x1000 ,100 ,449 ,80 ,400 ,0 },
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{ 0x004 ,M_CGA4 ,320 ,200 ,40 ,25 ,8 ,8 ,4 ,0xB8000 ,0x0800 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK },
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{ 0x005 ,M_CGA4 ,320 ,200 ,40 ,25 ,8 ,8 ,4 ,0xB8000 ,0x0800 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK },
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{ 0x006 ,M_CGA2 ,640 ,200 ,80 ,25 ,8 ,8 ,4 ,0xB8000 ,0x0800 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK },
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{ 0x007 ,M_TEXT ,640 ,400 ,80 ,25 ,9 ,16 ,4 ,0xB0000 ,0x1000 ,100 ,449 ,80 ,400 ,0 },
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{ 0x100 ,M_LIN8 ,640 ,400 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 ,70 ,0 },
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{ 0x101 ,M_LIN8 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 ,70 ,0 },
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{ 0x103 ,M_LIN8 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,128 ,663 ,100,600 ,70 ,0 },
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{ 0x00D ,M_EGA16 ,320 ,200 ,40 ,25 ,8 ,8 ,8 ,0xA0000 ,0x2000 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE },
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{ 0x00E ,M_EGA16 ,640 ,200 ,80 ,25 ,8 ,8 ,4 ,0xA0000 ,0x4000 ,100 ,449 ,80 ,400 ,_EGA_LINE_DOUBLE },
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{ 0x00F ,M_EGA16 ,640 ,350 ,80 ,25 ,8 ,14 ,2 ,0xA0000 ,0x8000 ,100 ,449 ,80 ,400 ,0 },/*was EGA_2*/
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{ 0x010 ,M_EGA16 ,640 ,350 ,80 ,25 ,8 ,14 ,1 ,0xA0000 ,0x8000 ,100 ,449 ,80 ,350 ,0 },
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{ 0x011 ,M_EGA16 ,640 ,480 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0xA000 ,100 ,449 ,80 ,480 ,0 },/*was EGA_2 */
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{ 0x012 ,M_EGA16 ,640 ,480 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0xA000 ,100 ,525 ,80 ,480 ,0 },
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{ 0x013 ,M_VGA ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x0000 ,100 ,449 ,80 ,400 ,0 },
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{ 0x100 ,M_LIN8 ,640 ,400 ,80 ,25 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 ,0 },
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{ 0x101 ,M_LIN8 ,640 ,480 ,80 ,30 ,8 ,16 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 ,0 },
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{ 0x103 ,M_LIN8 ,800 ,600 ,100,37 ,8 ,16 ,1 ,0xA0000 ,0x10000,128 ,663 ,100,600 ,0 },
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{ 0x150 ,M_LIN8 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 ,70 , 0},
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{ 0x151 ,M_LIN8 ,320 ,240 ,40 ,30 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 ,70 , 0},
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{ 0x152 ,M_LIN8 ,320 ,400 ,40 ,50 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 ,70 , 0 },
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{ 0x153 ,M_LIN8 ,320 ,480 ,40 ,60 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 ,70 , 0 },
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{0xFFFF ,M_ERROR ,0 ,0 ,0 ,0 ,0 ,0 ,0 ,0x00000 ,0x0000 ,0 ,0 ,0 ,0 ,0 ,0 },
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{ 0x150 ,M_LIN8 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , 0},
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{ 0x151 ,M_LIN8 ,320 ,240 ,40 ,30 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , 0},
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{ 0x152 ,M_LIN8 ,320 ,400 ,40 ,50 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,449 ,80 ,400 , 0 },
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{ 0x153 ,M_LIN8 ,320 ,480 ,40 ,60 ,8 ,8 ,1 ,0xA0000 ,0x10000,100 ,525 ,80 ,480 , 0 },
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{0xFFFF ,M_ERROR ,0 ,0 ,0 ,0 ,0 ,0 ,0 ,0x00000 ,0x0000 ,0 ,0 ,0 ,0 ,0 },
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};
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VideoModeBlock ModeList_OTHER[]={
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/* mode ,type ,sw ,sh ,tw ,th ,cw,ch ,pt,pstart ,plength,htot,vtot,hde,vde ,special flags */
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{ 0x000 ,M_TEXT ,320 ,400 ,40 ,25 ,8 ,8 ,8 ,0xB8000 ,0x0800 ,56 ,31 ,40 ,25 ,0 },
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{ 0x001 ,M_TEXT ,320 ,400 ,40 ,25 ,8 ,8 ,8 ,0xB8000 ,0x0800 ,56 ,31 ,40 ,25 ,0 },
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{ 0x002 ,M_TEXT ,640 ,400 ,80 ,25 ,8 ,8 ,4 ,0xB8000 ,0x1000 ,113 ,31 ,80 ,25 ,0 },
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{ 0x003 ,M_TEXT ,640 ,400 ,80 ,25 ,8 ,8 ,4 ,0xB8000 ,0x1000 ,113 ,31 ,80 ,25 ,0 },
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{ 0x004 ,M_CGA4 ,320 ,200 ,40 ,25 ,8 ,8 ,4 ,0xB8000 ,0x0800 ,56 ,127 ,40 ,100 ,0 },
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{ 0x005 ,M_CGA4 ,320 ,200 ,40 ,25 ,8 ,8 ,4 ,0xB8000 ,0x0800 ,56 ,127 ,40 ,100 ,0 },
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{ 0x006 ,M_CGA2 ,640 ,200 ,80 ,25 ,8 ,8 ,4 ,0xB8000 ,0x0800 ,56 ,127 ,40 ,100 ,0 },
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{ 0x008 ,M_TANDY16,160 ,200 ,20 ,25 ,8 ,8 ,8 ,0xB8000 ,0x2000 ,56 ,127 ,40 ,100 ,0 },
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{ 0x009 ,M_TANDY16,320 ,200 ,40 ,25 ,8 ,8 ,8 ,0xB8000 ,0x2000 ,113 ,63 ,80 ,50 ,0 },
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{ 0x00A ,M_CGA4 ,640 ,200 ,40 ,25 ,8 ,8 ,8 ,0xB8000 ,0x2000 ,113 ,63 ,80 ,50 ,0 },
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{0xFFFF ,M_ERROR ,0 ,0 ,0 ,0 ,0 ,0 ,0 ,0x00000 ,0x0000 ,0 ,0 ,0 ,0 ,0 },
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};
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VideoModeBlock Hercules_Mode=
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{ 0x007 ,M_TEXT ,640 ,400 ,80 ,25 ,8 ,14 ,4 ,0xB0000 ,0x1000 ,97 ,25 ,80 ,25 ,0 };
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static Bit8u text_palette[64][3]=
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{
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{0x00,0x00,0x00},{0x00,0x00,0x2a},{0x00,0x2a,0x00},{0x00,0x2a,0x2a},{0x2a,0x00,0x00},{0x2a,0x00,0x2a},{0x2a,0x2a,0x00},{0x2a,0x2a,0x2a},
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@ -72,18 +87,10 @@ static Bit8u ega_palette[64][3]=
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{0x15,0x15,0x15}, {0x15,0x15,0x3f}, {0x15,0x3f,0x15}, {0x15,0x3f,0x3f}, {0x3f,0x15,0x15}, {0x3f,0x15,0x3f}, {0x3f,0x3f,0x15}, {0x3f,0x3f,0x3f}
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};
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#if 0
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static Bit8u cga_palette[64][3]= {
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{0x00,0x00,0x00}, {0x00,0x00,0x1f}, {0x00,0x1f,0x00}, {0x00,0x1f,0x1f}, {0x1f,0x00,0x00}, {0x1f,0x00,0x1f}, {0x1f,0x1f,0x00}, {0x1f,0x1f,0x1f},
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{0x0f,0x0f,0x0f}, {0x00,0x00,0x3f}, {0x00,0x3f,0x00}, {0x00,0x3f,0x3f}, {0x3f,0x00,0x00}, {0x3f,0x00,0x3f}, {0x3f,0x3f,0x00}, {0x3f,0x3f,0x3f},
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};
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#else
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static Bit8u cga_palette[16][3]= {
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{0x00,0x00,0x00}, {0x00,0x00,0x2a}, {0x00,0x2a,0x00}, {0x00,0x2a,0x2a}, {0x2a,0x00,0x00}, {0x2a,0x00,0x2a}, {0x2a,0x15,0x00}, {0x2a,0x2a,0x2a},
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{0x15,0x15,0x15}, {0x15,0x15,0x3f}, {0x15,0x3f,0x15}, {0x15,0x3f,0x3f}, {0x3f,0x15,0x15}, {0x3f,0x15,0x3f}, {0x3f,0x3f,0x15}, {0x3f,0x3f,0x3f},
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};
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#endif
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static Bit8u vga_palette[256][3]=
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{
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@ -126,31 +133,205 @@ static Bit8u vga_palette[256][3]=
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VideoModeBlock * CurMode;
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bool INT10_SetVideoMode(Bitu mode) {
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bool clearmem=true;
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Bit8u modeset_ctl,video_ctl,vga_switches;
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if (mode<256) {
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if (mode & 128) {
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clearmem=false;
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mode-=128;
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}
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} else {
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/* Check for special vesa mode bits */
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mode&=0xfff;
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}
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LOG(LOG_INT10,LOG_NORMAL)("Set Video Mode %X",mode);
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static bool SetCurMode(VideoModeBlock modeblock[],Bitu mode) {
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Bitu i=0;
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while (ModeList[i].mode!=0xffff) {
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if (ModeList[i].mode==mode) goto foundmode;
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while ( modeblock[i].mode!=0xffff) {
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if ( modeblock[i].mode==mode) goto foundmode;
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i++;
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}
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LOG(LOG_INT10,LOG_ERROR)("Trying to set illegal mode %X",mode);
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return false;
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foundmode:
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CurMode=&ModeList[i];
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CurMode=&modeblock[i];
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return true;
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}
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||||
|
||||
|
||||
static void FinishSetMode(bool clearmem) {
|
||||
Bitu i;
|
||||
/* Clear video memory if needs be */
|
||||
if (clearmem) {
|
||||
switch (CurMode->type) {
|
||||
case M_CGA4:
|
||||
case M_CGA2:
|
||||
for (i=0;i<16*1024;i++) {
|
||||
real_writew(0xb800,i*2,0x0000);
|
||||
}
|
||||
break;
|
||||
case M_TEXT:
|
||||
if (CurMode->mode==7) for (i=0;i<16*1024;i++) {
|
||||
real_writew(0xb000,i*2,0x0120);
|
||||
} else for (i=0;i<16*1024;i++) {
|
||||
real_writew(0xb800,i*2,0x0720);
|
||||
}
|
||||
break;
|
||||
case M_EGA16:
|
||||
case M_VGA:
|
||||
case M_LIN8:
|
||||
/* Just clear the whole 2 mb of memory */
|
||||
for (i=0;i<2*1024*1024/4;i++) {
|
||||
mem_writed(S3_LFB_BASE+i*4,0);
|
||||
}
|
||||
}
|
||||
}
|
||||
/* Setup the BIOS */
|
||||
if (CurMode->mode<128) real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MODE,CurMode->mode);
|
||||
else real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MODE,CurMode->mode-0x98); //Looks like the s3 bios
|
||||
real_writew(BIOSMEM_SEG,BIOSMEM_NB_COLS,CurMode->twidth);
|
||||
real_writew(BIOSMEM_SEG,BIOSMEM_PAGE_SIZE,CurMode->plength);
|
||||
real_writew(BIOSMEM_SEG,BIOSMEM_CRTC_ADDRESS,CurMode->mode==7 ? 0x3b4 : 0x3d4);
|
||||
real_writeb(BIOSMEM_SEG,BIOSMEM_NB_ROWS,CurMode->theight-1);
|
||||
real_writew(BIOSMEM_SEG,BIOSMEM_CHAR_HEIGHT,CurMode->cheight);
|
||||
real_writeb(BIOSMEM_SEG,BIOSMEM_VIDEO_CTL,(0x60|(clearmem << 7)));
|
||||
real_writeb(BIOSMEM_SEG,BIOSMEM_SWITCHES,0x09);
|
||||
real_writeb(BIOSMEM_SEG,BIOSMEM_MODESET_CTL,real_readb(BIOSMEM_SEG,BIOSMEM_MODESET_CTL)&0x7f);
|
||||
|
||||
// FIXME We nearly have the good tables. to be reworked
|
||||
real_writeb(BIOSMEM_SEG,BIOSMEM_DCC_INDEX,0x08); // 8 is VGA should be ok for now
|
||||
real_writew(BIOSMEM_SEG,BIOSMEM_VS_POINTER,0x00);
|
||||
real_writew(BIOSMEM_SEG,BIOSMEM_VS_POINTER+2,0x00);
|
||||
|
||||
// Set cursor shape
|
||||
if(CurMode->type==M_TEXT) {
|
||||
INT10_SetCursorShape(0x06,07);
|
||||
}
|
||||
// Set cursor pos for page 0..7
|
||||
for(i=0;i<8;i++) INT10_SetCursorPos(0,0,(Bit8u)i);
|
||||
// Set active page 0
|
||||
INT10_SetActivePage(0);
|
||||
/* Set some interrupt vectors */
|
||||
switch (CurMode->cheight) {
|
||||
case 8:RealSetVec(0x43,int10.rom.font_8_first);break;
|
||||
case 14:RealSetVec(0x43,int10.rom.font_14);break;
|
||||
case 16:RealSetVec(0x43,int10.rom.font_16);break;
|
||||
}
|
||||
/* Tell mouse resolution change */
|
||||
Mouse_NewVideoMode();
|
||||
}
|
||||
|
||||
bool INT10_SetVideoMode_OTHER(Bitu mode,bool clearmem) {
|
||||
Bitu i;
|
||||
switch (machine) {
|
||||
case MCH_CGA:
|
||||
if (mode>6) return false;
|
||||
case MCH_TANDY:
|
||||
if (mode>0xa) return false;
|
||||
if (!SetCurMode(ModeList_OTHER,mode)) {
|
||||
LOG(LOG_INT10,LOG_ERROR)("Trying to set illegal mode %X",mode);
|
||||
return false;
|
||||
}
|
||||
break;
|
||||
case MCH_HERC:
|
||||
if (mode!=7) return false;
|
||||
CurMode=&Hercules_Mode;
|
||||
break;
|
||||
}
|
||||
LOG(LOG_INT10,LOG_NORMAL)("Set Video Mode %X",mode);
|
||||
|
||||
/* Setup the VGA to the correct mode */
|
||||
// VGA_SetMode(CurMode->type);
|
||||
/* Setup the CRTC */
|
||||
Bitu crtc_base=machine==MCH_HERC ? 0x3b4 : 0x3d4;
|
||||
//Horizontal total
|
||||
IO_WriteW(crtc_base,0x00 | (CurMode->htotal) << 8);
|
||||
//Horizontal displayed
|
||||
IO_WriteW(crtc_base,0x01 | (CurMode->hdispend) << 8);
|
||||
//Horizontal sync position
|
||||
IO_WriteW(crtc_base,0x02 | (CurMode->hdispend+1) << 8);
|
||||
//Horizontal sync width, seems to be fixed to 0xa, for cga at least, hercules has 0xf
|
||||
IO_WriteW(crtc_base,0x03 | (0xa) << 8);
|
||||
////Vertical total
|
||||
IO_WriteW(crtc_base,0x04 | (CurMode->vtotal) << 8);
|
||||
//Vertical total adjust, 6 for cga,hercules,tandy
|
||||
IO_WriteW(crtc_base,0x05 | (6) << 8);
|
||||
//Vertical displayed
|
||||
IO_WriteW(crtc_base,0x06 | (CurMode->vdispend) << 8);
|
||||
//Vertical sync position
|
||||
IO_WriteW(crtc_base,0x07 | (CurMode->vdispend+1) << 8);
|
||||
//Maximum scanline
|
||||
Bit8u scanline;
|
||||
switch(CurMode->type) {
|
||||
case M_TEXT:
|
||||
if (machine==MCH_HERC) scanline=14;
|
||||
else scanline=8;
|
||||
break;
|
||||
case M_CGA2:
|
||||
scanline=2;
|
||||
case M_CGA4:
|
||||
if (CurMode->mode!=0xa) scanline=2;
|
||||
else scanline=4;
|
||||
case M_TANDY16:
|
||||
if (CurMode->mode!=0x9) scanline=2;
|
||||
else scanline=4;
|
||||
break;
|
||||
}
|
||||
IO_WriteW(crtc_base,0x09 | (scanline-1) << 8);
|
||||
//Setup the CGA palette using VGA DAC palette
|
||||
for (i=0;i<16;i++) VGA_DAC_SetEntry(i,cga_palette[i][0],cga_palette[i][1],cga_palette[i][2]);
|
||||
//Setup the tandy palette
|
||||
for (i=0;i<16;i++) VGA_DAC_CombineColor(i,i);
|
||||
//Setup the special registers for each machine type
|
||||
Bit8u mode_control_list[0xa+1]={
|
||||
0x2c,0x28,0x2d,0x29, //0-3
|
||||
0x2a,0x2e,0x1e,0x29, //4-7
|
||||
0x2a,0x2b,0x3b //8-a
|
||||
};
|
||||
Bit8u mode_control,color_select;
|
||||
switch (machine) {
|
||||
case MCH_HERC:
|
||||
IO_WriteB(0x3bf,0x3); //Enable changing all bits
|
||||
IO_WriteB(0x3b8,0x8); //TEXT mode and non-blinking characters
|
||||
IO_WriteB(0x3bf,0x0); //Disable changing all bits
|
||||
VGA_DAC_CombineColor(1,0xf);
|
||||
break;
|
||||
case MCH_CGA:
|
||||
mode_control=mode_control_list[CurMode->mode];
|
||||
if (CurMode->mode == 0x6) color_select=0x3f;
|
||||
else color_select=0x30;
|
||||
IO_WriteB(0x3d8,mode_control);
|
||||
IO_WriteB(0x3d9,color_select);
|
||||
real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,mode_control);
|
||||
real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_PAL,color_select);
|
||||
break;
|
||||
case MCH_TANDY:
|
||||
/* Init some registers */
|
||||
IO_WriteB(0x3da,0x1);IO_WriteB(0x3de,0xf); //Palette mask always 0xf
|
||||
IO_WriteB(0x3da,0x2);IO_WriteB(0x3de,0x0); //block border
|
||||
IO_WriteB(0x3da,0x3); //Tandy color overrides?
|
||||
switch (CurMode->mode) {
|
||||
case 0x8: case 0x9:
|
||||
IO_WriteB(0x3de,0x14);break;
|
||||
case 0xa:
|
||||
IO_WriteB(0x3de,0x0c);break;
|
||||
default:
|
||||
IO_WriteB(0x3de,0x0);break;
|
||||
}
|
||||
mode_control=mode_control_list[CurMode->mode];
|
||||
if (CurMode->mode == 0x6 || CurMode->mode==0xa) color_select=0x3f;
|
||||
else color_select=0x30;
|
||||
IO_WriteB(0x3d8,mode_control);
|
||||
IO_WriteB(0x3d9,color_select);
|
||||
real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,mode_control);
|
||||
real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_PAL,color_select);
|
||||
break;
|
||||
}
|
||||
FinishSetMode(clearmem);
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
bool INT10_SetVideoMode(Bitu mode) {
|
||||
bool clearmem=true;Bitu i;
|
||||
if ((mode<256) && (mode & 128)) {
|
||||
clearmem=false;
|
||||
mode-=128;
|
||||
}
|
||||
LOG(LOG_INT10,LOG_NORMAL)("Set Video Mode %X",mode);
|
||||
if (machine!=MCH_VGA) return INT10_SetVideoMode_OTHER(mode,clearmem);
|
||||
Bit8u modeset_ctl,video_ctl,vga_switches;
|
||||
if (!SetCurMode(ModeList_VGA,mode)){
|
||||
LOG(LOG_INT10,LOG_ERROR)("Trying to set illegal mode %X",mode);
|
||||
return false;
|
||||
}
|
||||
|
||||
/* First read mode setup settings from bios area */
|
||||
video_ctl=real_readb(BIOSMEM_SEG,BIOSMEM_VIDEO_CTL);
|
||||
|
|
@ -158,15 +339,12 @@ foundmode:
|
|||
modeset_ctl=real_readb(BIOSMEM_SEG,BIOSMEM_MODESET_CTL);
|
||||
|
||||
/* Setup the VGA to the correct mode */
|
||||
VGA_SetMode(CurMode->type);
|
||||
// VGA_SetMode(CurMode->type);
|
||||
|
||||
Bit16u crtc_base;
|
||||
bool mono_mode=CurMode->type == M_TEXT2;
|
||||
if (mono_mode) {
|
||||
crtc_base=0x3b4;
|
||||
} else {
|
||||
crtc_base=0x3d4;
|
||||
}
|
||||
bool mono_mode=(CurMode->type == M_TEXT && machine==MCH_HERC);
|
||||
if (mono_mode) crtc_base=0x3b4;
|
||||
else crtc_base=0x3d4;
|
||||
/* Setup MISC Output Register */
|
||||
Bit8u misc_output=0x2 | (mono_mode ? 0x0 : 0x1);
|
||||
IO_Write(0x3c2,misc_output); //Setup for 3b4 or 3d4
|
||||
|
|
@ -178,8 +356,7 @@ foundmode:
|
|||
(CurMode->special & _EGA_HALF_CLOCK) ? 0x08 : 0x00;
|
||||
seq_data[4]|=0x02; //More than 64kb
|
||||
switch (CurMode->type) {
|
||||
case M_TEXT2:
|
||||
case M_TEXT16:
|
||||
case M_TEXT:
|
||||
seq_data[2]|=0x3; //Enable plane 0 and 1
|
||||
seq_data[4]|=0x05; //Alpanumeric and odd/even enabled
|
||||
break;
|
||||
|
|
@ -223,28 +400,17 @@ foundmode:
|
|||
blank_end = (CurMode->htotal-2) & 0x7f;
|
||||
}
|
||||
IO_Write(crtc_base,0x03);IO_Write(crtc_base+1,0x80|(blank_end & 0x1f));
|
||||
// hor_overflow|=(blank_end & 0x40) >> 3;
|
||||
|
||||
/* Start Horizontal Retrace */
|
||||
Bitu ret_start;
|
||||
if (CurMode->special & _EGA_HALF_CLOCK) {
|
||||
ret_start = (CurMode->hdispend+2);
|
||||
} else {
|
||||
ret_start = (CurMode->hdispend+4);
|
||||
}
|
||||
if (CurMode->special & _EGA_HALF_CLOCK) ret_start = (CurMode->hdispend+2);
|
||||
else ret_start = (CurMode->hdispend+4);
|
||||
IO_Write(crtc_base,0x04);IO_Write(crtc_base+1,ret_start);
|
||||
hor_overflow|=(ret_start & 0x100) >> 4;
|
||||
/* End Horizontal Retrace */
|
||||
Bitu ret_end;
|
||||
if (CurMode->special & _EGA_HALF_CLOCK) {
|
||||
ret_end = (CurMode->htotal-2) & 0x3f;
|
||||
} else {
|
||||
ret_end = (CurMode->htotal-4) & 0x3f;
|
||||
}
|
||||
if (CurMode->special & _EGA_HALF_CLOCK) ret_end = (CurMode->htotal-2) & 0x3f;
|
||||
else ret_end = (CurMode->htotal-4) & 0x3f;
|
||||
IO_Write(crtc_base,0x05);IO_Write(crtc_base+1,(ret_end & 0x1f) | (blank_end & 0x20) << 2);
|
||||
// hor_overflow|=(ret_end & 0x20);
|
||||
//TODO Be sure about these ending values in extended overflow of s3
|
||||
|
||||
/* Vertical Total */
|
||||
IO_Write(crtc_base,0x06);IO_Write(crtc_base+1,(CurMode->vtotal-2));
|
||||
overflow|=((CurMode->vtotal-2) & 0x100) >> 8;
|
||||
|
|
@ -286,8 +452,7 @@ foundmode:
|
|||
/* Maximum scanline / Underline Location */
|
||||
if (CurMode->special & _EGA_LINE_DOUBLE) max_scanline|=0x80;
|
||||
switch (CurMode->type) {
|
||||
case M_TEXT2:
|
||||
case M_TEXT16:
|
||||
case M_TEXT:
|
||||
max_scanline|=CurMode->cheight-1;
|
||||
underline=0x1f;
|
||||
break;
|
||||
|
|
@ -297,7 +462,6 @@ foundmode:
|
|||
break;
|
||||
case M_LIN8:
|
||||
underline=0x60; //Seems to enable the every 4th clock on my s3
|
||||
// if (CurMode->special & _VGA_LINE_DOUBLE) max_scanline|=1;
|
||||
break;
|
||||
}
|
||||
IO_Write(crtc_base,0x09);IO_Write(crtc_base+1,max_scanline);
|
||||
|
|
@ -328,8 +492,7 @@ foundmode:
|
|||
case M_EGA16:
|
||||
mode_control=0xe3;
|
||||
break;
|
||||
case M_TEXT2:
|
||||
case M_TEXT16:
|
||||
case M_TEXT:
|
||||
case M_VGA:
|
||||
mode_control=0xa3;
|
||||
break;
|
||||
|
|
@ -342,16 +505,9 @@ foundmode:
|
|||
IO_Write(crtc_base,0x11);
|
||||
IO_Write(crtc_base+1,IO_Read(crtc_base+1)|0x80);
|
||||
/* Setup the correct clock */
|
||||
switch (CurMode->type) {
|
||||
case M_VGA:
|
||||
case M_TEXT2:
|
||||
case M_TEXT16:
|
||||
case M_EGA16:
|
||||
//Stick to 25mhz clock for now
|
||||
break;
|
||||
default:
|
||||
if (CurMode->mode>=0x100) {
|
||||
misc_output|=0xef; //Select clock 3
|
||||
Bitu clock=CurMode->vtotal*8*CurMode->htotal*CurMode->rate;
|
||||
Bitu clock=CurMode->vtotal*8*CurMode->htotal*70;
|
||||
VGA_SetClock(3,clock/1000);
|
||||
}
|
||||
/* Write Misc Output */
|
||||
|
|
@ -363,13 +519,9 @@ foundmode:
|
|||
gfx_data[0x7]=0xf; /* Color don't care */
|
||||
gfx_data[0x8]=0xff; /* BitMask */
|
||||
switch (CurMode->type) {
|
||||
case M_TEXT2:
|
||||
case M_TEXT:
|
||||
gfx_data[0x5]|=0x10; //Odd-Even Mode
|
||||
gfx_data[0x6]|=0x0a; //alphanumeric mode at 0xb000=0x7fff
|
||||
break;
|
||||
case M_TEXT16:
|
||||
gfx_data[0x5]|=0x10; //Odd-Even Mode
|
||||
gfx_data[0x6]|=0x0e; //alphanumeric mode at 0xb800=0xbfff
|
||||
gfx_data[0x6]|=mono_mode ? 0x0a : 0x0e; //Either b800 or b000
|
||||
break;
|
||||
case M_LIN8:
|
||||
case M_VGA:
|
||||
|
|
@ -393,7 +545,7 @@ foundmode:
|
|||
Bit8u att_data[ATT_REGS];
|
||||
memset(att_data,0,ATT_REGS);
|
||||
att_data[0x12]=0xf; //Always have all color planes enabled
|
||||
/* Porgram Attribute Controller */
|
||||
/* Program Attribute Controller */
|
||||
switch (CurMode->type) {
|
||||
case M_EGA16:
|
||||
if (CurMode->mode>0xe) goto att_text16;
|
||||
|
|
@ -401,15 +553,13 @@ foundmode:
|
|||
att_data[i]=i;
|
||||
att_data[i+8]=i+0x10;
|
||||
}
|
||||
att_data[0x10]=0x01; //Color Graphics
|
||||
break;
|
||||
case M_TANDY16:
|
||||
att_data[0x10]=0x01; //Color Graphics
|
||||
for (i=0;i<16;i++) {
|
||||
att_data[i]=i;
|
||||
}
|
||||
for (i=0;i<16;i++) att_data[i]=i;
|
||||
break;
|
||||
case M_TEXT2:
|
||||
case M_TEXT16:
|
||||
case M_TEXT:
|
||||
att_data[0x13]=0x08; //Pel panning on 8, although we don't have 9 dot text mode
|
||||
att_data[0x10]=0x0C; //Color Text with blinking
|
||||
att_text16:
|
||||
|
|
@ -419,30 +569,31 @@ att_text16:
|
|||
}
|
||||
break;
|
||||
case M_CGA2:
|
||||
IO_Write(0x3d9,0x7); //Setup using CGA color select register
|
||||
real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_PAL,0x7);
|
||||
goto skipatt;
|
||||
att_data[0x10]=0x01; //Color Graphics
|
||||
att_data[0]=0x0;
|
||||
att_data[1]=0xf;
|
||||
att_data[0x12]=0x1; //Only enable 1 plane
|
||||
real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_PAL,0x3f);
|
||||
break;
|
||||
case M_CGA4:
|
||||
//Set Bit 2 in black/white mode 0x5
|
||||
IO_Write(0x3d8,0xa+(CurMode->mode==0x5) ? 0x4 : 0);
|
||||
IO_Write(0x3d9,0x30); //Setup using CGA color select register
|
||||
att_data[0x10]=0x01; //Color Graphics
|
||||
att_data[0]=0x0;
|
||||
att_data[1]=0x3;
|
||||
att_data[2]=0x5;
|
||||
att_data[3]=0x7;
|
||||
real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_PAL,0x30);
|
||||
goto skipatt;
|
||||
break;
|
||||
case M_VGA:
|
||||
case M_LIN8:
|
||||
for (i=0;i<16;i++) {
|
||||
att_data[i]=i;
|
||||
}
|
||||
for (i=0;i<16;i++) att_data[i]=i;
|
||||
att_data[0x10]=0x41; //Color Graphics 8-bit
|
||||
break;
|
||||
}
|
||||
|
||||
IO_Read(mono_mode ? 0x3ba : 0x3da);
|
||||
for (i=0;i<ATT_REGS;i++) {
|
||||
IO_Write(0x3c0,i);
|
||||
IO_Write(0x3c0,att_data[i]);
|
||||
}
|
||||
skipatt:
|
||||
/* Setup the DAC */
|
||||
IO_Write(0x3c8,0);
|
||||
switch (CurMode->type) {
|
||||
|
|
@ -463,8 +614,7 @@ skipatt:
|
|||
IO_Write(0x3c9,cga_palette[i][2]);
|
||||
}
|
||||
break;
|
||||
case M_TEXT2:
|
||||
case M_TEXT16:
|
||||
case M_TEXT:
|
||||
dac_text16:
|
||||
for (i=0;i<64;i++) {
|
||||
IO_Write(0x3c9,text_palette[i][0]);
|
||||
|
|
@ -486,22 +636,16 @@ dac_text16:
|
|||
switch (CurMode->type) {
|
||||
case M_CGA2:
|
||||
feature=(feature&~0x30)|0x20;
|
||||
IO_Write(0x3d8,0x12); //Setup using CGA color select register
|
||||
real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,0x12);
|
||||
break;
|
||||
case M_CGA4:
|
||||
feature=(feature&~0x30)|0x20;
|
||||
IO_Write(0x3d8,0x2); //Setup using CGA color select register
|
||||
real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,0x2);
|
||||
break;
|
||||
case M_TANDY16:
|
||||
feature=(feature&~0x30)|0x20;
|
||||
IO_Write(0x3df,0x80); //Enter 32k mode and banks on 0
|
||||
break;
|
||||
case M_TEXT2:
|
||||
feature=(feature&~0x30)|0x30;
|
||||
break;
|
||||
case M_TEXT16:
|
||||
case M_TEXT:
|
||||
feature=(feature&~0x30)|0x20;
|
||||
break;
|
||||
case M_EGA16:
|
||||
|
|
@ -527,70 +671,10 @@ dac_text16:
|
|||
IO_Write(crtc_base,0x39);IO_Write(crtc_base+1,0xa5); //Register lock 2
|
||||
|
||||
/* Load text mode font */
|
||||
if (CurMode->type<=M_TEXT16) {
|
||||
if (CurMode->type==M_TEXT) {
|
||||
INT10_LoadFont(Real2Phys(int10.rom.font_16),true,256,0,0,16);
|
||||
}
|
||||
/* Clear video memory if needs be */
|
||||
if (clearmem) {
|
||||
switch (CurMode->type) {
|
||||
case M_CGA4:
|
||||
case M_CGA2:
|
||||
for (i=0;i<16*1024;i++) {
|
||||
real_writew(0xb800,i*2,0x0000);
|
||||
}
|
||||
break;
|
||||
case M_TEXT2:
|
||||
for (i=0;i<16*1024;i++) {
|
||||
real_writew(0xb000,i*2,0x0120);
|
||||
}
|
||||
break;
|
||||
case M_TEXT16:
|
||||
for (i=0;i<16*1024;i++) {
|
||||
real_writew(0xb800,i*2,0x0720);
|
||||
}
|
||||
break;
|
||||
case M_EGA16:
|
||||
case M_VGA:
|
||||
case M_LIN8:
|
||||
/* Just clear the whole 2 mb of memory */
|
||||
for (i=0;i<2*1024*1024/4;i++) {
|
||||
mem_writed(S3_LFB_BASE+i*4,0);
|
||||
}
|
||||
}
|
||||
}
|
||||
/* Setup the BIOS */
|
||||
if (mode<128) real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MODE,mode);
|
||||
else real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MODE,mode-0x98); //Looks like the s3 bios
|
||||
real_writew(BIOSMEM_SEG,BIOSMEM_NB_COLS,CurMode->twidth);
|
||||
real_writew(BIOSMEM_SEG,BIOSMEM_PAGE_SIZE,CurMode->plength);
|
||||
real_writew(BIOSMEM_SEG,BIOSMEM_CRTC_ADDRESS,crtc_base);
|
||||
real_writeb(BIOSMEM_SEG,BIOSMEM_NB_ROWS,CurMode->theight-1);
|
||||
real_writew(BIOSMEM_SEG,BIOSMEM_CHAR_HEIGHT,CurMode->cheight);
|
||||
real_writeb(BIOSMEM_SEG,BIOSMEM_VIDEO_CTL,(0x60|(clearmem << 7)));
|
||||
real_writeb(BIOSMEM_SEG,BIOSMEM_SWITCHES,0x09);
|
||||
real_writeb(BIOSMEM_SEG,BIOSMEM_MODESET_CTL,real_readb(BIOSMEM_SEG,BIOSMEM_MODESET_CTL)&0x7f);
|
||||
|
||||
// FIXME We nearly have the good tables. to be reworked
|
||||
real_writeb(BIOSMEM_SEG,BIOSMEM_DCC_INDEX,0x08); // 8 is VGA should be ok for now
|
||||
real_writew(BIOSMEM_SEG,BIOSMEM_VS_POINTER,0x00);
|
||||
real_writew(BIOSMEM_SEG,BIOSMEM_VS_POINTER+2,0x00);
|
||||
|
||||
// Set cursor shape
|
||||
if(CurMode->type<=M_TEXT16) {
|
||||
INT10_SetCursorShape(0x06,07);
|
||||
}
|
||||
// Set cursor pos for page 0..7
|
||||
for(i=0;i<8;i++) INT10_SetCursorPos(0,0,(Bit8u)i);
|
||||
// Set active page 0
|
||||
INT10_SetActivePage(0);
|
||||
/* Set some interrupt vectors */
|
||||
switch (CurMode->cheight) {
|
||||
case 8:RealSetVec(0x43,int10.rom.font_8_first);break;
|
||||
case 14:RealSetVec(0x43,int10.rom.font_14);break;
|
||||
case 16:RealSetVec(0x43,int10.rom.font_16);break;
|
||||
}
|
||||
/* Tell mouse resolution change */
|
||||
Mouse_NewVideoMode();
|
||||
FinishSetMode(clearmem);
|
||||
return true;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: int10_vesa.cpp,v 1.7 2004-01-11 09:27:52 harekiet Exp $ */
|
||||
/* $Id: int10_vesa.cpp,v 1.8 2004-02-29 22:18:24 harekiet Exp $ */
|
||||
|
||||
#include <string.h>
|
||||
#include <stddef.h>
|
||||
|
|
@ -125,12 +125,12 @@ Bit8u VESA_GetSVGAModeInformation(Bit16u mode,Bit16u seg,Bit16u off) {
|
|||
|
||||
Bitu i=0;
|
||||
if (mode<0x100) return 0x01;
|
||||
while (ModeList[i].mode!=0xffff) {
|
||||
if (mode==ModeList[i].mode) goto foundit; else i++;
|
||||
while (ModeList_VGA[i].mode!=0xffff) {
|
||||
if (mode==ModeList_VGA[i].mode) goto foundit; else i++;
|
||||
}
|
||||
return 0x01;
|
||||
foundit:
|
||||
VideoModeBlock * mblock=&ModeList[i];
|
||||
VideoModeBlock * mblock=&ModeList_VGA[i];
|
||||
switch (mblock->type) {
|
||||
case M_LIN8: //Linear 8-bit
|
||||
WLE(minfo.ModeAttributes,0x9b);
|
||||
|
|
@ -310,9 +310,9 @@ void INT10_SetupVESA(void) {
|
|||
i=0;
|
||||
int10.rom.vesa_modes=RealMake(0xc000,int10.rom.used);
|
||||
//TODO Maybe add normal vga modes too, but only seems to complicate things
|
||||
while (ModeList[i].mode!=0xffff) {
|
||||
if (ModeList[i].mode>=0x100){
|
||||
phys_writew(PhysMake(0xc000,int10.rom.used),ModeList[i].mode);
|
||||
while (ModeList_VGA[i].mode!=0xffff) {
|
||||
if (ModeList_VGA[i].mode>=0x100){
|
||||
phys_writew(PhysMake(0xc000,int10.rom.used),ModeList_VGA[i].mode);
|
||||
int10.rom.used+=2;
|
||||
}
|
||||
i++;
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue