From f95d934328e87aee0d62882f13d88d0bf1eb1ea0 Mon Sep 17 00:00:00 2001 From: Peter Veenstra Date: Sat, 11 Apr 2009 07:58:39 +0000 Subject: [PATCH] minor stuff Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@3341 --- src/ints/int10.cpp | 6 +++--- src/ints/int10.h | 6 +++--- src/ints/int10_misc.cpp | 6 +++--- src/ints/int10_vesa.cpp | 4 ++-- 4 files changed, 11 insertions(+), 11 deletions(-) diff --git a/src/ints/int10.cpp b/src/ints/int10.cpp index 0f51dcf6..1e25c925 100644 --- a/src/ints/int10.cpp +++ b/src/ints/int10.cpp @@ -16,7 +16,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* $Id: int10.cpp,v 1.54 2009-01-25 12:00:52 c2woody Exp $ */ +/* $Id: int10.cpp,v 1.55 2009-04-11 07:58:39 qbix79 Exp $ */ #include "dosbox.h" #include "mem.h" @@ -635,10 +635,10 @@ graphics_chars: INT10_EGA_RIL_WriteRegister(reg_bl, reg_bh, reg_dx); break; case 0xf2: - INT10_EGA_RIL_ReadRegisterRange(reg_bl, reg_ch, reg_cl, reg_dx, SegPhys(es)+reg_bx); + INT10_EGA_RIL_ReadRegisterRange(reg_ch, reg_cl, reg_dx, SegPhys(es)+reg_bx); break; case 0xf3: - INT10_EGA_RIL_WriteRegisterRange(reg_bl, reg_ch, reg_cl, reg_dx, SegPhys(es)+reg_bx); + INT10_EGA_RIL_WriteRegisterRange(reg_ch, reg_cl, reg_dx, SegPhys(es)+reg_bx); break; case 0xf4: INT10_EGA_RIL_ReadRegisterSet(reg_cx, SegPhys(es)+reg_bx); diff --git a/src/ints/int10.h b/src/ints/int10.h index 4e5250bc..6eae71e3 100644 --- a/src/ints/int10.h +++ b/src/ints/int10.h @@ -16,7 +16,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* $Id: int10.h,v 1.36 2008-05-10 17:33:28 c2woody Exp $ */ +/* $Id: int10.h,v 1.37 2009-04-11 07:58:39 qbix79 Exp $ */ #include "vga.h" @@ -219,8 +219,8 @@ void INT10_SetupVESA(void); RealPt INT10_EGA_RIL_GetVersionPt(void); void INT10_EGA_RIL_ReadRegister(Bit8u & bl, Bit16u dx); void INT10_EGA_RIL_WriteRegister(Bit8u & bl, Bit8u bh, Bit16u dx); -void INT10_EGA_RIL_ReadRegisterRange(Bit8u & bl, Bit8u ch, Bit8u cl, Bit16u dx, PhysPt dst); -void INT10_EGA_RIL_WriteRegisterRange(Bit8u & bl, Bit8u ch, Bit8u cl, Bit16u dx, PhysPt dst); +void INT10_EGA_RIL_ReadRegisterRange(Bit8u ch, Bit8u cl, Bit16u dx, PhysPt dst); +void INT10_EGA_RIL_WriteRegisterRange(Bit8u ch, Bit8u cl, Bit16u dx, PhysPt dst); void INT10_EGA_RIL_ReadRegisterSet(Bit16u cx, PhysPt tbl); void INT10_EGA_RIL_WriteRegisterSet(Bit16u cx, PhysPt tbl); diff --git a/src/ints/int10_misc.cpp b/src/ints/int10_misc.cpp index 8f0a1821..c983f395 100644 --- a/src/ints/int10_misc.cpp +++ b/src/ints/int10_misc.cpp @@ -16,7 +16,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* $Id: int10_misc.cpp,v 1.19 2008-08-01 19:52:02 c2woody Exp $ */ +/* $Id: int10_misc.cpp,v 1.20 2009-04-11 07:58:39 qbix79 Exp $ */ #include "dosbox.h" #include "mem.h" @@ -228,7 +228,7 @@ void INT10_EGA_RIL_WriteRegister(Bit8u & bl, Bit8u bh, Bit16u dx) { } } -void INT10_EGA_RIL_ReadRegisterRange(Bit8u & bl, Bit8u ch, Bit8u cl, Bit16u dx, PhysPt dst) { +void INT10_EGA_RIL_ReadRegisterRange(Bit8u ch, Bit8u cl, Bit16u dx, PhysPt dst) { Bitu port = 0; Bitu regs = 0; EGA_RIL(dx,port,regs); @@ -247,7 +247,7 @@ void INT10_EGA_RIL_ReadRegisterRange(Bit8u & bl, Bit8u ch, Bit8u cl, Bit16u dx, } } -void INT10_EGA_RIL_WriteRegisterRange(Bit8u & bl, Bit8u ch, Bit8u cl, Bit16u dx, PhysPt src) { +void INT10_EGA_RIL_WriteRegisterRange(Bit8u ch, Bit8u cl, Bit16u dx, PhysPt src) { Bitu port = 0; Bitu regs = 0; EGA_RIL(dx,port,regs); diff --git a/src/ints/int10_vesa.cpp b/src/ints/int10_vesa.cpp index d4cca91d..c718a2fb 100644 --- a/src/ints/int10_vesa.cpp +++ b/src/ints/int10_vesa.cpp @@ -16,7 +16,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* $Id: int10_vesa.cpp,v 1.37 2008-09-07 10:55:15 c2woody Exp $ */ +/* $Id: int10_vesa.cpp,v 1.38 2009-04-11 07:58:39 qbix79 Exp $ */ #include #include @@ -267,7 +267,7 @@ Bit8u VESA_SetSVGAMode(Bit16u mode) { return 0x00; } return 0x01; -}; +} Bit8u VESA_GetSVGAMode(Bit16u & mode) { if (int10.vesa_setmode!=0xffff) mode=int10.vesa_setmode;