update 64bit recompiler core to handle OSX (memory addressing, stack alignment) from gulikoza
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@3674
This commit is contained in:
Sebastian Strohhäcker
parent
4101963e22
commit
fe65a34111
1 changed files with 89 additions and 39 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2002-2010 The DOSBox Team
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* Copyright (C) 2002-2011 The DOSBox Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -84,7 +84,7 @@ static void gen_mov_regs(HostReg reg_dst,HostReg reg_src) {
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}
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static INLINE void gen_memaddr(HostReg reg,void* data) {
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static INLINE void gen_reg_memaddr(HostReg reg,void* data) {
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Bit64s diff = (Bit64s)data-((Bit64s)cache.pos+5);
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if ((diff<0x80000000LL) && (diff>-0x80000000LL)) {
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cache_addb(0x05+(reg<<3));
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@ -98,13 +98,28 @@ static INLINE void gen_memaddr(HostReg reg,void* data) {
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}
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}
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static INLINE void gen_memaddr(Bitu op,void* data,Bitu off) {
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Bit64s diff;
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diff = (Bit64s)data-((Bit64s)cache.pos+off+5);
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if ((diff<0x80000000LL) && (diff>-0x80000000LL)) {
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// RIP-relative addressing is offset after the instruction
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cache_addb(op+1);
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cache_addd((Bit32u)(((Bit64u)diff)&0xffffffffLL));
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} else if ((Bit64u)data<0x100000000LL) {
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cache_addb(op);
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cache_addb(0x25);
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cache_addd((Bit32u)(((Bit64u)data)&0xffffffffLL));
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} else {
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E_Exit("DRC64:Unhandled memory reference");
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}
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}
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// move a 32bit (dword==true) or 16bit (dword==false) value from memory into dest_reg
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// 16bit moves may destroy the upper 16bit of the destination register
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static void gen_mov_word_to_reg(HostReg dest_reg,void* data,bool dword) {
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if (!dword) cache_addb(0x66);
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cache_addb(0x8b); // mov reg,[data]
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gen_memaddr(dest_reg,data);
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gen_reg_memaddr(dest_reg,data);
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}
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// move a 16bit constant value into dest_reg
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@ -125,7 +140,7 @@ static void gen_mov_dword_to_reg_imm(HostReg dest_reg,Bit32u imm) {
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static void gen_mov_word_from_reg(HostReg src_reg,void* dest,bool dword) {
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if (!dword) cache_addb(0x66);
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cache_addb(0x89); // mov [data],reg
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gen_memaddr(src_reg,dest);
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gen_reg_memaddr(src_reg,dest);
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}
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// move an 8bit value from memory into dest_reg
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@ -134,7 +149,7 @@ static void gen_mov_word_from_reg(HostReg src_reg,void* dest,bool dword) {
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// registers might not be directly byte-accessible on some architectures
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static void gen_mov_byte_to_reg_low(HostReg dest_reg,void* data) {
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cache_addb(0x8a); // mov reg,[data]
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gen_memaddr(dest_reg,data);
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gen_reg_memaddr(dest_reg,data);
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}
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// move an 8bit value from memory into dest_reg
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@ -144,7 +159,7 @@ static void gen_mov_byte_to_reg_low(HostReg dest_reg,void* data) {
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static void gen_mov_byte_to_reg_low_canuseword(HostReg dest_reg,void* data) {
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cache_addb(0x66);
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cache_addb(0x8b); // mov reg,[data]
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gen_memaddr(dest_reg,data);
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gen_reg_memaddr(dest_reg,data);
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}
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// move an 8bit constant value into dest_reg
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@ -169,7 +184,7 @@ static void gen_mov_byte_to_reg_low_imm_canuseword(HostReg dest_reg,Bit8u imm) {
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// move the lowest 8bit of a register into memory
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static void gen_mov_byte_from_reg_low(HostReg src_reg,void* dest) {
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cache_addb(0x88); // mov [data],reg
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gen_memaddr(src_reg,dest);
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gen_reg_memaddr(src_reg,dest);
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}
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@ -193,7 +208,7 @@ static void gen_extend_word(bool sign,HostReg reg) {
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// add a 32bit value from memory to a full register
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static void gen_add(HostReg reg,void* op) {
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cache_addb(0x03); // add reg,[data]
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gen_memaddr(reg,op);
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gen_reg_memaddr(reg,op);
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}
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// add a 32bit constant value to a full register
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@ -212,9 +227,8 @@ static void gen_and_imm(HostReg reg,Bit32u imm) {
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// move a 32bit constant value into memory
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static void gen_mov_direct_dword(void* dest,Bit32u imm) {
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cache_addw(0x04c7); // mov [data],imm
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cache_addb(0x25);
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cache_addd((Bit32u)(((Bit64u)dest)&0xffffffffLL));
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cache_addb(0xc7); // mov [data],imm
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gen_memaddr(0x04,dest,4);
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cache_addd(imm);
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}
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@ -235,9 +249,8 @@ static void INLINE gen_mov_direct_ptr(void* dest,DRC_PTR_SIZE_IM imm) {
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// add an 8bit constant value to a memory value
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static void gen_add_direct_byte(void* dest,Bit8s imm) {
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cache_addw(0x0483); // add [data],imm
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cache_addb(0x25);
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cache_addd((Bit32u)(((Bit64u)dest)&0xffffffffLL));
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cache_addb(0x83); // add [data],imm
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gen_memaddr(0x4,dest,1);
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cache_addb(imm);
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}
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@ -248,18 +261,20 @@ static void gen_add_direct_word(void* dest,Bit32u imm,bool dword) {
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return;
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}
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if (!dword) cache_addb(0x66);
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cache_addw(0x0481); // add [data],imm
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cache_addb(0x25);
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cache_addd((Bit32u)(((Bit64u)dest)&0xffffffffLL));
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if (dword) cache_addd((Bit32u)imm);
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else cache_addw((Bit16u)imm);
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cache_addb(0x81); // add [data],imm
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if (dword) {
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gen_memaddr(0x4,dest,4); // size of following immediate value
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cache_addd((Bit32u)imm);
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} else {
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gen_memaddr(0x4,dest,2); // size of following immediate value
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cache_addw((Bit16u)imm);
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}
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}
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// subtract an 8bit constant value from a memory value
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static void gen_sub_direct_byte(void* dest,Bit8s imm) {
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cache_addw(0x2c83); // sub [data],imm
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cache_addb(0x25);
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cache_addd((Bit32u)(((Bit64u)dest)&0xffffffffLL));
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cache_addb(0x83); // sub [data],imm
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gen_memaddr(0x2c,dest,1);
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cache_addb(imm);
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}
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@ -270,11 +285,14 @@ static void gen_sub_direct_word(void* dest,Bit32u imm,bool dword) {
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return;
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}
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if (!dword) cache_addb(0x66);
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cache_addw(0x2c81); // sub [data],imm
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cache_addb(0x25);
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cache_addd((Bit32u)(((Bit64u)dest)&0xffffffffLL));
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if (dword) cache_addd((Bit32u)imm);
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else cache_addw((Bit16u)imm);
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cache_addw(0x81); // sub [data],imm
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if (dword) {
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gen_memaddr(0x2c,dest,4); // size of following immediate value
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cache_addd((Bit32u)imm);
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} else {
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gen_memaddr(0x2c,dest,2); // size of following immediate value
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cache_addw((Bit16u)imm);
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}
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}
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@ -324,10 +342,18 @@ static INLINE void gen_lea(HostReg dest_reg,Bitu scale,Bits imm) {
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// generate a call to a parameterless function
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static void INLINE gen_call_function_raw(void * func) {
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cache_addb(0x48);
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cache_addw(0xec83);
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cache_addb(0x08); // sub rsp,0x08 (align stack to 16 byte boundary)
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cache_addb(0x48);
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cache_addb(0xb8); // mov reg,imm64
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cache_addq((Bit64u)func);
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cache_addw(0xd0ff);
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cache_addb(0x48);
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cache_addw(0xc483);
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cache_addb(0x08); // add rsp,0x08 (reset alignment)
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}
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// generate a call to a function with paramcount parameters
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@ -350,9 +376,13 @@ static Bit64u INLINE gen_call_function_setup(void * func,Bitu paramcount,bool fa
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cache_addw(0xc483); // add rsp,0x08
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cache_addb(0x08);
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// stack is 16 byte aligned now
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cache_addb(0x50); // push rax (==old rsp)
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Bit64u proc_addr=(Bit64u)cache.pos;
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// returned address relates to where the address is stored in gen_call_function_raw
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Bit64u proc_addr=(Bit64u)cache.pos-4;
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// Do the actual call to the procedure
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cache_addb(0x48);
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@ -596,6 +626,8 @@ static void gen_return_function(void) {
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#ifdef DRC_FLAGS_INVALIDATION
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// called when a call to a function can be replaced by a
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// call to a simpler function
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// check gen_call_function_raw and gen_call_function_setup
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// for the targeted code
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static void gen_fill_function_ptr(Bit8u * pos,void* fct_ptr,Bitu flags_type) {
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#ifdef DRC_FLAGS_INVALIDATION_DCODE
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// try to avoid function calls but rather directly fill in code
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@ -604,36 +636,46 @@ static void gen_fill_function_ptr(Bit8u * pos,void* fct_ptr,Bitu flags_type) {
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case t_ADDw:
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case t_ADDd:
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*(Bit32u*)(pos+0)=0xf001f889; // mov eax,edi; add eax,esi
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*(Bit32u*)(pos+4)=0x909006eb; // skip
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*(Bit32u*)(pos+4)=0x90900eeb; // skip
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*(Bit32u*)(pos+8)=0x90909090;
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*(Bit32u*)(pos+12)=0x90909090;
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*(Bit32u*)(pos+16)=0x90909090;
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break;
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case t_ORb:
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case t_ORw:
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case t_ORd:
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*(Bit32u*)(pos+0)=0xf009f889; // mov eax,edi; or eax,esi
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*(Bit32u*)(pos+4)=0x909006eb; // skip
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*(Bit32u*)(pos+4)=0x90900eeb; // skip
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*(Bit32u*)(pos+8)=0x90909090;
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*(Bit32u*)(pos+12)=0x90909090;
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*(Bit32u*)(pos+16)=0x90909090;
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break;
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case t_ANDb:
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case t_ANDw:
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case t_ANDd:
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*(Bit32u*)(pos+0)=0xf021f889; // mov eax,edi; and eax,esi
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*(Bit32u*)(pos+4)=0x909006eb; // skip
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*(Bit32u*)(pos+4)=0x90900eeb; // skip
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*(Bit32u*)(pos+8)=0x90909090;
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*(Bit32u*)(pos+12)=0x90909090;
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*(Bit32u*)(pos+16)=0x90909090;
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break;
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case t_SUBb:
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case t_SUBw:
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case t_SUBd:
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*(Bit32u*)(pos+0)=0xf029f889; // mov eax,edi; sub eax,esi
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*(Bit32u*)(pos+4)=0x909006eb; // skip
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*(Bit32u*)(pos+4)=0x90900eeb; // skip
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*(Bit32u*)(pos+8)=0x90909090;
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*(Bit32u*)(pos+12)=0x90909090;
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*(Bit32u*)(pos+16)=0x90909090;
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break;
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case t_XORb:
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case t_XORw:
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case t_XORd:
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*(Bit32u*)(pos+0)=0xf031f889; // mov eax,edi; xor eax,esi
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*(Bit32u*)(pos+4)=0x909006eb; // skip
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*(Bit32u*)(pos+4)=0x90900eeb; // skip
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*(Bit32u*)(pos+8)=0x90909090;
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*(Bit32u*)(pos+12)=0x90909090;
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*(Bit32u*)(pos+16)=0x90909090;
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break;
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case t_CMPb:
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case t_CMPw:
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@ -641,37 +683,45 @@ static void gen_fill_function_ptr(Bit8u * pos,void* fct_ptr,Bitu flags_type) {
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case t_TESTb:
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case t_TESTw:
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case t_TESTd:
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*(Bit32u*)(pos+0)=0x90900aeb; // skip
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*(Bit32u*)(pos+0)=0x909012eb; // skip
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*(Bit32u*)(pos+4)=0x90909090;
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*(Bit32u*)(pos+8)=0x90909090;
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*(Bit32u*)(pos+12)=0x90909090;
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*(Bit32u*)(pos+16)=0x90909090;
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break;
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case t_INCb:
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case t_INCw:
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case t_INCd:
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*(Bit32u*)(pos+0)=0xc0fff889; // mov eax,edi; inc eax
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*(Bit32u*)(pos+4)=0x909006eb; // skip
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*(Bit32u*)(pos+4)=0x90900eeb; // skip
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*(Bit32u*)(pos+8)=0x90909090;
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*(Bit32u*)(pos+12)=0x90909090;
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*(Bit32u*)(pos+16)=0x90909090;
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break;
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case t_DECb:
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case t_DECw:
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case t_DECd:
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*(Bit32u*)(pos+0)=0xc8fff889; // mov eax,edi; dec eax
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*(Bit32u*)(pos+4)=0x909006eb; // skip
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*(Bit32u*)(pos+4)=0x90900eeb; // skip
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*(Bit32u*)(pos+8)=0x90909090;
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*(Bit32u*)(pos+12)=0x90909090;
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*(Bit32u*)(pos+16)=0x90909090;
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break;
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case t_NEGb:
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case t_NEGw:
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case t_NEGd:
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*(Bit32u*)(pos+0)=0xd8f7f889; // mov eax,edi; neg eax
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*(Bit32u*)(pos+4)=0x909006eb; // skip
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*(Bit32u*)(pos+4)=0x90900eeb; // skip
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*(Bit32u*)(pos+8)=0x90909090;
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*(Bit32u*)(pos+12)=0x90909090;
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*(Bit32u*)(pos+16)=0x90909090;
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break;
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default:
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*(Bit64u*)(pos+2)=(Bit64u)fct_ptr; // fill function pointer
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*(Bit64u*)(pos+6)=(Bit64u)fct_ptr; // fill function pointer
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break;
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}
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#else
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*(Bit64u*)(pos+2)=(Bit64u)fct_ptr;
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*(Bit64u*)(pos+6)=(Bit64u)fct_ptr; // fill function pointer
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#endif
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}
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#endif
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